Lines Matching +full:0 +full:x1324
38 #define MT9V032_CHIP_VERSION 0x00
39 #define MT9V032_CHIP_ID_REV1 0x1311
40 #define MT9V032_CHIP_ID_REV3 0x1313
41 #define MT9V034_CHIP_ID_REV1 0X1324
42 #define MT9V032_COLUMN_START 0x01
46 #define MT9V032_ROW_START 0x02
50 #define MT9V032_WINDOW_HEIGHT 0x03
54 #define MT9V032_WINDOW_WIDTH 0x04
58 #define MT9V032_HORIZONTAL_BLANKING 0x05
63 #define MT9V032_VERTICAL_BLANKING 0x06
69 #define MT9V032_CHIP_CONTROL 0x07
73 #define MT9V032_SHUTTER_WIDTH1 0x08
74 #define MT9V032_SHUTTER_WIDTH2 0x09
75 #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
76 #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
78 #define MT9V034_TOTAL_SHUTTER_WIDTH_MIN 0
82 #define MT9V032_RESET 0x0c
83 #define MT9V032_READ_MODE 0x0d
84 #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
85 #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
92 #define MT9V032_READ_MODE_RESERVED 0x0300
93 #define MT9V032_PIXEL_OPERATION_MODE 0x0f
94 #define MT9V034_PIXEL_OPERATION_MODE_HDR (1 << 0)
98 #define MT9V032_ANALOG_GAIN 0x35
102 #define MT9V032_MAX_ANALOG_GAIN 0x36
104 #define MT9V032_FRAME_DARK_AVERAGE 0x42
105 #define MT9V032_DARK_AVG_THRESH 0x46
106 #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
107 #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
110 #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
111 #define MT9V034_ROW_NOISE_CORR_ENABLE (1 << 0)
115 #define MT9V032_PIXEL_CLOCK 0x74
116 #define MT9V034_PIXEL_CLOCK 0x72
117 #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
122 #define MT9V032_TEST_PATTERN 0x7f
123 #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
124 #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
127 #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
133 #define MT9V032_AEGC_DESIRED_BIN 0xa5
134 #define MT9V032_AEC_UPDATE_FREQUENCY 0xa6
135 #define MT9V032_AEC_LPF 0xa8
136 #define MT9V032_AGC_UPDATE_FREQUENCY 0xa9
137 #define MT9V032_AGC_LPF 0xaa
138 #define MT9V032_AEC_AGC_ENABLE 0xaf
139 #define MT9V032_AEC_ENABLE (1 << 0)
141 #define MT9V034_AEC_MAX_SHUTTER_WIDTH 0xad
142 #define MT9V032_AEC_MAX_SHUTTER_WIDTH 0xbd
143 #define MT9V032_THERMAL_INFO 0xc1
238 if (ret < 0) in mt9v032_update_aec_agc()
242 return 0; in mt9v032_update_aec_agc()
270 if (ret < 0) in mt9v032_power_on()
281 gpiod_set_value_cansleep(mt9v032->reset_gpio, 0); in mt9v032_power_on()
293 if (ret < 0) in mt9v032_power_on()
296 ret = regmap_write(map, MT9V032_RESET, 0); in mt9v032_power_on()
297 if (ret < 0) in mt9v032_power_on()
302 if (ret < 0) in mt9v032_power_on()
305 return 0; in mt9v032_power_on()
324 return 0; in __mt9v032_set_power()
328 if (ret < 0) in __mt9v032_set_power()
335 if (ret < 0) in __mt9v032_set_power()
340 ret = regmap_write(map, MT9V032_ROW_NOISE_CORR_CONTROL, 0); in __mt9v032_set_power()
341 if (ret < 0) in __mt9v032_set_power()
395 return regmap_update_bits(map, MT9V032_CHIP_CONTROL, mode, 0); in mt9v032_s_stream()
404 if (ret < 0) in mt9v032_s_stream()
408 if (ret < 0) in mt9v032_s_stream()
412 if (ret < 0) in mt9v032_s_stream()
416 if (ret < 0) in mt9v032_s_stream()
420 if (ret < 0) in mt9v032_s_stream()
424 if (ret < 0) in mt9v032_s_stream()
437 if (code->index > 0) in mt9v032_enum_mbus_code()
441 return 0; in mt9v032_enum_mbus_code()
460 return 0; in mt9v032_enum_frame_size()
472 return 0; in mt9v032_get_format()
482 if (ret < 0) in mt9v032_configure_pixel_rate()
540 return 0; in mt9v032_set_format()
554 return 0; in mt9v032_get_selection()
612 return 0; in mt9v032_set_selection()
619 #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001)
625 #define V4L2_CID_AEGC_DESIRED_BIN (V4L2_CID_USER_BASE | 0x1002)
629 * Possible values are 0-2. 0 means no LPF. For 1 and 2 this equation is used:
636 #define V4L2_CID_AEC_LPF (V4L2_CID_USER_BASE | 0x1003)
637 #define V4L2_CID_AGC_LPF (V4L2_CID_USER_BASE | 0x1004)
639 * Value between 0 and 15. This is the number of frames being skipped before
642 #define V4L2_CID_AEC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1005)
643 #define V4L2_CID_AGC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1006)
647 #define V4L2_CID_AEC_MAX_SHUTTER_WIDTH (V4L2_CID_USER_BASE | 0x1007)
693 case 0: in mt9v032_s_ctrl()
694 data = 0; in mt9v032_s_ctrl()
741 return 0; in mt9v032_s_ctrl()
761 .min = 0,
764 .def = 0,
765 .flags = 0,
778 .flags = 0,
784 .min = 0,
787 .def = 0,
788 .flags = 0,
794 .min = 0,
798 .flags = 0,
804 .min = 0,
808 .flags = 0,
814 .min = 0,
818 .flags = 0,
831 .flags = 0,
843 .flags = 0,
853 int ret = 0; in mt9v032_set_power()
857 /* If the power count is modified from 0 to != 0 or from != 0 to 0, in mt9v032_set_power()
862 if (ret < 0) in mt9v032_set_power()
868 WARN_ON(mt9v032->power_count < 0); in mt9v032_set_power()
887 dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n", in mt9v032_registered()
891 if (ret < 0) { in mt9v032_registered()
901 if (ret < 0) { in mt9v032_registered()
906 for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) { in mt9v032_registered()
914 dev_err(&client->dev, "Unsupported chip version 0x%04x\n", in mt9v032_registered()
919 dev_info(&client->dev, "%s detected at address 0x%02x\n", in mt9v032_registered()
933 crop = v4l2_subdev_get_try_crop(subdev, fh->state, 0); in mt9v032_open()
939 format = v4l2_subdev_get_try_format(subdev, fh->state, 0); in mt9v032_open()
956 return mt9v032_set_power(subdev, 0); in mt9v032_close()
991 .max_register = 0xff,
1003 struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 }; in mt9v032_get_pdata()
1014 if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) in mt9v032_get_pdata()
1032 link_freqs, size) < 0) in mt9v032_get_pdata()
1036 pdata->link_def_freq = link_freqs[0]; in mt9v032_get_pdata()
1085 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); in mt9v032_probe()
1090 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0, in mt9v032_probe()
1106 ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0, in mt9v032_probe()
1114 for (i = 0; i < ARRAY_SIZE(mt9v032_aegc_controls); ++i) in mt9v032_probe()
1125 unsigned int def = 0; in mt9v032_probe()
1127 for (i = 0; pdata->link_freqs[i]; ++i) { in mt9v032_probe()
1179 if (ret < 0) in mt9v032_probe()
1184 if (ret < 0) in mt9v032_probe()
1187 return 0; in mt9v032_probe()
1233 .data = &mt9v032_model_data[0],
1237 .data = &mt9v032_model_data[0],
1249 .data = &mt9v032_model_data[0],
1253 .data = &mt9v032_model_data[0],