Lines Matching +full:pin +full:- +full:group

1 /* SPDX-License-Identifier: GPL-2.0 */
26  * struct intel_pingroup - Description about group of pins
27  * @grp: Generic data of the pin group (name and pins)
28  * @mode: Native mode in which the group is muxed out @pins. Used if @modes is %NULL.
29  * @modes: If not %NULL this will hold mode for each pin in @pins
38  * struct intel_function - Description about a function
39  * @func: Generic data of the pin function (name and groups of pins)
48  * struct intel_padgroup - Hardware pad group information
50  * @base: Starting pin of this group
51  * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE).
52  * @gpio_base: Starting GPIO base of this group
67  * enum - Special treatment for GPIO base in pad group
71  * @INTEL_GPIO_BASE_MATCH:	matches with starting pin number
74 	INTEL_GPIO_BASE_ZERO	= -2,
75 	INTEL_GPIO_BASE_NOMAP	= -1,
80  * struct intel_community - Intel pin community description
87  *                  is assumed that the host owns the pin (rather than
92  * @pin_base: Starting pin of pins in this community
94  * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
96  * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
100  * @pad_map: Optional non-linear mapping of the pads
106  * In older Intel GPIO host controllers, this driver supports, each pad group
111  * In newer Intel GPIO host controllers each pad group is of variable size,
156 		.npins = ((e) - (s) + 1),			\
168  * PIN_GROUP - Declare a pin group
169  * @n: Name of the group
170  * @p: An array of pins this group consists
171  * @m: Mode which the pins are put when this group is active. Can be either
173  *     pin.
192  * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
196  * @groups: Array of pin groups
224  * struct intel_pinctrl_context - context to be saved during suspend-resume
234  * struct intel_pinctrl - Intel pinctrl private structure
237  * @pctldesc: Pin controller description
238  * @pctldev: Pointer to the pin controller device
239  * @chip: GPIO chip in this pin controller
240  * @soc: SoC/PCH specific pin configuration data
241  * @communities: All communities in this pin controller
242  * @ncommunities: Number of communities in this pin controller
273 struct intel_community *intel_get_community(struct intel_pinctrl *pctrl, unsigned int pin);
276 const char *intel_get_group_name(struct pinctrl_dev *pctldev, unsigned int group);
277 int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,