3  * R-Mobile TPU PWM driver
72 	struct tpu_device *tpu;  member
73 	unsigned int channel;		/* Channel number in the TPU */
94 	void __iomem *base = tpd->tpu->base + TPU_CHANNEL_OFFSET  in tpu_pwm_write()
105 	dev_dbg(&tpd->tpu->pdev->dev, "%u: configuring pin as %s\n",  in tpu_pwm_set_pin()
132 	spin_lock_irqsave(&tpd->tpu->lock, flags);  in tpu_pwm_start_stop()
133 	value = ioread16(tpd->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
140 	iowrite16(value, tpd->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
141 	spin_unlock_irqrestore(&tpd->tpu->lock, flags);  in tpu_pwm_start_stop()
150 		pm_runtime_get_sync(&tpd->tpu->pdev->dev);  in tpu_pwm_timer_start()
151 		ret = clk_prepare_enable(tpd->tpu->clk);  in tpu_pwm_timer_start()
153 			dev_err(&tpd->tpu->pdev->dev, "cannot enable clock\n");  in tpu_pwm_timer_start()
182 	dev_dbg(&tpd->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",  in tpu_pwm_timer_start()
200 	clk_disable_unprepare(tpd->tpu->clk);  in tpu_pwm_timer_stop()
201 	pm_runtime_put(&tpd->tpu->pdev->dev);  in tpu_pwm_timer_stop()
212 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_request()  local
222 	tpd->tpu = tpu;  in tpu_pwm_request()
248 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_config()  local
256 	clk_rate = clk_get_rate(tpu->clk);  in tpu_pwm_config()
310 	dev_dbg(&tpu->pdev->dev,  in tpu_pwm_config()
332 		dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", tpd->channel,  in tpu_pwm_config()
443 	struct tpu_device *tpu;  in tpu_probe()  local
446 	tpu = devm_kzalloc(&pdev->dev, sizeof(*tpu), GFP_KERNEL);  in tpu_probe()
447 	if (tpu == NULL)  in tpu_probe()
450 	spin_lock_init(&tpu->lock);  in tpu_probe()
451 	tpu->pdev = pdev;  in tpu_probe()
454 	tpu->base = devm_platform_ioremap_resource(pdev, 0);  in tpu_probe()
455 	if (IS_ERR(tpu->base))  in tpu_probe()
456 		return PTR_ERR(tpu->base);  in tpu_probe()
458 	tpu->clk = devm_clk_get(&pdev->dev, NULL);  in tpu_probe()
459 	if (IS_ERR(tpu->clk))  in tpu_probe()
460 		return dev_err_probe(&pdev->dev, PTR_ERR(tpu->clk), "Failed to get clock\n");  in tpu_probe()
463 	platform_set_drvdata(pdev, tpu);  in tpu_probe()
465 	tpu->chip.dev = &pdev->dev;  in tpu_probe()
466 	tpu->chip.ops = &tpu_pwm_ops;  in tpu_probe()
467 	tpu->chip.npwm = TPU_CHANNEL_MAX;  in tpu_probe()
473 	ret = devm_pwmchip_add(&pdev->dev, &tpu->chip);  in tpu_probe()
482 	{ .compatible = "renesas,tpu-r8a73a4", },
483 	{ .compatible = "renesas,tpu-r8a7740", },
484 	{ .compatible = "renesas,tpu-r8a7790", },
485 	{ .compatible = "renesas,tpu", },
495 		.name	= "renesas-tpu-pwm",
503 MODULE_DESCRIPTION("Renesas TPU PWM Driver");
505 MODULE_ALIAS("platform:renesas-tpu-pwm");