259 	unsigned int		dmacr;		/* dma control reg */  member
545 	u16 dmacr;  in pl011_dma_tx_callback()  local
552 	dmacr = uap->dmacr;  in pl011_dma_tx_callback()
553 	uap->dmacr = dmacr & ~UART011_TXDMAE;  in pl011_dma_tx_callback()
554 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_callback()
563 	 * get further refills (hence we check dmacr).  in pl011_dma_tx_callback()
565 	if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) ||  in pl011_dma_tx_callback()
668 	uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_refill()
669 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_refill()
703 		uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_irq()
704 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_irq()
729 		uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_tx_stop()
730 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_stop()
744 	u16 dmacr;  in pl011_dma_tx_start()  local
759 		} else if (!(uap->dmacr & UART011_TXDMAE)) {  in pl011_dma_tx_start()
760 			uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_start()
761 			pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
770 	dmacr = uap->dmacr;  in pl011_dma_tx_start()
771 	uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_tx_start()
772 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
788 	uap->dmacr = dmacr;  in pl011_dma_tx_start()
789 	pl011_write(dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
814 		uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_flush_buffer()
815 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_flush_buffer()
854 	uap->dmacr |= UART011_RXDMAE;  in pl011_dma_rx_trigger_dma()
855 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_trigger_dma()
963 	uap->dmacr &= ~UART011_RXDMAE;  in pl011_dma_rx_irq()
964 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_irq()
1047 	uap->dmacr &= ~UART011_RXDMAE;  in pl011_dma_rx_stop()
1048 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_stop()
1153 	uap->dmacr |= UART011_DMAONERR;  in pl011_dma_startup()
1154 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_startup()
1190 	uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE);  in pl011_dma_shutdown()
1191 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_shutdown()
1842 		uap->dmacr |= UART011_RXDMAE;  in pl011_unthrottle_rx()
1843 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_unthrottle_rx()