Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/soc/nxp/lpc32xx-misc.h>
39 #define LPC32XX_HSU_BREAK_DATA (1 << 10)
40 #define LPC32XX_HSU_ERROR_DATA (1 << 9)
41 #define LPC32XX_HSU_RX_EMPTY (1 << 8)
46 #define LPC32XX_HSU_TX_INT_SET (1 << 6)
47 #define LPC32XX_HSU_RX_OE_INT (1 << 5)
48 #define LPC32XX_HSU_BRK_INT (1 << 4)
49 #define LPC32XX_HSU_FE_INT (1 << 3)
50 #define LPC32XX_HSU_RX_TIMEOUT_INT (1 << 2)
51 #define LPC32XX_HSU_RX_TRIG_INT (1 << 1)
52 #define LPC32XX_HSU_TX_INT (1 << 0)
54 #define LPC32XX_HSU_HRTS_INV (1 << 21)
59 #define LPC32XX_HSU_HRTS_EN (1 << 18)
64 #define LPC32XX_HSU_HCTS_INV (1 << 15)
65 #define LPC32XX_HSU_HCTS_EN (1 << 14)
67 #define LPC32XX_HSU_BREAK (1 << 8)
68 #define LPC32XX_HSU_ERR_INT_EN (1 << 7)
69 #define LPC32XX_HSU_RX_INT_EN (1 << 6)
70 #define LPC32XX_HSU_TX_INT_EN (1 << 5)
88 struct uart_port port; member
97 static void wait_for_xmit_empty(struct uart_port *port) in wait_for_xmit_empty() argument
103 port->membase))) == 0) in wait_for_xmit_empty()
105 if (--timeout == 0) in wait_for_xmit_empty()
107 udelay(1); in wait_for_xmit_empty()
108 } while (1); in wait_for_xmit_empty()
111 static void wait_for_xmit_ready(struct uart_port *port) in wait_for_xmit_ready() argument
115 while (1) { in wait_for_xmit_ready()
117 port->membase))) < 32) in wait_for_xmit_ready()
119 if (--timeout == 0) in wait_for_xmit_ready()
121 udelay(1); in wait_for_xmit_ready()
125 static void lpc32xx_hsuart_console_putchar(struct uart_port *port, unsigned char ch) in lpc32xx_hsuart_console_putchar() argument
127 wait_for_xmit_ready(port); in lpc32xx_hsuart_console_putchar()
128 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase)); in lpc32xx_hsuart_console_putchar()
134 struct lpc32xx_hsuart_port *up = &lpc32xx_hs_ports[co->index]; in lpc32xx_hsuart_console_write()
136 int locked = 1; in lpc32xx_hsuart_console_write()
140 if (up->port.sysrq) in lpc32xx_hsuart_console_write()
143 locked = spin_trylock(&up->port.lock); in lpc32xx_hsuart_console_write()
145 spin_lock(&up->port.lock); in lpc32xx_hsuart_console_write()
147 uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar); in lpc32xx_hsuart_console_write()
148 wait_for_xmit_empty(&up->port); in lpc32xx_hsuart_console_write()
151 spin_unlock(&up->port.lock); in lpc32xx_hsuart_console_write()
158 struct uart_port *port; in lpc32xx_hsuart_console_setup() local
164 if (co->index >= MAX_PORTS) in lpc32xx_hsuart_console_setup()
165 co->index = 0; in lpc32xx_hsuart_console_setup()
167 port = &lpc32xx_hs_ports[co->index].port; in lpc32xx_hsuart_console_setup()
168 if (!port->membase) in lpc32xx_hsuart_console_setup()
169 return -ENODEV; in lpc32xx_hsuart_console_setup()
174 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in lpc32xx_hsuart_console_setup()
176 return uart_set_options(port, co, baud, parity, bits, flow); in lpc32xx_hsuart_console_setup()
186 .index = -1,
219 goodrate = hsu_rate = (div / 14) - 1; in __serial_get_clock_div()
221 hsu_rate--; in __serial_get_clock_div()
228 comprate = uartclk / ((hsu_rate + 1) * 14); in __serial_get_clock_div()
229 if (abs(comprate - rate) < rate_diff) { in __serial_get_clock_div()
231 rate_diff = abs(comprate - rate); in __serial_get_clock_div()
242 static void __serial_uart_flush(struct uart_port *port) in __serial_uart_flush() argument
246 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) && in __serial_uart_flush()
248 readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
251 static void __serial_lpc32xx_rx(struct uart_port *port) in __serial_lpc32xx_rx() argument
253 struct tty_port *tport = &port->state->port; in __serial_lpc32xx_rx()
257 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
260 port->icount.rx++; in __serial_lpc32xx_rx()
265 LPC32XX_HSUART_IIR(port->membase)); in __serial_lpc32xx_rx()
266 port->icount.frame++; in __serial_lpc32xx_rx()
273 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
279 static bool serial_lpc32xx_tx_ready(struct uart_port *port) in serial_lpc32xx_tx_ready() argument
281 u32 level = readl(LPC32XX_HSUART_LEVEL(port->membase)); in serial_lpc32xx_tx_ready()
286 static void __serial_lpc32xx_tx(struct uart_port *port) in __serial_lpc32xx_tx() argument
290 uart_port_tx(port, ch, in __serial_lpc32xx_tx()
291 serial_lpc32xx_tx_ready(port), in __serial_lpc32xx_tx()
292 writel(ch, LPC32XX_HSUART_FIFO(port->membase))); in __serial_lpc32xx_tx()
297 struct uart_port *port = dev_id; in serial_lpc32xx_interrupt() local
298 struct tty_port *tport = &port->state->port; in serial_lpc32xx_interrupt()
301 spin_lock(&port->lock); in serial_lpc32xx_interrupt()
304 status = readl(LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
308 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
309 port->icount.brk++; in serial_lpc32xx_interrupt()
310 uart_handle_break(port); in serial_lpc32xx_interrupt()
315 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
320 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
321 port->icount.overrun++; in serial_lpc32xx_interrupt()
328 __serial_lpc32xx_rx(port); in serial_lpc32xx_interrupt()
331 if ((status & LPC32XX_HSU_TX_INT) && (!uart_tx_stopped(port))) { in serial_lpc32xx_interrupt()
332 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
333 __serial_lpc32xx_tx(port); in serial_lpc32xx_interrupt()
336 spin_unlock(&port->lock); in serial_lpc32xx_interrupt()
341 /* port->lock is not held. */
342 static unsigned int serial_lpc32xx_tx_empty(struct uart_port *port) in serial_lpc32xx_tx_empty() argument
346 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0) in serial_lpc32xx_tx_empty()
352 /* port->lock held by caller. */
353 static void serial_lpc32xx_set_mctrl(struct uart_port *port, in serial_lpc32xx_set_mctrl() argument
359 /* port->lock is held by caller and interrupts are disabled. */
360 static unsigned int serial_lpc32xx_get_mctrl(struct uart_port *port) in serial_lpc32xx_get_mctrl() argument
366 /* port->lock held by caller. */
367 static void serial_lpc32xx_stop_tx(struct uart_port *port) in serial_lpc32xx_stop_tx() argument
371 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
373 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
376 /* port->lock held by caller. */
377 static void serial_lpc32xx_start_tx(struct uart_port *port) in serial_lpc32xx_start_tx() argument
381 __serial_lpc32xx_tx(port); in serial_lpc32xx_start_tx()
382 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
384 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
387 /* port->lock held by caller. */
388 static void serial_lpc32xx_stop_rx(struct uart_port *port) in serial_lpc32xx_stop_rx() argument
392 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
394 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
397 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_stop_rx()
400 /* port->lock is not held. */
401 static void serial_lpc32xx_break_ctl(struct uart_port *port, in serial_lpc32xx_break_ctl() argument
407 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_break_ctl()
408 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
413 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
414 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_break_ctl()
417 /* port->lock is not held. */
418 static int serial_lpc32xx_startup(struct uart_port *port) in serial_lpc32xx_startup() argument
424 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_startup()
426 __serial_uart_flush(port); in serial_lpc32xx_startup()
430 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
432 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_startup()
440 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
442 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in serial_lpc32xx_startup()
444 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_startup()
446 retval = request_irq(port->irq, serial_lpc32xx_interrupt, in serial_lpc32xx_startup()
447 0, MODNAME, port); in serial_lpc32xx_startup()
450 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
455 /* port->lock is not held. */
456 static void serial_lpc32xx_shutdown(struct uart_port *port) in serial_lpc32xx_shutdown() argument
461 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_shutdown()
465 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_shutdown()
467 lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */ in serial_lpc32xx_shutdown()
469 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_shutdown()
471 free_irq(port->irq, port); in serial_lpc32xx_shutdown()
474 /* port->lock is not held. */
475 static void serial_lpc32xx_set_termios(struct uart_port *port, in serial_lpc32xx_set_termios() argument
483 /* Always 8-bit, no parity, 1 stop bit */ in serial_lpc32xx_set_termios()
484 termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD); in serial_lpc32xx_set_termios()
485 termios->c_cflag |= CS8; in serial_lpc32xx_set_termios()
487 termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); in serial_lpc32xx_set_termios()
489 baud = uart_get_baud_rate(port, termios, old, 0, in serial_lpc32xx_set_termios()
490 port->uartclk / 14); in serial_lpc32xx_set_termios()
492 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
494 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_set_termios()
497 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
498 if ((termios->c_cflag & CREAD) == 0) in serial_lpc32xx_set_termios()
502 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
504 writel(quot, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_set_termios()
506 uart_update_timeout(port, termios->c_cflag, baud); in serial_lpc32xx_set_termios()
508 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_set_termios()
515 static const char *serial_lpc32xx_type(struct uart_port *port) in serial_lpc32xx_type() argument
520 static void serial_lpc32xx_release_port(struct uart_port *port) in serial_lpc32xx_release_port() argument
522 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_release_port()
523 if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_release_port()
524 iounmap(port->membase); in serial_lpc32xx_release_port()
525 port->membase = NULL; in serial_lpc32xx_release_port()
528 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_release_port()
532 static int serial_lpc32xx_request_port(struct uart_port *port) in serial_lpc32xx_request_port() argument
534 int ret = -ENODEV; in serial_lpc32xx_request_port()
536 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_request_port()
539 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) in serial_lpc32xx_request_port()
540 ret = -EBUSY; in serial_lpc32xx_request_port()
541 else if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_request_port()
542 port->membase = ioremap(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
543 if (!port->membase) { in serial_lpc32xx_request_port()
544 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
545 ret = -ENOMEM; in serial_lpc32xx_request_port()
553 static void serial_lpc32xx_config_port(struct uart_port *port, int uflags) in serial_lpc32xx_config_port() argument
557 ret = serial_lpc32xx_request_port(port); in serial_lpc32xx_config_port()
560 port->type = PORT_UART00; in serial_lpc32xx_config_port()
561 port->fifosize = 64; in serial_lpc32xx_config_port()
563 __serial_uart_flush(port); in serial_lpc32xx_config_port()
567 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
569 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_config_port()
575 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_config_port()
578 static int serial_lpc32xx_verify_port(struct uart_port *port, in serial_lpc32xx_verify_port() argument
583 if (ser->type != PORT_UART00) in serial_lpc32xx_verify_port()
584 ret = -EINVAL; in serial_lpc32xx_verify_port()
617 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
619 uarts_registered + 1); in serial_hs_lpc32xx_probe()
620 return -ENXIO; in serial_hs_lpc32xx_probe()
627 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
628 "Error getting mem resource for HS UART port %d\n", in serial_hs_lpc32xx_probe()
630 return -ENXIO; in serial_hs_lpc32xx_probe()
632 p->port.mapbase = res->start; in serial_hs_lpc32xx_probe()
633 p->port.membase = NULL; in serial_hs_lpc32xx_probe()
638 p->port.irq = ret; in serial_hs_lpc32xx_probe()
640 p->port.iotype = UPIO_MEM32; in serial_hs_lpc32xx_probe()
641 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
642 p->port.regshift = 2; in serial_hs_lpc32xx_probe()
643 p->port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; in serial_hs_lpc32xx_probe()
644 p->port.dev = &pdev->dev; in serial_hs_lpc32xx_probe()
645 p->port.ops = &serial_lpc32xx_pops; in serial_hs_lpc32xx_probe()
646 p->port.line = uarts_registered++; in serial_hs_lpc32xx_probe()
647 spin_lock_init(&p->port.lock); in serial_hs_lpc32xx_probe()
649 /* send port to loopback mode by default */ in serial_hs_lpc32xx_probe()
650 lpc32xx_loopback_set(p->port.mapbase, 1); in serial_hs_lpc32xx_probe()
652 ret = uart_add_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_probe()
666 uart_remove_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_remove()
678 uart_suspend_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_suspend()
687 uart_resume_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_resume()
697 { .compatible = "nxp,lpc3220-hsuart" },