Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
47 * - only on 75x/76x
50 * - only on 75x/76x
53 * - only on 75x/76x
56 * - only on 75x/76x
60 /* TCR/TLR Register set: Only if ((MCR[2] == 1) && (EFR[4] == 1)) */
64 /* Special Register set: Only if ((LCR[7] == 1) && (LCR != 0xBF)) */
76 #define SC16IS7XX_IER_RDI_BIT (1 << 0) /* Enable RX data interrupt */
77 #define SC16IS7XX_IER_THRI_BIT (1 << 1) /* Enable TX holding register
79 #define SC16IS7XX_IER_RLSI_BIT (1 << 2) /* Enable RX line status
81 #define SC16IS7XX_IER_MSI_BIT (1 << 3) /* Enable Modem status
84 /* IER register bits - write only if (EFR[4] == 1) */
85 #define SC16IS7XX_IER_SLEEP_BIT (1 << 4) /* Enable Sleep mode */
86 #define SC16IS7XX_IER_XOFFI_BIT (1 << 5) /* Enable Xoff interrupt */
87 #define SC16IS7XX_IER_RTSI_BIT (1 << 6) /* Enable nRTS interrupt */
88 #define SC16IS7XX_IER_CTSI_BIT (1 << 7) /* Enable nCTS interrupt */
91 #define SC16IS7XX_FCR_FIFO_BIT (1 << 0) /* Enable FIFO */
92 #define SC16IS7XX_FCR_RXRESET_BIT (1 << 1) /* Reset RX FIFO */
93 #define SC16IS7XX_FCR_TXRESET_BIT (1 << 2) /* Reset TX FIFO */
94 #define SC16IS7XX_FCR_RXLVLL_BIT (1 << 6) /* RX Trigger level LSB */
95 #define SC16IS7XX_FCR_RXLVLH_BIT (1 << 7) /* RX Trigger level MSB */
97 /* FCR register bits - write only if (EFR[4] == 1) */
98 #define SC16IS7XX_FCR_TXLVLL_BIT (1 << 4) /* TX Trigger level LSB */
99 #define SC16IS7XX_FCR_TXLVLH_BIT (1 << 5) /* TX Trigger level MSB */
102 #define SC16IS7XX_IIR_NO_INT_BIT (1 << 0) /* No interrupts pending */
107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
109 * - only on 75x/76x
112 * - only on 75x/76x
120 #define SC16IS7XX_LCR_LENGTH0_BIT (1 << 0) /* Word length bit 0 */
121 #define SC16IS7XX_LCR_LENGTH1_BIT (1 << 1) /* Word length bit 1
124 * 00 -> 5 bit words
125 * 01 -> 6 bit words
126 * 10 -> 7 bit words
127 * 11 -> 8 bit words
129 #define SC16IS7XX_LCR_STOPLEN_BIT (1 << 2) /* STOP length bit
132 * 0 -> 1 stop bit
133 * 1 -> 1-1.5 stop bits if
137 #define SC16IS7XX_LCR_PARITY_BIT (1 << 3) /* Parity bit enable */
138 #define SC16IS7XX_LCR_EVENPARITY_BIT (1 << 4) /* Even parity bit enable */
139 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
140 #define SC16IS7XX_LCR_TXBREAK_BIT (1 << 6) /* TX break enable */
141 #define SC16IS7XX_LCR_DLAB_BIT (1 << 7) /* Divisor Latch enable */
152 #define SC16IS7XX_MCR_DTR_BIT (1 << 0) /* DTR complement
153 * - only on 75x/76x
155 #define SC16IS7XX_MCR_RTS_BIT (1 << 1) /* RTS complement */
156 #define SC16IS7XX_MCR_TCRTLR_BIT (1 << 2) /* TCR/TLR register enable */
157 #define SC16IS7XX_MCR_LOOP_BIT (1 << 4) /* Enable loopback test mode */
158 #define SC16IS7XX_MCR_XONANY_BIT (1 << 5) /* Enable Xon Any
159 * - write enabled
160 * if (EFR[4] == 1)
162 #define SC16IS7XX_MCR_IRDA_BIT (1 << 6) /* Enable IrDA mode
163 * - write enabled
164 * if (EFR[4] == 1)
166 #define SC16IS7XX_MCR_CLKSEL_BIT (1 << 7) /* Divide clock by 4
167 * - write enabled
168 * if (EFR[4] == 1)
172 #define SC16IS7XX_LSR_DR_BIT (1 << 0) /* Receiver data ready */
173 #define SC16IS7XX_LSR_OE_BIT (1 << 1) /* Overrun Error */
174 #define SC16IS7XX_LSR_PE_BIT (1 << 2) /* Parity Error */
175 #define SC16IS7XX_LSR_FE_BIT (1 << 3) /* Frame Error */
176 #define SC16IS7XX_LSR_BI_BIT (1 << 4) /* Break Interrupt */
178 #define SC16IS7XX_LSR_THRE_BIT (1 << 5) /* TX holding register empty */
179 #define SC16IS7XX_LSR_TEMT_BIT (1 << 6) /* Transmitter empty */
180 #define SC16IS7XX_LSR_FIFOE_BIT (1 << 7) /* Fifo Error */
183 #define SC16IS7XX_MSR_DCTS_BIT (1 << 0) /* Delta CTS Clear To Send */
184 #define SC16IS7XX_MSR_DDSR_BIT (1 << 1) /* Delta DSR Data Set Ready
186 * - only on 75x/76x
188 #define SC16IS7XX_MSR_DRI_BIT (1 << 2) /* Delta RI Ring Indicator
190 * - only on 75x/76x
192 #define SC16IS7XX_MSR_DCD_BIT (1 << 3) /* Delta CD Carrier Detect
194 * - only on 75x/76x
196 #define SC16IS7XX_MSR_CTS_BIT (1 << 4) /* CTS */
197 #define SC16IS7XX_MSR_DSR_BIT (1 << 5) /* DSR (IO4)
198 * - only on 75x/76x
200 #define SC16IS7XX_MSR_RI_BIT (1 << 6) /* RI (IO7)
201 * - only on 75x/76x
203 #define SC16IS7XX_MSR_CD_BIT (1 << 7) /* CD (IO6)
204 * - only on 75x/76x
213 * no built-in hardware check to make sure this condition is met. Also, the TCR
228 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
239 #define SC16IS7XX_IOCONTROL_LATCH_BIT (1 << 0) /* Enable input latching */
240 #define SC16IS7XX_IOCONTROL_MODEM_A_BIT (1 << 1) /* Enable GPIO[7:4] as modem A pins */
241 #define SC16IS7XX_IOCONTROL_MODEM_B_BIT (1 << 2) /* Enable GPIO[3:0] as modem B pins */
242 #define SC16IS7XX_IOCONTROL_SRESET_BIT (1 << 3) /* Software Reset */
245 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
247 #define SC16IS7XX_EFCR_RXDISABLE_BIT (1 << 1) /* Disable receiver */
248 #define SC16IS7XX_EFCR_TXDISABLE_BIT (1 << 2) /* Disable transmitter */
249 #define SC16IS7XX_EFCR_AUTO_RS485_BIT (1 << 4) /* Auto RS485 RTS direction */
250 #define SC16IS7XX_EFCR_RTS_INVERT_BIT (1 << 5) /* RTS output inversion */
251 #define SC16IS7XX_EFCR_IRDA_MODE_BIT (1 << 7) /* IrDA mode
253 * - Only 750/760
254 * 1 = rate upto 1.152 Mbit/s
255 * - Only 760
259 #define SC16IS7XX_EFR_AUTORTS_BIT (1 << 6) /* Auto RTS flow ctrl enable */
260 #define SC16IS7XX_EFR_AUTOCTS_BIT (1 << 7) /* Auto CTS flow ctrl enable */
261 #define SC16IS7XX_EFR_XOFF2_DETECT_BIT (1 << 5) /* Enable Xoff2 detection */
262 #define SC16IS7XX_EFR_ENABLE_BIT (1 << 4) /* Enable enhanced functions
266 #define SC16IS7XX_EFR_SWFLOW3_BIT (1 << 3) /* SWFLOW bit 3 */
267 #define SC16IS7XX_EFR_SWFLOW2_BIT (1 << 2) /* SWFLOW bit 2
270 * 00 -> no transmitter flow
272 * 01 -> transmitter generates
274 * 10 -> transmitter generates
276 * 11 -> transmitter generates
280 #define SC16IS7XX_EFR_SWFLOW1_BIT (1 << 1) /* SWFLOW bit 2 */
281 #define SC16IS7XX_EFR_SWFLOW0_BIT (1 << 0) /* SWFLOW bit 3
284 * 00 -> no received flow
286 * 01 -> receiver compares
288 * 10 -> receiver compares
290 * 11 -> receiver compares
314 #define SC16IS7XX_RECONF_MD (1 << 0)
315 #define SC16IS7XX_RECONF_IER (1 << 1)
316 #define SC16IS7XX_RECONF_RS485 (1 << 2)
325 struct uart_port port; member
358 static void sc16is7xx_ier_set(struct uart_port *port, u8 bit);
359 static void sc16is7xx_stop_tx(struct uart_port *port);
364 static u8 sc16is7xx_port_read(struct uart_port *port, u8 reg) in sc16is7xx_port_read() argument
366 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_read()
369 regmap_read(one->regmap, reg, &val); in sc16is7xx_port_read()
374 static void sc16is7xx_port_write(struct uart_port *port, u8 reg, u8 val) in sc16is7xx_port_write() argument
376 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_write()
378 regmap_write(one->regmap, reg, val); in sc16is7xx_port_write()
381 static void sc16is7xx_fifo_read(struct uart_port *port, unsigned int rxlen) in sc16is7xx_fifo_read() argument
383 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_read()
384 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_read()
386 regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, s->buf, rxlen); in sc16is7xx_fifo_read()
389 static void sc16is7xx_fifo_write(struct uart_port *port, u8 to_send) in sc16is7xx_fifo_write() argument
391 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_write()
392 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_write()
395 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
401 regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, s->buf, to_send); in sc16is7xx_fifo_write()
404 static void sc16is7xx_port_update(struct uart_port *port, u8 reg, in sc16is7xx_port_update() argument
407 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_update()
409 regmap_update_bits(one->regmap, reg, mask, val); in sc16is7xx_port_update()
412 static void sc16is7xx_power(struct uart_port *port, int on) in sc16is7xx_power() argument
414 sc16is7xx_port_update(port, SC16IS7XX_IER_REG, in sc16is7xx_power()
422 .nr_uart = 1,
428 .nr_uart = 1,
440 .nr_uart = 1,
492 * -----------------------
494 * divisor = ---------------------------
495 * baud-rate x sampling-rate
497 static int sc16is7xx_set_baud(struct uart_port *port, int baud) in sc16is7xx_set_baud() argument
499 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_baud()
501 unsigned int prescaler = 1; in sc16is7xx_set_baud()
502 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
522 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
524 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_set_baud()
527 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
531 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
532 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, in sc16is7xx_set_baud()
536 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
539 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
541 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
544 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_set_baud()
546 prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT); in sc16is7xx_set_baud()
548 mutex_lock(&one->efr_lock); in sc16is7xx_set_baud()
551 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
555 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
556 sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256); in sc16is7xx_set_baud()
557 sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256); in sc16is7xx_set_baud()
558 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
561 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
563 mutex_unlock(&one->efr_lock); in sc16is7xx_set_baud()
568 static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen, in sc16is7xx_handle_rx() argument
571 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
576 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
577 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
579 port->line, rxlen); in sc16is7xx_handle_rx()
580 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
582 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
588 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG); in sc16is7xx_handle_rx()
595 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
596 bytes_read = 1; in sc16is7xx_handle_rx()
598 sc16is7xx_fifo_read(port, rxlen); in sc16is7xx_handle_rx()
604 port->icount.rx++; in sc16is7xx_handle_rx()
609 port->icount.brk++; in sc16is7xx_handle_rx()
610 if (uart_handle_break(port)) in sc16is7xx_handle_rx()
613 port->icount.parity++; in sc16is7xx_handle_rx()
615 port->icount.frame++; in sc16is7xx_handle_rx()
617 port->icount.overrun++; in sc16is7xx_handle_rx()
619 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
631 ch = s->buf[i]; in sc16is7xx_handle_rx()
632 if (uart_handle_sysrq_char(port, ch)) in sc16is7xx_handle_rx()
635 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
638 uart_insert_char(port, lsr, SC16IS7XX_LSR_OE_BIT, ch, in sc16is7xx_handle_rx()
641 rxlen -= bytes_read; in sc16is7xx_handle_rx()
644 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
647 static void sc16is7xx_handle_tx(struct uart_port *port) in sc16is7xx_handle_tx() argument
649 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
650 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
654 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
655 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
656 port->icount.tx++; in sc16is7xx_handle_tx()
657 port->x_char = 0; in sc16is7xx_handle_tx()
661 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { in sc16is7xx_handle_tx()
662 uart_port_lock_irqsave(port, &flags); in sc16is7xx_handle_tx()
663 sc16is7xx_stop_tx(port); in sc16is7xx_handle_tx()
664 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_handle_tx()
672 txlen = sc16is7xx_port_read(port, SC16IS7XX_TXLVL_REG); in sc16is7xx_handle_tx()
674 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
683 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
684 uart_xmit_advance(port, 1); in sc16is7xx_handle_tx()
687 sc16is7xx_fifo_write(port, to_send); in sc16is7xx_handle_tx()
690 uart_port_lock_irqsave(port, &flags); in sc16is7xx_handle_tx()
692 uart_write_wakeup(port); in sc16is7xx_handle_tx()
695 sc16is7xx_stop_tx(port); in sc16is7xx_handle_tx()
697 sc16is7xx_ier_set(port, SC16IS7XX_IER_THRI_BIT); in sc16is7xx_handle_tx()
698 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_handle_tx()
701 static unsigned int sc16is7xx_get_hwmctrl(struct uart_port *port) in sc16is7xx_get_hwmctrl() argument
703 u8 msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG); in sc16is7xx_get_hwmctrl()
715 struct uart_port *port = &one->port; in sc16is7xx_update_mlines() local
719 lockdep_assert_held_once(&one->efr_lock); in sc16is7xx_update_mlines()
721 status = sc16is7xx_get_hwmctrl(port); in sc16is7xx_update_mlines()
722 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
727 one->old_mctrl = status; in sc16is7xx_update_mlines()
729 uart_port_lock_irqsave(port, &flags); in sc16is7xx_update_mlines()
731 port->icount.rng++; in sc16is7xx_update_mlines()
733 port->icount.dsr++; in sc16is7xx_update_mlines()
735 uart_handle_dcd_change(port, status & TIOCM_CAR); in sc16is7xx_update_mlines()
737 uart_handle_cts_change(port, status & TIOCM_CTS); in sc16is7xx_update_mlines()
739 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
740 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_update_mlines()
747 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq() local
748 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_irq()
750 mutex_lock(&one->efr_lock); in sc16is7xx_port_irq()
752 iir = sc16is7xx_port_read(port, SC16IS7XX_IIR_REG); in sc16is7xx_port_irq()
765 rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG); in sc16is7xx_port_irq()
769 * time-out interrupt but no data in the FIFO. This is in sc16is7xx_port_irq()
776 rxlen = 1; in sc16is7xx_port_irq()
779 sc16is7xx_handle_rx(port, rxlen, iir); in sc16is7xx_port_irq()
787 sc16is7xx_handle_tx(port); in sc16is7xx_port_irq()
790 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
792 port->line, iir); in sc16is7xx_port_irq()
797 mutex_unlock(&one->efr_lock); in sc16is7xx_port_irq()
813 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
822 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc() local
823 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_tx_proc()
825 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
826 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
827 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
829 mutex_lock(&one->efr_lock); in sc16is7xx_tx_proc()
830 sc16is7xx_handle_tx(port); in sc16is7xx_tx_proc()
831 mutex_unlock(&one->efr_lock); in sc16is7xx_tx_proc()
834 static void sc16is7xx_reconf_rs485(struct uart_port *port) in sc16is7xx_reconf_rs485() argument
839 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485()
842 uart_port_lock_irqsave(port, &irqflags); in sc16is7xx_reconf_rs485()
843 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
846 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
849 uart_port_unlock_irqrestore(port, irqflags); in sc16is7xx_reconf_rs485()
851 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, mask, efcr); in sc16is7xx_reconf_rs485()
860 uart_port_lock_irqsave(&one->port, &irqflags); in sc16is7xx_reg_proc()
861 config = one->config; in sc16is7xx_reg_proc()
862 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
863 uart_port_unlock_irqrestore(&one->port, irqflags); in sc16is7xx_reg_proc()
869 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
872 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
875 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
877 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
885 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
889 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
892 static void sc16is7xx_ier_clear(struct uart_port *port, u8 bit) in sc16is7xx_ier_clear() argument
894 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
895 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_clear()
897 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
899 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
900 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
901 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
902 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
905 static void sc16is7xx_ier_set(struct uart_port *port, u8 bit) in sc16is7xx_ier_set() argument
907 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
908 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_set()
910 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
912 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
913 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
914 one->config.ier_val |= bit; in sc16is7xx_ier_set()
915 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
918 static void sc16is7xx_stop_tx(struct uart_port *port) in sc16is7xx_stop_tx() argument
920 sc16is7xx_ier_clear(port, SC16IS7XX_IER_THRI_BIT); in sc16is7xx_stop_tx()
923 static void sc16is7xx_stop_rx(struct uart_port *port) in sc16is7xx_stop_rx() argument
925 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_stop_rx()
931 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
933 if (one->port.state) { in sc16is7xx_ms_proc()
934 mutex_lock(&one->efr_lock); in sc16is7xx_ms_proc()
936 mutex_unlock(&one->efr_lock); in sc16is7xx_ms_proc()
938 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
942 static void sc16is7xx_enable_ms(struct uart_port *port) in sc16is7xx_enable_ms() argument
944 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_enable_ms()
945 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
947 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
949 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
952 static void sc16is7xx_start_tx(struct uart_port *port) in sc16is7xx_start_tx() argument
954 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
955 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_start_tx()
957 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
960 static void sc16is7xx_throttle(struct uart_port *port) in sc16is7xx_throttle() argument
967 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
969 uart_port_lock_irqsave(port, &flags); in sc16is7xx_throttle()
970 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_throttle()
971 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_throttle()
974 static void sc16is7xx_unthrottle(struct uart_port *port) in sc16is7xx_unthrottle() argument
978 uart_port_lock_irqsave(port, &flags); in sc16is7xx_unthrottle()
979 sc16is7xx_ier_set(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_unthrottle()
980 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_unthrottle()
983 static unsigned int sc16is7xx_tx_empty(struct uart_port *port) in sc16is7xx_tx_empty() argument
987 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG); in sc16is7xx_tx_empty()
992 static unsigned int sc16is7xx_get_mctrl(struct uart_port *port) in sc16is7xx_get_mctrl() argument
994 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_get_mctrl()
996 /* Called with port lock taken so we can only return cached value */ in sc16is7xx_get_mctrl()
997 return one->old_mctrl; in sc16is7xx_get_mctrl()
1000 static void sc16is7xx_set_mctrl(struct uart_port *port, unsigned int mctrl) in sc16is7xx_set_mctrl() argument
1002 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
1003 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_mctrl()
1005 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
1006 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1009 static void sc16is7xx_break_ctl(struct uart_port *port, int break_state) in sc16is7xx_break_ctl() argument
1011 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG, in sc16is7xx_break_ctl()
1016 static void sc16is7xx_set_termios(struct uart_port *port, in sc16is7xx_set_termios() argument
1020 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_termios()
1025 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1028 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1031 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1046 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1047 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1052 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1054 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1059 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1063 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1064 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1065 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1067 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1068 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1071 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1072 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1073 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1074 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1075 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1078 mutex_lock(&one->efr_lock); in sc16is7xx_set_termios()
1080 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_termios()
1084 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_termios()
1085 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1086 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1088 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1089 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1092 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1094 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1096 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1099 sc16is7xx_port_update(port, in sc16is7xx_set_termios()
1103 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_termios()
1106 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_termios()
1108 mutex_unlock(&one->efr_lock); in sc16is7xx_set_termios()
1111 baud = uart_get_baud_rate(port, termios, old, in sc16is7xx_set_termios()
1112 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1113 port->uartclk / 16); in sc16is7xx_set_termios()
1116 baud = sc16is7xx_set_baud(port, baud); in sc16is7xx_set_termios()
1118 uart_port_lock_irqsave(port, &flags); in sc16is7xx_set_termios()
1121 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1123 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1124 sc16is7xx_enable_ms(port); in sc16is7xx_set_termios()
1126 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_set_termios()
1129 static int sc16is7xx_config_rs485(struct uart_port *port, struct ktermios *termios, in sc16is7xx_config_rs485() argument
1132 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1133 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_config_rs485()
1135 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1141 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1142 return -EINVAL; in sc16is7xx_config_rs485()
1145 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1146 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1151 static int sc16is7xx_startup(struct uart_port *port) in sc16is7xx_startup() argument
1153 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_startup()
1157 sc16is7xx_power(port, 1); in sc16is7xx_startup()
1161 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, val); in sc16is7xx_startup()
1163 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, in sc16is7xx_startup()
1167 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_startup()
1170 regcache_cache_bypass(one->regmap, true); in sc16is7xx_startup()
1173 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, in sc16is7xx_startup()
1178 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_startup()
1184 sc16is7xx_port_write(port, SC16IS7XX_TCR_REG, in sc16is7xx_startup()
1188 regcache_cache_bypass(one->regmap, false); in sc16is7xx_startup()
1191 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8); in sc16is7xx_startup()
1195 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_startup()
1197 one->irda_mode ? in sc16is7xx_startup()
1201 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, in sc16is7xx_startup()
1209 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val); in sc16is7xx_startup()
1212 uart_port_lock_irqsave(port, &flags); in sc16is7xx_startup()
1213 sc16is7xx_enable_ms(port); in sc16is7xx_startup()
1214 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_startup()
1219 static void sc16is7xx_shutdown(struct uart_port *port) in sc16is7xx_shutdown() argument
1221 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1222 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_shutdown()
1224 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1227 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0); in sc16is7xx_shutdown()
1229 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, in sc16is7xx_shutdown()
1235 sc16is7xx_power(port, 0); in sc16is7xx_shutdown()
1237 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1240 static const char *sc16is7xx_type(struct uart_port *port) in sc16is7xx_type() argument
1242 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1244 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1247 static int sc16is7xx_request_port(struct uart_port *port) in sc16is7xx_request_port() argument
1253 static void sc16is7xx_config_port(struct uart_port *port, int flags) in sc16is7xx_config_port() argument
1256 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1259 static int sc16is7xx_verify_port(struct uart_port *port, in sc16is7xx_verify_port() argument
1262 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1263 return -EINVAL; in sc16is7xx_verify_port()
1264 if (s->irq != port->irq) in sc16is7xx_verify_port()
1265 return -EINVAL; in sc16is7xx_verify_port()
1270 static void sc16is7xx_pm(struct uart_port *port, unsigned int state, in sc16is7xx_pm() argument
1273 sc16is7xx_power(port, (state == UART_PM_STATE_ON) ? 1 : 0); in sc16is7xx_pm()
1276 static void sc16is7xx_null_void(struct uart_port *port) in sc16is7xx_null_void() argument
1308 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get() local
1310 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG); in sc16is7xx_gpio_get()
1318 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set() local
1320 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset), in sc16is7xx_gpio_set()
1328 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input() local
1330 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0); in sc16is7xx_gpio_direction_input()
1339 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output() local
1340 u8 state = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG); in sc16is7xx_gpio_direction_output()
1355 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), in sc16is7xx_gpio_direction_output()
1357 sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); in sc16is7xx_gpio_direction_output()
1368 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1375 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1377 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1380 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1382 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1385 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1388 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1394 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1397 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1398 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1399 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1400 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1401 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1402 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1403 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1404 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1405 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1406 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1407 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1409 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1419 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_irda_ports()
1421 count = device_property_count_u32(dev, "irda-mode-ports"); in sc16is7xx_setup_irda_ports()
1425 ret = device_property_read_u32_array(dev, "irda-mode-ports", in sc16is7xx_setup_irda_ports()
1431 if (irda_port[i] < s->devtype->nr_uart) in sc16is7xx_setup_irda_ports()
1432 s->p[irda_port[i]].irda_mode = true; in sc16is7xx_setup_irda_ports()
1446 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1448 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1452 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1457 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1462 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1463 else if (mctrl_port[i] == 1) in sc16is7xx_setup_mctrl_ports()
1464 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1467 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1472 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1479 .delay_rts_before_send = 1,
1480 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1493 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1508 return -EPROBE_DEFER; in sc16is7xx_probe()
1510 /* Alloc port structure */ in sc16is7xx_probe()
1511 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1513 dev_err(dev, "Error allocating port structure\n"); in sc16is7xx_probe()
1514 return -ENOMEM; in sc16is7xx_probe()
1518 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1520 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1521 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1522 return PTR_ERR(s->clk); in sc16is7xx_probe()
1524 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1528 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1537 return -EINVAL; in sc16is7xx_probe()
1540 s->devtype = devtype; in sc16is7xx_probe()
1543 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1544 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1546 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1547 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1550 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1556 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1557 s->p[i].port.line = find_first_zero_bit(&sc16is7xx_lines, in sc16is7xx_probe()
1559 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1560 ret = -ERANGE; in sc16is7xx_probe()
1564 /* Initialize port data */ in sc16is7xx_probe()
1565 s->p[i].port.dev = dev; in sc16is7xx_probe()
1566 s->p[i].port.irq = irq; in sc16is7xx_probe()
1567 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1568 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1569 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1570 s->p[i].port.iobase = i; in sc16is7xx_probe()
1576 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1577 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1578 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1579 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1580 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1581 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1582 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1583 s->p[i].regmap = regmaps[i]; in sc16is7xx_probe()
1585 mutex_init(&s->p[i].efr_lock); in sc16is7xx_probe()
1587 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1592 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1594 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1599 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1600 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1601 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1603 /* Register port */ in sc16is7xx_probe()
1604 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1608 set_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_probe()
1611 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1617 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1623 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1626 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1645 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1661 if (s->gpio_valid_mask) in sc16is7xx_probe()
1662 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1666 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1667 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_probe()
1668 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1670 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1673 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1684 if (s->gpio_valid_mask) in sc16is7xx_remove()
1685 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1688 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1689 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1690 if (test_and_clear_bit(s->p[i].port.line, &sc16is7xx_lines)) in sc16is7xx_remove()
1691 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1692 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1695 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1696 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1698 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1730 case 1: return "port1"; in sc16is7xx_regmap_name()
1739 /* CH1,CH0 are at bits 2:1. */ in sc16is7xx_regmap_port_mask()
1740 return port_id << 1; in sc16is7xx_regmap_port_mask()
1752 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1754 if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0) in sc16is7xx_spi_probe()
1755 return dev_err_probe(&spi->dev, -EINVAL, "Unsupported SPI mode\n"); in sc16is7xx_spi_probe()
1757 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1758 spi->max_speed_hz = spi->max_speed_hz ? : 4 * HZ_PER_MHZ; in sc16is7xx_spi_probe()
1763 if (spi->dev.of_node) { in sc16is7xx_spi_probe()
1764 devtype = device_get_match_data(&spi->dev); in sc16is7xx_spi_probe()
1766 return -ENODEV; in sc16is7xx_spi_probe()
1770 devtype = (struct sc16is7xx_devtype *)id_entry->driver_data; in sc16is7xx_spi_probe()
1773 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_spi_probe()
1786 return sc16is7xx_probe(&spi->dev, devtype, regmaps, spi->irq); in sc16is7xx_spi_probe()
1791 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1828 if (i2c->dev.of_node) { in sc16is7xx_i2c_probe()
1829 devtype = device_get_match_data(&i2c->dev); in sc16is7xx_i2c_probe()
1831 return -ENODEV; in sc16is7xx_i2c_probe()
1833 devtype = (struct sc16is7xx_devtype *)id->driver_data; in sc16is7xx_i2c_probe()
1836 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_i2c_probe()
1843 return sc16is7xx_probe(&i2c->dev, devtype, regmaps, i2c->irq); in sc16is7xx_i2c_probe()
1848 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1888 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1896 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()