Lines Matching +full:xps +full:- +full:uartlite +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * uartlite.c: Serial driver for Xilinx uartlite serial controller
31 /* ---------------------------------------------------------------------
115 struct uartlite_data *pdata = port->private_data; in uart_in32()
117 return pdata->reg_ops->in(port->membase + offset); in uart_in32()
122 struct uartlite_data *pdata = port->private_data; in uart_out32()
124 pdata->reg_ops->out(val, port->membase + offset); in uart_out32()
131 /* ---------------------------------------------------------------------
137 struct tty_port *tport = &port->state->port; in ulite_receive()
147 port->icount.rx++; in ulite_receive()
151 port->icount.parity++; in ulite_receive()
155 port->icount.overrun++; in ulite_receive()
158 port->icount.frame++; in ulite_receive()
162 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY) in ulite_receive()
165 stat &= port->read_status_mask; in ulite_receive()
171 stat &= ~port->ignore_status_mask; in ulite_receive()
182 return 1; in ulite_receive()
187 struct circ_buf *xmit = &port->state->xmit; in ulite_transmit()
192 if (port->x_char) { in ulite_transmit()
193 uart_out32(port->x_char, ULITE_TX, port); in ulite_transmit()
194 port->x_char = 0; in ulite_transmit()
195 port->icount.tx++; in ulite_transmit()
196 return 1; in ulite_transmit()
202 uart_out32(xmit->buf[xmit->tail], ULITE_TX, port); in ulite_transmit()
203 uart_xmit_advance(port, 1); in ulite_transmit()
209 return 1; in ulite_transmit()
219 spin_lock_irqsave(&port->lock, flags); in ulite_isr()
223 spin_unlock_irqrestore(&port->lock, flags); in ulite_isr()
228 if (n > 1) { in ulite_isr()
229 tty_flip_buffer_push(&port->state->port); in ulite_isr()
241 spin_lock_irqsave(&port->lock, flags); in ulite_tx_empty()
243 spin_unlock_irqrestore(&port->lock, flags); in ulite_tx_empty()
271 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY in ulite_stop_rx()
282 struct uartlite_data *pdata = port->private_data; in ulite_startup()
285 ret = clk_enable(pdata->clk); in ulite_startup()
287 dev_err(port->dev, "Failed to enable clock\n"); in ulite_startup()
291 ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING, in ulite_startup()
292 "uartlite", port); in ulite_startup()
305 struct uartlite_data *pdata = port->private_data; in ulite_shutdown()
309 free_irq(port->irq, port); in ulite_shutdown()
310 clk_disable(pdata->clk); in ulite_shutdown()
318 struct uartlite_data *pdata = port->private_data; in ulite_set_termios()
321 termios->c_iflag &= ~BRKINT; in ulite_set_termios()
322 termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CSIZE); in ulite_set_termios()
323 termios->c_cflag |= pdata->cflags & (PARENB | PARODD | CSIZE); in ulite_set_termios()
324 tty_termios_encode_baud_rate(termios, pdata->baud, pdata->baud); in ulite_set_termios()
326 spin_lock_irqsave(&port->lock, flags); in ulite_set_termios()
328 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN in ulite_set_termios()
331 if (termios->c_iflag & INPCK) in ulite_set_termios()
332 port->read_status_mask |= in ulite_set_termios()
335 port->ignore_status_mask = 0; in ulite_set_termios()
336 if (termios->c_iflag & IGNPAR) in ulite_set_termios()
337 port->ignore_status_mask |= ULITE_STATUS_PARITY in ulite_set_termios()
341 if ((termios->c_cflag & CREAD) == 0) in ulite_set_termios()
342 port->ignore_status_mask |= in ulite_set_termios()
347 uart_update_timeout(port, termios->c_cflag, pdata->baud); in ulite_set_termios()
349 spin_unlock_irqrestore(&port->lock, flags); in ulite_set_termios()
354 return port->type == PORT_UARTLITE ? "uartlite" : NULL; in ulite_type()
359 release_mem_region(port->mapbase, ULITE_REGION); in ulite_release_port()
360 iounmap(port->membase); in ulite_release_port()
361 port->membase = NULL; in ulite_release_port()
366 struct uartlite_data *pdata = port->private_data; in ulite_request_port()
369 pr_debug("ulite console: port=%p; port->mapbase=%llx\n", in ulite_request_port()
370 port, (unsigned long long) port->mapbase); in ulite_request_port()
372 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) { in ulite_request_port()
373 dev_err(port->dev, "Memory region busy\n"); in ulite_request_port()
374 return -EBUSY; in ulite_request_port()
377 port->membase = ioremap(port->mapbase, ULITE_REGION); in ulite_request_port()
378 if (!port->membase) { in ulite_request_port()
379 dev_err(port->dev, "Unable to map registers\n"); in ulite_request_port()
380 release_mem_region(port->mapbase, ULITE_REGION); in ulite_request_port()
381 return -EBUSY; in ulite_request_port()
384 pdata->reg_ops = &uartlite_be; in ulite_request_port()
390 pdata->reg_ops = &uartlite_le; in ulite_request_port()
398 port->type = PORT_UARTLITE; in ulite_config_port()
404 return -EINVAL; in ulite_verify_port()
413 ret = pm_runtime_get_sync(port->dev); in ulite_pm()
415 dev_err(port->dev, "Failed to enable clocks\n"); in ulite_pm()
417 pm_runtime_mark_last_busy(port->dev); in ulite_pm()
418 pm_runtime_put_autosuspend(port->dev); in ulite_pm()
464 /* ---------------------------------------------------------------------
475 * When using the Microblaze Debug Module this can take up to 1s in ulite_console_wait_tx()
479 dev_warn(port->dev, in ulite_console_wait_tx()
495 int locked = 1; in ulite_console_write()
498 locked = spin_trylock_irqsave(&port->lock, flags); in ulite_console_write()
500 spin_lock_irqsave(&port->lock, flags); in ulite_console_write()
515 spin_unlock_irqrestore(&port->lock, flags); in ulite_console_write()
526 if (co->index >= 0 && co->index < ULITE_NR_UARTS) in ulite_console_setup()
527 port = ulite_ports + co->index; in ulite_console_setup()
530 if (!port || !port->mapbase) { in ulite_console_setup()
531 pr_debug("console on ttyUL%i not present\n", co->index); in ulite_console_setup()
532 return -ENODEV; in ulite_console_setup()
538 if (!port->membase) { in ulite_console_setup()
540 return -ENODEV; in ulite_console_setup()
555 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
564 * set, or any other issue on the UARTLITE. in early_uartlite_putc()
570 while (--retries && in early_uartlite_putc()
571 (readl(port->membase + ULITE_STATUS) & ULITE_STATUS_TXFULL)) in early_uartlite_putc()
576 writel(c & 0xff, port->membase + ULITE_TX); in early_uartlite_putc()
582 struct earlycon_device *device = console->data; in early_uartlite_write()
583 uart_console_write(&device->port, s, n, early_uartlite_putc); in early_uartlite_write()
589 if (!device->port.membase) in early_uartlite_setup()
590 return -ENODEV; in early_uartlite_setup()
592 device->con->write = early_uartlite_write; in early_uartlite_setup()
595 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
596 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
597 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
603 .driver_name = "uartlite",
613 /* ---------------------------------------------------------------------
617 /** ulite_assign: register a uartlite device with the driver
620 * @id: requested id number. Pass -1 for automatic port assignment
621 * @base: base address of uartlite registers
622 * @irq: irq number for uartlite
623 * @pdata: private data for uartlite
633 /* if id = -1; then scan for a free id and use that */ in ulite_assign()
641 return -EINVAL; in ulite_assign()
647 return -EBUSY; in ulite_assign()
652 spin_lock_init(&port->lock); in ulite_assign()
653 port->fifosize = 16; in ulite_assign()
654 port->regshift = 2; in ulite_assign()
655 port->iotype = UPIO_MEM; in ulite_assign()
656 port->iobase = 1; /* mark port in use */ in ulite_assign()
657 port->mapbase = base; in ulite_assign()
658 port->membase = NULL; in ulite_assign()
659 port->ops = &ulite_ops; in ulite_assign()
660 port->irq = irq; in ulite_assign()
661 port->flags = UPF_BOOT_AUTOCONF; in ulite_assign()
662 port->dev = dev; in ulite_assign()
663 port->type = PORT_UNKNOWN; in ulite_assign()
664 port->line = id; in ulite_assign()
665 port->private_data = pdata; in ulite_assign()
673 port->mapbase = 0; in ulite_assign()
681 /** ulite_release: register a uartlite device with the driver
692 port->mapbase = 0; in ulite_release()
697 * ulite_suspend - Stop the device.
713 * ulite_resume - Resume the device.
731 struct uartlite_data *pdata = port->private_data; in ulite_runtime_suspend()
733 clk_disable(pdata->clk); in ulite_runtime_suspend()
740 struct uartlite_data *pdata = port->private_data; in ulite_runtime_resume()
743 ret = clk_enable(pdata->clk); in ulite_runtime_resume()
751 /* ---------------------------------------------------------------------
764 { .compatible = "xlnx,opb-uartlite-1.00.b", },
765 { .compatible = "xlnx,xps-uartlite-1.00.a", },
776 int id = pdev->id; in ulite_probe()
778 pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data), in ulite_probe()
781 return -ENOMEM; in ulite_probe()
785 struct device_node *np = pdev->dev.of_node; in ulite_probe()
788 prop = "port-number"; in ulite_probe()
790 if (ret && ret != -EINVAL) in ulite_probe()
792 return dev_err_probe(&pdev->dev, ret, in ulite_probe()
795 prop = "current-speed"; in ulite_probe()
796 ret = of_property_read_u32(np, prop, &pdata->baud); in ulite_probe()
800 prop = "xlnx,use-parity"; in ulite_probe()
802 if (ret && ret != -EINVAL) in ulite_probe()
806 prop = "xlnx,odd-parity"; in ulite_probe()
812 pdata->cflags |= PARODD; in ulite_probe()
813 pdata->cflags |= PARENB; in ulite_probe()
817 prop = "xlnx,data-bits"; in ulite_probe()
819 if (ret && ret != -EINVAL) in ulite_probe()
824 pdata->cflags |= CS5; in ulite_probe()
827 pdata->cflags |= CS6; in ulite_probe()
830 pdata->cflags |= CS7; in ulite_probe()
833 pdata->cflags |= CS8; in ulite_probe()
836 return dev_err_probe(&pdev->dev, -EINVAL, in ulite_probe()
840 pdata->baud = 9600; in ulite_probe()
841 pdata->cflags = CS8; in ulite_probe()
846 return -ENODEV; in ulite_probe()
852 pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); in ulite_probe()
853 if (IS_ERR(pdata->clk)) { in ulite_probe()
854 if (PTR_ERR(pdata->clk) != -ENOENT) in ulite_probe()
855 return PTR_ERR(pdata->clk); in ulite_probe()
861 pdata->clk = NULL; in ulite_probe()
864 ret = clk_prepare_enable(pdata->clk); in ulite_probe()
866 dev_err(&pdev->dev, "Failed to prepare clock\n"); in ulite_probe()
870 pm_runtime_use_autosuspend(&pdev->dev); in ulite_probe()
871 pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT); in ulite_probe()
872 pm_runtime_set_active(&pdev->dev); in ulite_probe()
873 pm_runtime_enable(&pdev->dev); in ulite_probe()
875 ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata); in ulite_probe()
877 pm_runtime_mark_last_busy(&pdev->dev); in ulite_probe()
878 pm_runtime_put_autosuspend(&pdev->dev); in ulite_probe()
885 struct uart_port *port = dev_get_drvdata(&pdev->dev); in ulite_remove()
886 struct uartlite_data *pdata = port->private_data; in ulite_remove()
888 clk_disable_unprepare(pdata->clk); in ulite_remove()
889 ulite_release(&pdev->dev); in ulite_remove()
890 pm_runtime_disable(&pdev->dev); in ulite_remove()
891 pm_runtime_set_suspended(&pdev->dev); in ulite_remove()
892 pm_runtime_dont_use_autosuspend(&pdev->dev); in ulite_remove()
897 MODULE_ALIAS("platform:uartlite");
903 .name = "uartlite",
909 /* ---------------------------------------------------------------------
917 pr_debug("uartlite: calling uart_register_driver()\n"); in ulite_init()
922 pr_debug("uartlite: calling platform_driver_register()\n"); in ulite_init()
940 MODULE_DESCRIPTION("Xilinx uartlite serial driver");