Lines Matching +full:additional +full:- +full:devs
1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/dma-mapping.h>
19 #include "xhci-trace.h"
20 #include "xhci-debugfs.h"
38 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc()
44 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc()
45 if (!seg->trbs) { in xhci_segment_alloc()
51 seg->bounce_buf = kzalloc_node(max_packet, flags, in xhci_segment_alloc()
53 if (!seg->bounce_buf) { in xhci_segment_alloc()
54 dma_pool_free(xhci->segment_pool, seg->trbs, dma); in xhci_segment_alloc()
62 seg->trbs[i].link.control = cpu_to_le32(TRB_CYCLE); in xhci_segment_alloc()
64 seg->num = num; in xhci_segment_alloc()
65 seg->dma = dma; in xhci_segment_alloc()
66 seg->next = NULL; in xhci_segment_alloc()
73 if (seg->trbs) { in xhci_segment_free()
74 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); in xhci_segment_free()
75 seg->trbs = NULL; in xhci_segment_free()
77 kfree(seg->bounce_buf); in xhci_segment_free()
86 seg = first->next; in xhci_free_segments_for_ring()
88 struct xhci_segment *next = seg->next; in xhci_free_segments_for_ring()
110 prev->next = next; in xhci_link_segments()
112 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = in xhci_link_segments()
113 cpu_to_le64(next->dma); in xhci_link_segments()
116 val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control); in xhci_link_segments()
121 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); in xhci_link_segments()
141 (ring->type == TYPE_ISOC && in xhci_link_rings()
142 (xhci->quirks & XHCI_AMD_0x96_HOST))); in xhci_link_rings()
144 next = ring->enq_seg->next; in xhci_link_rings()
145 xhci_link_segments(ring->enq_seg, first, ring->type, chain_links); in xhci_link_rings()
146 xhci_link_segments(last, next, ring->type, chain_links); in xhci_link_rings()
147 ring->num_segs += num_segs; in xhci_link_rings()
149 if (ring->type != TYPE_EVENT && ring->enq_seg == ring->last_seg) { in xhci_link_rings()
150 ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control in xhci_link_rings()
152 last->trbs[TRBS_PER_SEGMENT-1].link.control in xhci_link_rings()
154 ring->last_seg = last; in xhci_link_rings()
181 * The radix tree uses an unsigned long as a key pair. On 32-bit systems, an
182 * unsigned long will be 32-bits; on a 64-bit system an unsigned long will be
183 * 64-bits. Since we only request 32-bit DMA addresses, we can use that as the
184 * key on 32-bit or 64-bit systems (it would also be fine if we asked for 64-bit
185 * PCI DMA addresses on a 64-bit system). There might be a problem on 32-bit
186 * extended systems (where the DMA address can be bigger than 32-bits),
187 * if we allow the PCI dma mask to be bigger than 32-bits. So don't do that.
197 key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT); in xhci_insert_segment_mapping()
216 key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT); in xhci_remove_segment_mapping()
243 seg = seg->next; in xhci_update_stream_segment_mapping()
255 seg = seg->next; in xhci_update_stream_segment_mapping()
265 if (WARN_ON_ONCE(ring->trb_address_map == NULL)) in xhci_remove_stream_mapping()
268 seg = ring->first_seg; in xhci_remove_stream_mapping()
270 xhci_remove_segment_mapping(ring->trb_address_map, seg); in xhci_remove_stream_mapping()
271 seg = seg->next; in xhci_remove_stream_mapping()
272 } while (seg != ring->first_seg); in xhci_remove_stream_mapping()
277 return xhci_update_stream_segment_mapping(ring->trb_address_map, ring, in xhci_update_stream_mapping()
278 ring->first_seg, ring->last_seg, mem_flags); in xhci_update_stream_mapping()
289 if (ring->first_seg) { in xhci_ring_free()
290 if (ring->type == TYPE_STREAM) in xhci_ring_free()
292 xhci_free_segments_for_ring(xhci, ring->first_seg); in xhci_ring_free()
302 ring->enqueue = ring->first_seg->trbs; in xhci_initialize_ring_info()
303 ring->enq_seg = ring->first_seg; in xhci_initialize_ring_info()
304 ring->dequeue = ring->enqueue; in xhci_initialize_ring_info()
305 ring->deq_seg = ring->first_seg; in xhci_initialize_ring_info()
313 ring->cycle_state = cycle_state; in xhci_initialize_ring_info()
319 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; in xhci_initialize_ring_info()
336 (xhci->quirks & XHCI_AMD_0x96_HOST))); in xhci_alloc_segments_for_ring()
340 return -ENOMEM; in xhci_alloc_segments_for_ring()
352 next = prev->next; in xhci_alloc_segments_for_ring()
356 return -ENOMEM; in xhci_alloc_segments_for_ring()
382 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_ring_alloc()
388 ring->num_segs = num_segs; in xhci_ring_alloc()
389 ring->bounce_buf_len = max_packet; in xhci_ring_alloc()
390 INIT_LIST_HEAD(&ring->td_list); in xhci_ring_alloc()
391 ring->type = type; in xhci_ring_alloc()
395 ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg, in xhci_ring_alloc()
396 &ring->last_seg, num_segs, cycle_state, type, in xhci_ring_alloc()
404 ring->last_seg->trbs[TRBS_PER_SEGMENT - 1].link.control |= in xhci_ring_alloc()
420 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring); in xhci_free_endpoint_ring()
421 virt_dev->eps[ep_index].ring = NULL; in xhci_free_endpoint_ring()
436 num_new_segs, ring->cycle_state, ring->type, in xhci_ring_expansion()
437 ring->bounce_buf_len, flags); in xhci_ring_expansion()
439 return -ENOMEM; in xhci_ring_expansion()
441 if (ring->type == TYPE_STREAM) in xhci_ring_expansion()
442 ret = xhci_update_stream_segment_mapping(ring->trb_address_map, in xhci_ring_expansion()
447 next = first->next; in xhci_ring_expansion()
460 ring->num_segs); in xhci_ring_expansion()
469 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_container_ctx()
478 ctx->type = type; in xhci_alloc_container_ctx()
479 ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024; in xhci_alloc_container_ctx()
481 ctx->size += CTX_SIZE(xhci->hcc_params); in xhci_alloc_container_ctx()
483 ctx->bytes = dma_pool_zalloc(xhci->device_pool, flags, &ctx->dma); in xhci_alloc_container_ctx()
484 if (!ctx->bytes) { in xhci_alloc_container_ctx()
496 dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma); in xhci_free_container_ctx()
503 if (ctx->type != XHCI_CTX_TYPE_INPUT) in xhci_get_input_control_ctx()
506 return (struct xhci_input_control_ctx *)ctx->bytes; in xhci_get_input_control_ctx()
512 if (ctx->type == XHCI_CTX_TYPE_DEVICE) in xhci_get_slot_ctx()
513 return (struct xhci_slot_ctx *)ctx->bytes; in xhci_get_slot_ctx()
516 (ctx->bytes + CTX_SIZE(xhci->hcc_params)); in xhci_get_slot_ctx()
525 if (ctx->type == XHCI_CTX_TYPE_INPUT) in xhci_get_ep_ctx()
529 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params))); in xhci_get_ep_ctx()
539 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_free_stream_ctx()
545 dma_pool_free(xhci->medium_streams_pool, stream_ctx, dma); in xhci_free_stream_ctx()
547 dma_pool_free(xhci->small_streams_pool, stream_ctx, dma); in xhci_free_stream_ctx()
553 * - how many streams the endpoint supports,
554 * - the maximum primary stream array size the host controller supports,
555 * - and how many streams the device driver asks for.
564 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_stream_ctx()
570 return dma_pool_zalloc(xhci->medium_streams_pool, mem_flags, dma); in xhci_alloc_stream_ctx()
572 return dma_pool_zalloc(xhci->small_streams_pool, mem_flags, dma); in xhci_alloc_stream_ctx()
579 if (ep->ep_state & EP_HAS_STREAMS) in xhci_dma_to_transfer_ring()
580 return radix_tree_lookup(&ep->stream_info->trb_address_map, in xhci_dma_to_transfer_ring()
582 return ep->ring; in xhci_dma_to_transfer_ring()
604 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_stream_info()
608 if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) { in xhci_alloc_stream_info()
612 xhci->cmd_ring_reserved_trbs++; in xhci_alloc_stream_info()
619 stream_info->num_streams = num_streams; in xhci_alloc_stream_info()
620 stream_info->num_stream_ctxs = num_stream_ctxs; in xhci_alloc_stream_info()
623 stream_info->stream_rings = kcalloc_node( in xhci_alloc_stream_info()
626 if (!stream_info->stream_rings) in xhci_alloc_stream_info()
630 stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci, in xhci_alloc_stream_info()
631 num_stream_ctxs, &stream_info->ctx_array_dma, in xhci_alloc_stream_info()
633 if (!stream_info->stream_ctx_array) in xhci_alloc_stream_info()
637 stream_info->free_streams_command = in xhci_alloc_stream_info()
639 if (!stream_info->free_streams_command) in xhci_alloc_stream_info()
642 INIT_RADIX_TREE(&stream_info->trb_address_map, GFP_ATOMIC); in xhci_alloc_stream_info()
650 stream_info->stream_rings[cur_stream] = in xhci_alloc_stream_info()
653 cur_ring = stream_info->stream_rings[cur_stream]; in xhci_alloc_stream_info()
656 cur_ring->stream_id = cur_stream; in xhci_alloc_stream_info()
657 cur_ring->trb_address_map = &stream_info->trb_address_map; in xhci_alloc_stream_info()
659 addr = cur_ring->first_seg->dma | in xhci_alloc_stream_info()
661 cur_ring->cycle_state; in xhci_alloc_stream_info()
662 stream_info->stream_ctx_array[cur_stream].stream_ring = in xhci_alloc_stream_info()
669 stream_info->stream_rings[cur_stream] = NULL; in xhci_alloc_stream_info()
684 cur_ring = stream_info->stream_rings[cur_stream]; in xhci_alloc_stream_info()
687 stream_info->stream_rings[cur_stream] = NULL; in xhci_alloc_stream_info()
690 xhci_free_command(xhci, stream_info->free_streams_command); in xhci_alloc_stream_info()
693 stream_info->num_stream_ctxs, in xhci_alloc_stream_info()
694 stream_info->stream_ctx_array, in xhci_alloc_stream_info()
695 stream_info->ctx_array_dma); in xhci_alloc_stream_info()
697 kfree(stream_info->stream_rings); in xhci_alloc_stream_info()
701 xhci->cmd_ring_reserved_trbs--; in xhci_alloc_stream_info()
717 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2; in xhci_setup_streams_ep_input_ctx()
721 ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK); in xhci_setup_streams_ep_input_ctx()
722 ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams) in xhci_setup_streams_ep_input_ctx()
724 ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma); in xhci_setup_streams_ep_input_ctx()
736 ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA)); in xhci_setup_no_streams_ep_input_ctx()
737 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue); in xhci_setup_no_streams_ep_input_ctx()
738 ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state); in xhci_setup_no_streams_ep_input_ctx()
754 for (cur_stream = 1; cur_stream < stream_info->num_streams; in xhci_free_stream_info()
756 cur_ring = stream_info->stream_rings[cur_stream]; in xhci_free_stream_info()
759 stream_info->stream_rings[cur_stream] = NULL; in xhci_free_stream_info()
762 xhci_free_command(xhci, stream_info->free_streams_command); in xhci_free_stream_info()
763 xhci->cmd_ring_reserved_trbs--; in xhci_free_stream_info()
764 if (stream_info->stream_ctx_array) in xhci_free_stream_info()
766 stream_info->num_stream_ctxs, in xhci_free_stream_info()
767 stream_info->stream_ctx_array, in xhci_free_stream_info()
768 stream_info->ctx_array_dma); in xhci_free_stream_info()
770 kfree(stream_info->stream_rings); in xhci_free_stream_info()
788 if (virt_dev->real_port == 0 || in xhci_free_tt_info()
789 virt_dev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) { in xhci_free_tt_info()
794 tt_list_head = &(xhci->rh_bw[virt_dev->real_port - 1].tts); in xhci_free_tt_info()
796 /* Multi-TT hubs will have more than one entry */ in xhci_free_tt_info()
797 if (tt_info->slot_id == slot_id) { in xhci_free_tt_info()
799 list_del(&tt_info->tt_list); in xhci_free_tt_info()
815 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_tt_info()
817 if (!tt->multi) in xhci_alloc_tt_info()
820 num_ports = hdev->maxchild; in xhci_alloc_tt_info()
829 INIT_LIST_HEAD(&tt_info->tt_list); in xhci_alloc_tt_info()
830 list_add(&tt_info->tt_list, in xhci_alloc_tt_info()
831 &xhci->rh_bw[virt_dev->real_port - 1].tts); in xhci_alloc_tt_info()
832 tt_info->slot_id = virt_dev->udev->slot_id; in xhci_alloc_tt_info()
833 if (tt->multi) in xhci_alloc_tt_info()
834 tt_info->ttport = i+1; in xhci_alloc_tt_info()
835 bw_table = &tt_info->bw_table; in xhci_alloc_tt_info()
837 INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints); in xhci_alloc_tt_info()
842 xhci_free_tt_info(xhci, virt_dev, virt_dev->udev->slot_id); in xhci_alloc_tt_info()
843 return -ENOMEM; in xhci_alloc_tt_info()
848 * Should be called with xhci->lock held if there is any chance the TT lists
859 if (slot_id == 0 || !xhci->devs[slot_id]) in xhci_free_virt_device()
862 dev = xhci->devs[slot_id]; in xhci_free_virt_device()
864 xhci->dcbaa->dev_context_ptrs[slot_id] = 0; in xhci_free_virt_device()
870 if (dev->tt_info) in xhci_free_virt_device()
871 old_active_eps = dev->tt_info->active_eps; in xhci_free_virt_device()
874 if (dev->eps[i].ring) in xhci_free_virt_device()
875 xhci_ring_free(xhci, dev->eps[i].ring); in xhci_free_virt_device()
876 if (dev->eps[i].stream_info) in xhci_free_virt_device()
878 dev->eps[i].stream_info); in xhci_free_virt_device()
887 if (!list_empty(&dev->eps[i].bw_endpoint_list)) { in xhci_free_virt_device()
888 list_del_init(&dev->eps[i].bw_endpoint_list); in xhci_free_virt_device()
898 if (dev->in_ctx) in xhci_free_virt_device()
899 xhci_free_container_ctx(xhci, dev->in_ctx); in xhci_free_virt_device()
900 if (dev->out_ctx) in xhci_free_virt_device()
901 xhci_free_container_ctx(xhci, dev->out_ctx); in xhci_free_virt_device()
903 if (dev->udev && dev->udev->slot_id) in xhci_free_virt_device()
904 dev->udev->slot_id = 0; in xhci_free_virt_device()
905 kfree(xhci->devs[slot_id]); in xhci_free_virt_device()
906 xhci->devs[slot_id] = NULL; in xhci_free_virt_device()
913 * We can't rely on udev at this point to find child-parent relationships.
922 vdev = xhci->devs[slot_id]; in xhci_free_virt_devices_depth_first()
926 if (vdev->real_port == 0 || in xhci_free_virt_devices_depth_first()
927 vdev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) { in xhci_free_virt_devices_depth_first()
928 xhci_dbg(xhci, "Bad vdev->real_port.\n"); in xhci_free_virt_devices_depth_first()
932 tt_list_head = &(xhci->rh_bw[vdev->real_port - 1].tts); in xhci_free_virt_devices_depth_first()
935 if (tt_info->slot_id == slot_id) { in xhci_free_virt_devices_depth_first()
937 for (i = 1; i < HCS_MAX_SLOTS(xhci->hcs_params1); i++) { in xhci_free_virt_devices_depth_first()
938 vdev = xhci->devs[i]; in xhci_free_virt_devices_depth_first()
939 if (vdev && (vdev->tt_info == tt_info)) in xhci_free_virt_devices_depth_first()
958 if (slot_id == 0 || xhci->devs[slot_id]) { in xhci_alloc_virt_device()
967 dev->slot_id = slot_id; in xhci_alloc_virt_device()
970 dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags); in xhci_alloc_virt_device()
971 if (!dev->out_ctx) in xhci_alloc_virt_device()
974 xhci_dbg(xhci, "Slot %d output ctx = 0x%pad (dma)\n", slot_id, &dev->out_ctx->dma); in xhci_alloc_virt_device()
977 dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags); in xhci_alloc_virt_device()
978 if (!dev->in_ctx) in xhci_alloc_virt_device()
981 xhci_dbg(xhci, "Slot %d input ctx = 0x%pad (dma)\n", slot_id, &dev->in_ctx->dma); in xhci_alloc_virt_device()
985 dev->eps[i].ep_index = i; in xhci_alloc_virt_device()
986 dev->eps[i].vdev = dev; in xhci_alloc_virt_device()
987 dev->eps[i].xhci = xhci; in xhci_alloc_virt_device()
988 INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list); in xhci_alloc_virt_device()
989 INIT_LIST_HEAD(&dev->eps[i].bw_endpoint_list); in xhci_alloc_virt_device()
993 dev->eps[0].ring = xhci_ring_alloc(xhci, 2, 1, TYPE_CTRL, 0, flags); in xhci_alloc_virt_device()
994 if (!dev->eps[0].ring) in xhci_alloc_virt_device()
997 dev->udev = udev; in xhci_alloc_virt_device()
1000 xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma); in xhci_alloc_virt_device()
1003 &xhci->dcbaa->dev_context_ptrs[slot_id], in xhci_alloc_virt_device()
1004 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); in xhci_alloc_virt_device()
1008 xhci->devs[slot_id] = dev; in xhci_alloc_virt_device()
1013 if (dev->in_ctx) in xhci_alloc_virt_device()
1014 xhci_free_container_ctx(xhci, dev->in_ctx); in xhci_alloc_virt_device()
1015 if (dev->out_ctx) in xhci_alloc_virt_device()
1016 xhci_free_container_ctx(xhci, dev->out_ctx); in xhci_alloc_virt_device()
1029 virt_dev = xhci->devs[udev->slot_id]; in xhci_copy_ep0_dequeue_into_input_ctx()
1030 ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0); in xhci_copy_ep0_dequeue_into_input_ctx()
1031 ep_ring = virt_dev->eps[0].ring; in xhci_copy_ep0_dequeue_into_input_ctx()
1039 ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg, in xhci_copy_ep0_dequeue_into_input_ctx()
1040 ep_ring->enqueue) in xhci_copy_ep0_dequeue_into_input_ctx()
1041 | ep_ring->cycle_state); in xhci_copy_ep0_dequeue_into_input_ctx()
1060 if (udev->speed >= USB_SPEED_SUPER) in xhci_find_real_port_number()
1063 hcd = xhci->main_hcd; in xhci_find_real_port_number()
1065 for (top_dev = udev; top_dev->parent && top_dev->parent->parent; in xhci_find_real_port_number()
1066 top_dev = top_dev->parent) in xhci_find_real_port_number()
1069 return xhci_find_raw_port_number(hcd, top_dev->portnum); in xhci_find_real_port_number()
1082 dev = xhci->devs[udev->slot_id]; in xhci_setup_addressable_virt_dev()
1084 if (udev->slot_id == 0 || !dev) { in xhci_setup_addressable_virt_dev()
1086 udev->slot_id); in xhci_setup_addressable_virt_dev()
1087 return -EINVAL; in xhci_setup_addressable_virt_dev()
1089 ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0); in xhci_setup_addressable_virt_dev()
1090 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); in xhci_setup_addressable_virt_dev()
1092 /* 3) Only the control endpoint is valid - one endpoint context */ in xhci_setup_addressable_virt_dev()
1093 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route); in xhci_setup_addressable_virt_dev()
1094 switch (udev->speed) { in xhci_setup_addressable_virt_dev()
1096 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SSP); in xhci_setup_addressable_virt_dev()
1100 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); in xhci_setup_addressable_virt_dev()
1104 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS); in xhci_setup_addressable_virt_dev()
1107 /* USB core guesses at a 64-byte max packet first for FS devices */ in xhci_setup_addressable_virt_dev()
1109 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS); in xhci_setup_addressable_virt_dev()
1113 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); in xhci_setup_addressable_virt_dev()
1118 return -EINVAL; in xhci_setup_addressable_virt_dev()
1123 return -EINVAL; in xhci_setup_addressable_virt_dev()
1124 slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num)); in xhci_setup_addressable_virt_dev()
1126 for (top_dev = udev; top_dev->parent && top_dev->parent->parent; in xhci_setup_addressable_virt_dev()
1127 top_dev = top_dev->parent) in xhci_setup_addressable_virt_dev()
1129 dev->fake_port = top_dev->portnum; in xhci_setup_addressable_virt_dev()
1130 dev->real_port = port_num; in xhci_setup_addressable_virt_dev()
1132 xhci_dbg(xhci, "Set fake root hub portnum to %d\n", dev->fake_port); in xhci_setup_addressable_virt_dev()
1140 if (!udev->tt || !udev->tt->hub->parent) { in xhci_setup_addressable_virt_dev()
1141 dev->bw_table = &xhci->rh_bw[port_num - 1].bw_table; in xhci_setup_addressable_virt_dev()
1146 rh_bw = &xhci->rh_bw[port_num - 1]; in xhci_setup_addressable_virt_dev()
1148 list_for_each_entry(tt_bw, &rh_bw->tts, tt_list) { in xhci_setup_addressable_virt_dev()
1149 if (tt_bw->slot_id != udev->tt->hub->slot_id) in xhci_setup_addressable_virt_dev()
1152 if (!dev->udev->tt->multi || in xhci_setup_addressable_virt_dev()
1153 (udev->tt->multi && in xhci_setup_addressable_virt_dev()
1154 tt_bw->ttport == dev->udev->ttport)) { in xhci_setup_addressable_virt_dev()
1155 dev->bw_table = &tt_bw->bw_table; in xhci_setup_addressable_virt_dev()
1156 dev->tt_info = tt_bw; in xhci_setup_addressable_virt_dev()
1160 if (!dev->tt_info) in xhci_setup_addressable_virt_dev()
1165 if (udev->tt && udev->tt->hub->parent) { in xhci_setup_addressable_virt_dev()
1166 slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id | in xhci_setup_addressable_virt_dev()
1167 (udev->ttport << 8)); in xhci_setup_addressable_virt_dev()
1168 if (udev->tt->multi) in xhci_setup_addressable_virt_dev()
1169 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_setup_addressable_virt_dev()
1171 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); in xhci_setup_addressable_virt_dev()
1172 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); in xhci_setup_addressable_virt_dev()
1174 /* Step 4 - ring already allocated */ in xhci_setup_addressable_virt_dev()
1176 ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP)); in xhci_setup_addressable_virt_dev()
1179 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3) | in xhci_setup_addressable_virt_dev()
1182 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma | in xhci_setup_addressable_virt_dev()
1183 dev->eps[0].ring->cycle_state); in xhci_setup_addressable_virt_dev()
1193 * Convert interval expressed as 2^(bInterval - 1) == interval into
1202 interval = clamp_val(ep->desc.bInterval, 1, 16) - 1; in xhci_parse_exponent_interval()
1203 if (interval != ep->desc.bInterval - 1) in xhci_parse_exponent_interval()
1204 dev_warn(&udev->dev, in xhci_parse_exponent_interval()
1205 "ep %#x - rounding interval to %d %sframes\n", in xhci_parse_exponent_interval()
1206 ep->desc.bEndpointAddress, in xhci_parse_exponent_interval()
1208 udev->speed == USB_SPEED_FULL ? "" : "micro"); in xhci_parse_exponent_interval()
1210 if (udev->speed == USB_SPEED_FULL) { in xhci_parse_exponent_interval()
1223 * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
1232 interval = fls(desc_interval) - 1; in xhci_microframes_to_exponent()
1235 dev_dbg(&udev->dev, in xhci_microframes_to_exponent()
1236 "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n", in xhci_microframes_to_exponent()
1237 ep->desc.bEndpointAddress, in xhci_microframes_to_exponent()
1247 if (ep->desc.bInterval == 0) in xhci_parse_microframe_interval()
1250 ep->desc.bInterval, 0, 15); in xhci_parse_microframe_interval()
1258 ep->desc.bInterval * 8, 3, 10); in xhci_parse_frame_interval()
1274 switch (udev->speed) { in xhci_get_endpoint_interval()
1277 if (usb_endpoint_xfer_control(&ep->desc) || in xhci_get_endpoint_interval()
1278 usb_endpoint_xfer_bulk(&ep->desc)) { in xhci_get_endpoint_interval()
1286 if (usb_endpoint_xfer_int(&ep->desc) || in xhci_get_endpoint_interval()
1287 usb_endpoint_xfer_isoc(&ep->desc)) { in xhci_get_endpoint_interval()
1293 if (usb_endpoint_xfer_isoc(&ep->desc)) { in xhci_get_endpoint_interval()
1305 if (usb_endpoint_xfer_int(&ep->desc) || in xhci_get_endpoint_interval()
1306 usb_endpoint_xfer_isoc(&ep->desc)) { in xhci_get_endpoint_interval()
1319 * High speed endpoint descriptors can define "the number of additional
1326 if (udev->speed < USB_SPEED_SUPER || in xhci_get_endpoint_mult()
1327 !usb_endpoint_xfer_isoc(&ep->desc)) in xhci_get_endpoint_mult()
1329 return ep->ss_ep_comp.bmAttributes; in xhci_get_endpoint_mult()
1336 if (udev->speed >= USB_SPEED_SUPER) in xhci_get_endpoint_max_burst()
1337 return ep->ss_ep_comp.bMaxBurst; in xhci_get_endpoint_max_burst()
1339 if (udev->speed == USB_SPEED_HIGH && in xhci_get_endpoint_max_burst()
1340 (usb_endpoint_xfer_isoc(&ep->desc) || in xhci_get_endpoint_max_burst()
1341 usb_endpoint_xfer_int(&ep->desc))) in xhci_get_endpoint_max_burst()
1342 return usb_endpoint_maxp_mult(&ep->desc) - 1; in xhci_get_endpoint_max_burst()
1351 in = usb_endpoint_dir_in(&ep->desc); in xhci_get_endpoint_type()
1353 switch (usb_endpoint_type(&ep->desc)) { in xhci_get_endpoint_type()
1377 if (usb_endpoint_xfer_control(&ep->desc) || in xhci_get_max_esit_payload()
1378 usb_endpoint_xfer_bulk(&ep->desc)) in xhci_get_max_esit_payload()
1382 if ((udev->speed >= USB_SPEED_SUPER_PLUS) && in xhci_get_max_esit_payload()
1383 USB_SS_SSP_ISOC_COMP(ep->ss_ep_comp.bmAttributes)) in xhci_get_max_esit_payload()
1384 return le32_to_cpu(ep->ssp_isoc_ep_comp.dwBytesPerInterval); in xhci_get_max_esit_payload()
1387 if (udev->speed >= USB_SPEED_SUPER) in xhci_get_max_esit_payload()
1388 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval); in xhci_get_max_esit_payload()
1390 max_packet = usb_endpoint_maxp(&ep->desc); in xhci_get_max_esit_payload()
1391 max_burst = usb_endpoint_maxp_mult(&ep->desc); in xhci_get_max_esit_payload()
1418 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_endpoint_init()
1419 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_endpoint_init()
1423 return -EINVAL; in xhci_endpoint_init()
1425 ring_type = usb_endpoint_type(&ep->desc); in xhci_endpoint_init()
1437 if (usb_endpoint_xfer_int(&ep->desc) || in xhci_endpoint_init()
1438 usb_endpoint_xfer_isoc(&ep->desc)) { in xhci_endpoint_init()
1439 if ((xhci->quirks & XHCI_LIMIT_ENDPOINT_INTERVAL_9) && in xhci_endpoint_init()
1443 if ((xhci->quirks & XHCI_LIMIT_ENDPOINT_INTERVAL_7) && in xhci_endpoint_init()
1444 udev->speed >= USB_SPEED_HIGH && in xhci_endpoint_init()
1451 max_packet = usb_endpoint_maxp(&ep->desc); in xhci_endpoint_init()
1458 if (!usb_endpoint_xfer_isoc(&ep->desc)) in xhci_endpoint_init()
1461 if (usb_endpoint_xfer_bulk(&ep->desc)) { in xhci_endpoint_init()
1462 if (udev->speed == USB_SPEED_HIGH) in xhci_endpoint_init()
1464 if (udev->speed == USB_SPEED_FULL) { in xhci_endpoint_init()
1470 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100) in xhci_endpoint_init()
1473 if ((xhci->hci_version > 0x100) && HCC2_LEC(xhci->hcc_params2)) in xhci_endpoint_init()
1477 virt_dev->eps[ep_index].new_ring = in xhci_endpoint_init()
1479 if (!virt_dev->eps[ep_index].new_ring) in xhci_endpoint_init()
1480 return -ENOMEM; in xhci_endpoint_init()
1482 virt_dev->eps[ep_index].skip = false; in xhci_endpoint_init()
1483 ep_ring = virt_dev->eps[ep_index].new_ring; in xhci_endpoint_init()
1486 ep_ctx->ep_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) | in xhci_endpoint_init()
1489 ep_ctx->ep_info2 = cpu_to_le32(EP_TYPE(endpoint_type) | in xhci_endpoint_init()
1493 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | in xhci_endpoint_init()
1494 ep_ring->cycle_state); in xhci_endpoint_init()
1496 ep_ctx->tx_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) | in xhci_endpoint_init()
1509 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_endpoint_zero()
1510 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_endpoint_zero()
1512 ep_ctx->ep_info = 0; in xhci_endpoint_zero()
1513 ep_ctx->ep_info2 = 0; in xhci_endpoint_zero()
1514 ep_ctx->deq = 0; in xhci_endpoint_zero()
1515 ep_ctx->tx_info = 0; in xhci_endpoint_zero()
1523 bw_info->ep_interval = 0; in xhci_clear_endpoint_bw_info()
1524 bw_info->mult = 0; in xhci_clear_endpoint_bw_info()
1525 bw_info->num_packets = 0; in xhci_clear_endpoint_bw_info()
1526 bw_info->max_packet_size = 0; in xhci_clear_endpoint_bw_info()
1527 bw_info->type = 0; in xhci_clear_endpoint_bw_info()
1528 bw_info->max_esit_payload = 0; in xhci_clear_endpoint_bw_info()
1542 bw_info = &virt_dev->eps[i].bw_info; in xhci_update_bw_info()
1545 * unconditionally clearing the bandwidth info for non-periodic in xhci_update_bw_info()
1557 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2)); in xhci_update_bw_info()
1559 /* Ignore non-periodic endpoints */ in xhci_update_bw_info()
1566 bw_info->ep_interval = CTX_TO_EP_INTERVAL( in xhci_update_bw_info()
1567 le32_to_cpu(ep_ctx->ep_info)); in xhci_update_bw_info()
1568 /* Number of packets and mult are zero-based in the in xhci_update_bw_info()
1569 * input context, but we want one-based for the in xhci_update_bw_info()
1572 bw_info->mult = CTX_TO_EP_MULT( in xhci_update_bw_info()
1573 le32_to_cpu(ep_ctx->ep_info)) + 1; in xhci_update_bw_info()
1574 bw_info->num_packets = CTX_TO_MAX_BURST( in xhci_update_bw_info()
1575 le32_to_cpu(ep_ctx->ep_info2)) + 1; in xhci_update_bw_info()
1576 bw_info->max_packet_size = MAX_PACKET_DECODED( in xhci_update_bw_info()
1577 le32_to_cpu(ep_ctx->ep_info2)); in xhci_update_bw_info()
1578 bw_info->type = ep_type; in xhci_update_bw_info()
1579 bw_info->max_esit_payload = CTX_TO_MAX_ESIT_PAYLOAD( in xhci_update_bw_info()
1580 le32_to_cpu(ep_ctx->tx_info)); in xhci_update_bw_info()
1600 in_ep_ctx->ep_info = out_ep_ctx->ep_info; in xhci_endpoint_copy()
1601 in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2; in xhci_endpoint_copy()
1602 in_ep_ctx->deq = out_ep_ctx->deq; in xhci_endpoint_copy()
1603 in_ep_ctx->tx_info = out_ep_ctx->tx_info; in xhci_endpoint_copy()
1604 if (xhci->quirks & XHCI_MTK_HOST) { in xhci_endpoint_copy()
1605 in_ep_ctx->reserved[0] = out_ep_ctx->reserved[0]; in xhci_endpoint_copy()
1606 in_ep_ctx->reserved[1] = out_ep_ctx->reserved[1]; in xhci_endpoint_copy()
1625 in_slot_ctx->dev_info = out_slot_ctx->dev_info; in xhci_slot_copy()
1626 in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2; in xhci_slot_copy()
1627 in_slot_ctx->tt_info = out_slot_ctx->tt_info; in xhci_slot_copy()
1628 in_slot_ctx->dev_state = out_slot_ctx->dev_state; in xhci_slot_copy()
1635 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in scratchpad_alloc()
1636 int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); in scratchpad_alloc()
1644 xhci->scratchpad = kzalloc_node(sizeof(*xhci->scratchpad), flags, in scratchpad_alloc()
1646 if (!xhci->scratchpad) in scratchpad_alloc()
1649 xhci->scratchpad->sp_array = dma_alloc_coherent(dev, in scratchpad_alloc()
1651 &xhci->scratchpad->sp_dma, flags); in scratchpad_alloc()
1652 if (!xhci->scratchpad->sp_array) in scratchpad_alloc()
1655 xhci->scratchpad->sp_buffers = kcalloc_node(num_sp, sizeof(void *), in scratchpad_alloc()
1657 if (!xhci->scratchpad->sp_buffers) in scratchpad_alloc()
1660 xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma); in scratchpad_alloc()
1663 void *buf = dma_alloc_coherent(dev, xhci->page_size, &dma, in scratchpad_alloc()
1668 xhci->scratchpad->sp_array[i] = dma; in scratchpad_alloc()
1669 xhci->scratchpad->sp_buffers[i] = buf; in scratchpad_alloc()
1675 while (i--) in scratchpad_alloc()
1676 dma_free_coherent(dev, xhci->page_size, in scratchpad_alloc()
1677 xhci->scratchpad->sp_buffers[i], in scratchpad_alloc()
1678 xhci->scratchpad->sp_array[i]); in scratchpad_alloc()
1680 kfree(xhci->scratchpad->sp_buffers); in scratchpad_alloc()
1684 xhci->scratchpad->sp_array, in scratchpad_alloc()
1685 xhci->scratchpad->sp_dma); in scratchpad_alloc()
1688 kfree(xhci->scratchpad); in scratchpad_alloc()
1689 xhci->scratchpad = NULL; in scratchpad_alloc()
1692 return -ENOMEM; in scratchpad_alloc()
1699 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in scratchpad_free()
1701 if (!xhci->scratchpad) in scratchpad_free()
1704 num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); in scratchpad_free()
1707 dma_free_coherent(dev, xhci->page_size, in scratchpad_free()
1708 xhci->scratchpad->sp_buffers[i], in scratchpad_free()
1709 xhci->scratchpad->sp_array[i]); in scratchpad_free()
1711 kfree(xhci->scratchpad->sp_buffers); in scratchpad_free()
1713 xhci->scratchpad->sp_array, in scratchpad_free()
1714 xhci->scratchpad->sp_dma); in scratchpad_free()
1715 kfree(xhci->scratchpad); in scratchpad_free()
1716 xhci->scratchpad = NULL; in scratchpad_free()
1723 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_command()
1730 command->completion = in xhci_alloc_command()
1733 if (!command->completion) { in xhci_alloc_command()
1737 init_completion(command->completion); in xhci_alloc_command()
1740 command->status = 0; in xhci_alloc_command()
1742 command->timeout_ms = XHCI_CMD_DEFAULT_TIMEOUT; in xhci_alloc_command()
1743 INIT_LIST_HEAD(&command->cmd_list); in xhci_alloc_command()
1756 command->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, in xhci_alloc_command_with_ctx()
1758 if (!command->in_ctx) { in xhci_alloc_command_with_ctx()
1759 kfree(command->completion); in xhci_alloc_command_with_ctx()
1775 command->in_ctx); in xhci_free_command()
1776 kfree(command->completion); in xhci_free_command()
1790 size = size_mul(sizeof(struct xhci_erst_entry), evt_ring->num_segs); in xhci_alloc_erst()
1791 erst->entries = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev, in xhci_alloc_erst()
1792 size, &erst->erst_dma_addr, flags); in xhci_alloc_erst()
1793 if (!erst->entries) in xhci_alloc_erst()
1794 return -ENOMEM; in xhci_alloc_erst()
1796 erst->num_entries = evt_ring->num_segs; in xhci_alloc_erst()
1798 seg = evt_ring->first_seg; in xhci_alloc_erst()
1799 for (val = 0; val < evt_ring->num_segs; val++) { in xhci_alloc_erst()
1800 entry = &erst->entries[val]; in xhci_alloc_erst()
1801 entry->seg_addr = cpu_to_le64(seg->dma); in xhci_alloc_erst()
1802 entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); in xhci_alloc_erst()
1803 entry->rsvd = 0; in xhci_alloc_erst()
1804 seg = seg->next; in xhci_alloc_erst()
1823 if (ir->ir_set) { in xhci_remove_interrupter()
1824 tmp = readl(&ir->ir_set->erst_size); in xhci_remove_interrupter()
1826 writel(tmp, &ir->ir_set->erst_size); in xhci_remove_interrupter()
1828 xhci_write_64(xhci, ERST_EHB, &ir->ir_set->erst_dequeue); in xhci_remove_interrupter()
1835 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_free_interrupter()
1841 erst_size = sizeof(struct xhci_erst_entry) * ir->erst.num_entries; in xhci_free_interrupter()
1842 if (ir->erst.entries) in xhci_free_interrupter()
1844 ir->erst.entries, in xhci_free_interrupter()
1845 ir->erst.erst_dma_addr); in xhci_free_interrupter()
1846 ir->erst.entries = NULL; in xhci_free_interrupter()
1849 if (ir->event_ring) in xhci_free_interrupter()
1850 xhci_ring_free(xhci, ir->event_ring); in xhci_free_interrupter()
1852 ir->event_ring = NULL; in xhci_free_interrupter()
1862 spin_lock_irq(&xhci->lock); in xhci_remove_secondary_interrupter()
1865 if (!ir || !ir->intr_num || ir->intr_num >= xhci->max_interrupters) { in xhci_remove_secondary_interrupter()
1867 spin_unlock_irq(&xhci->lock); in xhci_remove_secondary_interrupter()
1871 intr_num = ir->intr_num; in xhci_remove_secondary_interrupter()
1874 xhci->interrupters[intr_num] = NULL; in xhci_remove_secondary_interrupter()
1876 spin_unlock_irq(&xhci->lock); in xhci_remove_secondary_interrupter()
1884 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_mem_cleanup()
1887 cancel_delayed_work_sync(&xhci->cmd_timer); in xhci_mem_cleanup()
1889 for (i = 0; xhci->interrupters && i < xhci->max_interrupters; i++) { in xhci_mem_cleanup()
1890 if (xhci->interrupters[i]) { in xhci_mem_cleanup()
1891 xhci_remove_interrupter(xhci, xhci->interrupters[i]); in xhci_mem_cleanup()
1892 xhci_free_interrupter(xhci, xhci->interrupters[i]); in xhci_mem_cleanup()
1893 xhci->interrupters[i] = NULL; in xhci_mem_cleanup()
1898 if (xhci->cmd_ring) in xhci_mem_cleanup()
1899 xhci_ring_free(xhci, xhci->cmd_ring); in xhci_mem_cleanup()
1900 xhci->cmd_ring = NULL; in xhci_mem_cleanup()
1904 num_ports = HCS_MAX_PORTS(xhci->hcs_params1); in xhci_mem_cleanup()
1905 for (i = 0; i < num_ports && xhci->rh_bw; i++) { in xhci_mem_cleanup()
1906 struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table; in xhci_mem_cleanup()
1908 struct list_head *ep = &bwt->interval_bw[j].endpoints; in xhci_mem_cleanup()
1910 list_del_init(ep->next); in xhci_mem_cleanup()
1914 for (i = HCS_MAX_SLOTS(xhci->hcs_params1); i > 0; i--) in xhci_mem_cleanup()
1917 dma_pool_destroy(xhci->segment_pool); in xhci_mem_cleanup()
1918 xhci->segment_pool = NULL; in xhci_mem_cleanup()
1921 dma_pool_destroy(xhci->device_pool); in xhci_mem_cleanup()
1922 xhci->device_pool = NULL; in xhci_mem_cleanup()
1925 dma_pool_destroy(xhci->small_streams_pool); in xhci_mem_cleanup()
1926 xhci->small_streams_pool = NULL; in xhci_mem_cleanup()
1930 dma_pool_destroy(xhci->medium_streams_pool); in xhci_mem_cleanup()
1931 xhci->medium_streams_pool = NULL; in xhci_mem_cleanup()
1935 if (xhci->dcbaa) in xhci_mem_cleanup()
1936 dma_free_coherent(dev, sizeof(*xhci->dcbaa), in xhci_mem_cleanup()
1937 xhci->dcbaa, xhci->dcbaa->dma); in xhci_mem_cleanup()
1938 xhci->dcbaa = NULL; in xhci_mem_cleanup()
1942 if (!xhci->rh_bw) in xhci_mem_cleanup()
1947 list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) { in xhci_mem_cleanup()
1948 list_del(&tt->tt_list); in xhci_mem_cleanup()
1954 xhci->cmd_ring_reserved_trbs = 0; in xhci_mem_cleanup()
1955 xhci->usb2_rhub.num_ports = 0; in xhci_mem_cleanup()
1956 xhci->usb3_rhub.num_ports = 0; in xhci_mem_cleanup()
1957 xhci->num_active_eps = 0; in xhci_mem_cleanup()
1958 kfree(xhci->usb2_rhub.ports); in xhci_mem_cleanup()
1959 kfree(xhci->usb3_rhub.ports); in xhci_mem_cleanup()
1960 kfree(xhci->hw_ports); in xhci_mem_cleanup()
1961 kfree(xhci->rh_bw); in xhci_mem_cleanup()
1962 kfree(xhci->ext_caps); in xhci_mem_cleanup()
1963 for (i = 0; i < xhci->num_port_caps; i++) in xhci_mem_cleanup()
1964 kfree(xhci->port_caps[i].psi); in xhci_mem_cleanup()
1965 kfree(xhci->port_caps); in xhci_mem_cleanup()
1966 kfree(xhci->interrupters); in xhci_mem_cleanup()
1967 xhci->num_port_caps = 0; in xhci_mem_cleanup()
1969 xhci->usb2_rhub.ports = NULL; in xhci_mem_cleanup()
1970 xhci->usb3_rhub.ports = NULL; in xhci_mem_cleanup()
1971 xhci->hw_ports = NULL; in xhci_mem_cleanup()
1972 xhci->rh_bw = NULL; in xhci_mem_cleanup()
1973 xhci->ext_caps = NULL; in xhci_mem_cleanup()
1974 xhci->port_caps = NULL; in xhci_mem_cleanup()
1975 xhci->interrupters = NULL; in xhci_mem_cleanup()
1977 xhci->page_size = 0; in xhci_mem_cleanup()
1978 xhci->page_shift = 0; in xhci_mem_cleanup()
1979 xhci->usb2_rhub.bus_state.bus_suspended = 0; in xhci_mem_cleanup()
1980 xhci->usb3_rhub.bus_state.bus_suspended = 0; in xhci_mem_cleanup()
1987 deq = xhci_trb_virt_to_dma(ir->event_ring->deq_seg, in xhci_set_hc_event_deq()
1988 ir->event_ring->dequeue); in xhci_set_hc_event_deq()
1998 &ir->ir_set->erst_dequeue); in xhci_set_hc_event_deq()
2008 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_add_in_port()
2016 rhub = &xhci->usb3_rhub; in xhci_add_in_port()
2018 * Some hosts incorrectly use sub-minor version for minor in xhci_add_in_port()
2030 if (xhci->quirks & XHCI_ZHAOXIN_HOST) { in xhci_add_in_port()
2036 rhub = &xhci->usb2_rhub; in xhci_add_in_port()
2052 if (port_offset == 0 || (port_offset + port_count - 1) > num_ports) in xhci_add_in_port()
2056 port_cap = &xhci->port_caps[xhci->num_port_caps++]; in xhci_add_in_port()
2057 if (xhci->num_port_caps > max_caps) in xhci_add_in_port()
2060 port_cap->psi_count = XHCI_EXT_PORT_PSIC(temp); in xhci_add_in_port()
2062 if (port_cap->psi_count) { in xhci_add_in_port()
2063 port_cap->psi = kcalloc_node(port_cap->psi_count, in xhci_add_in_port()
2064 sizeof(*port_cap->psi), in xhci_add_in_port()
2066 if (!port_cap->psi) in xhci_add_in_port()
2067 port_cap->psi_count = 0; in xhci_add_in_port()
2069 port_cap->psi_uid_count++; in xhci_add_in_port()
2070 for (i = 0; i < port_cap->psi_count; i++) { in xhci_add_in_port()
2071 port_cap->psi[i] = readl(addr + 4 + i); in xhci_add_in_port()
2076 if (i && (XHCI_EXT_PORT_PSIV(port_cap->psi[i]) != in xhci_add_in_port()
2077 XHCI_EXT_PORT_PSIV(port_cap->psi[i - 1]))) in xhci_add_in_port()
2078 port_cap->psi_uid_count++; in xhci_add_in_port()
2080 if (xhci->quirks & XHCI_ZHAOXIN_HOST && in xhci_add_in_port()
2082 XHCI_EXT_PORT_PSIV(port_cap->psi[i]) >= 5) in xhci_add_in_port()
2086 XHCI_EXT_PORT_PSIV(port_cap->psi[i]), in xhci_add_in_port()
2087 XHCI_EXT_PORT_PSIE(port_cap->psi[i]), in xhci_add_in_port()
2088 XHCI_EXT_PORT_PLT(port_cap->psi[i]), in xhci_add_in_port()
2089 XHCI_EXT_PORT_PFD(port_cap->psi[i]), in xhci_add_in_port()
2090 XHCI_EXT_PORT_LP(port_cap->psi[i]), in xhci_add_in_port()
2091 XHCI_EXT_PORT_PSIM(port_cap->psi[i])); in xhci_add_in_port()
2095 rhub->maj_rev = major_revision; in xhci_add_in_port()
2097 if (rhub->min_rev < minor_revision) in xhci_add_in_port()
2098 rhub->min_rev = minor_revision; in xhci_add_in_port()
2100 port_cap->maj_rev = major_revision; in xhci_add_in_port()
2101 port_cap->min_rev = minor_revision; in xhci_add_in_port()
2104 if (major_revision < 0x03 && xhci->num_ext_caps < max_caps) in xhci_add_in_port()
2105 xhci->ext_caps[xhci->num_ext_caps++] = temp; in xhci_add_in_port()
2107 if ((xhci->hci_version >= 0x100) && (major_revision != 0x03) && in xhci_add_in_port()
2111 xhci->hw_lpm_support = 1; in xhci_add_in_port()
2114 port_offset--; in xhci_add_in_port()
2116 struct xhci_port *hw_port = &xhci->hw_ports[i]; in xhci_add_in_port()
2118 if (hw_port->rhub) { in xhci_add_in_port()
2121 hw_port->rhub->maj_rev, major_revision); in xhci_add_in_port()
2125 if (hw_port->rhub != rhub && in xhci_add_in_port()
2126 hw_port->hcd_portnum != DUPLICATE_ENTRY) { in xhci_add_in_port()
2127 hw_port->rhub->num_ports--; in xhci_add_in_port()
2128 hw_port->hcd_portnum = DUPLICATE_ENTRY; in xhci_add_in_port()
2132 hw_port->rhub = rhub; in xhci_add_in_port()
2133 hw_port->port_cap = port_cap; in xhci_add_in_port()
2134 rhub->num_ports++; in xhci_add_in_port()
2144 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_create_rhub_port_array()
2146 if (!rhub->num_ports) in xhci_create_rhub_port_array()
2148 rhub->ports = kcalloc_node(rhub->num_ports, sizeof(*rhub->ports), in xhci_create_rhub_port_array()
2150 if (!rhub->ports) in xhci_create_rhub_port_array()
2153 for (i = 0; i < HCS_MAX_PORTS(xhci->hcs_params1); i++) { in xhci_create_rhub_port_array()
2154 if (xhci->hw_ports[i].rhub != rhub || in xhci_create_rhub_port_array()
2155 xhci->hw_ports[i].hcd_portnum == DUPLICATE_ENTRY) in xhci_create_rhub_port_array()
2157 xhci->hw_ports[i].hcd_portnum = port_index; in xhci_create_rhub_port_array()
2158 rhub->ports[port_index] = &xhci->hw_ports[i]; in xhci_create_rhub_port_array()
2160 if (port_index == rhub->num_ports) in xhci_create_rhub_port_array()
2180 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_setup_port_arrays()
2182 num_ports = HCS_MAX_PORTS(xhci->hcs_params1); in xhci_setup_port_arrays()
2183 xhci->hw_ports = kcalloc_node(num_ports, sizeof(*xhci->hw_ports), in xhci_setup_port_arrays()
2185 if (!xhci->hw_ports) in xhci_setup_port_arrays()
2186 return -ENOMEM; in xhci_setup_port_arrays()
2189 xhci->hw_ports[i].addr = &xhci->op_regs->port_status_base + in xhci_setup_port_arrays()
2191 xhci->hw_ports[i].hw_portnum = i; in xhci_setup_port_arrays()
2193 init_completion(&xhci->hw_ports[i].rexit_done); in xhci_setup_port_arrays()
2194 init_completion(&xhci->hw_ports[i].u3exit_done); in xhci_setup_port_arrays()
2197 xhci->rh_bw = kcalloc_node(num_ports, sizeof(*xhci->rh_bw), flags, in xhci_setup_port_arrays()
2199 if (!xhci->rh_bw) in xhci_setup_port_arrays()
2200 return -ENOMEM; in xhci_setup_port_arrays()
2204 INIT_LIST_HEAD(&xhci->rh_bw[i].tts); in xhci_setup_port_arrays()
2205 bw_table = &xhci->rh_bw[i].bw_table; in xhci_setup_port_arrays()
2207 INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints); in xhci_setup_port_arrays()
2209 base = &xhci->cap_regs->hc_capbase; in xhci_setup_port_arrays()
2214 return -ENODEV; in xhci_setup_port_arrays()
2225 xhci->ext_caps = kcalloc_node(cap_count, sizeof(*xhci->ext_caps), in xhci_setup_port_arrays()
2227 if (!xhci->ext_caps) in xhci_setup_port_arrays()
2228 return -ENOMEM; in xhci_setup_port_arrays()
2230 xhci->port_caps = kcalloc_node(cap_count, sizeof(*xhci->port_caps), in xhci_setup_port_arrays()
2232 if (!xhci->port_caps) in xhci_setup_port_arrays()
2233 return -ENOMEM; in xhci_setup_port_arrays()
2239 if (xhci->usb2_rhub.num_ports + xhci->usb3_rhub.num_ports == in xhci_setup_port_arrays()
2245 if (xhci->usb2_rhub.num_ports == 0 && xhci->usb3_rhub.num_ports == 0) { in xhci_setup_port_arrays()
2247 return -ENODEV; in xhci_setup_port_arrays()
2251 xhci->usb2_rhub.num_ports, xhci->usb3_rhub.num_ports); in xhci_setup_port_arrays()
2256 if (xhci->usb3_rhub.num_ports > USB_SS_MAXPORTS) { in xhci_setup_port_arrays()
2260 xhci->usb3_rhub.num_ports = USB_SS_MAXPORTS; in xhci_setup_port_arrays()
2262 if (xhci->usb2_rhub.num_ports > USB_MAXCHILDREN) { in xhci_setup_port_arrays()
2266 xhci->usb2_rhub.num_ports = USB_MAXCHILDREN; in xhci_setup_port_arrays()
2269 if (!xhci->usb2_rhub.num_ports) in xhci_setup_port_arrays()
2272 if (!xhci->usb3_rhub.num_ports) in xhci_setup_port_arrays()
2275 xhci_create_rhub_port_array(xhci, &xhci->usb2_rhub, flags); in xhci_setup_port_arrays()
2276 xhci_create_rhub_port_array(xhci, &xhci->usb3_rhub, flags); in xhci_setup_port_arrays()
2284 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_alloc_interrupter()
2292 max_segs = BIT(HCS_ERST_MAX(xhci->hcs_params2)); in xhci_alloc_interrupter()
2299 ir->event_ring = xhci_ring_alloc(xhci, segs, 1, TYPE_EVENT, 0, flags); in xhci_alloc_interrupter()
2300 if (!ir->event_ring) { in xhci_alloc_interrupter()
2306 ret = xhci_alloc_erst(xhci, ir->event_ring, &ir->erst, flags); in xhci_alloc_interrupter()
2309 xhci_ring_free(xhci, ir->event_ring); in xhci_alloc_interrupter()
2324 if (intr_num > xhci->max_interrupters) { in xhci_add_interrupter()
2326 intr_num, xhci->max_interrupters); in xhci_add_interrupter()
2327 return -EINVAL; in xhci_add_interrupter()
2330 if (xhci->interrupters[intr_num]) { in xhci_add_interrupter()
2332 return -EINVAL; in xhci_add_interrupter()
2335 xhci->interrupters[intr_num] = ir; in xhci_add_interrupter()
2336 ir->intr_num = intr_num; in xhci_add_interrupter()
2337 ir->ir_set = &xhci->run_regs->ir_set[intr_num]; in xhci_add_interrupter()
2340 erst_size = readl(&ir->ir_set->erst_size); in xhci_add_interrupter()
2342 erst_size |= ir->event_ring->num_segs; in xhci_add_interrupter()
2343 writel(erst_size, &ir->ir_set->erst_size); in xhci_add_interrupter()
2345 erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); in xhci_add_interrupter()
2347 erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; in xhci_add_interrupter()
2348 if (xhci->quirks & XHCI_WRITE_64_HI_LO) in xhci_add_interrupter()
2349 hi_lo_writeq(erst_base, &ir->ir_set->erst_base); in xhci_add_interrupter()
2351 xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); in xhci_add_interrupter()
2366 int err = -ENOSPC; in xhci_create_secondary_interrupter()
2368 if (!xhci->interrupters || xhci->max_interrupters <= 1) in xhci_create_secondary_interrupter()
2375 spin_lock_irq(&xhci->lock); in xhci_create_secondary_interrupter()
2378 for (i = 1; i < xhci->max_interrupters; i++) { in xhci_create_secondary_interrupter()
2379 if (xhci->interrupters[i] == NULL) { in xhci_create_secondary_interrupter()
2385 spin_unlock_irq(&xhci->lock); in xhci_create_secondary_interrupter()
2389 xhci->max_interrupters); in xhci_create_secondary_interrupter()
2400 i, xhci->max_interrupters); in xhci_create_secondary_interrupter()
2409 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_mem_init()
2416 INIT_LIST_HEAD(&xhci->cmd_list); in xhci_mem_init()
2419 INIT_DELAYED_WORK(&xhci->cmd_timer, xhci_handle_command_timeout); in xhci_mem_init()
2420 init_completion(&xhci->cmd_ring_stop_completion); in xhci_mem_init()
2422 page_size = readl(&xhci->op_regs->page_size); in xhci_mem_init()
2425 val = ffs(page_size) - 1; in xhci_mem_init()
2432 xhci->page_shift = 12; in xhci_mem_init()
2433 xhci->page_size = 1 << xhci->page_shift; in xhci_mem_init()
2435 "HCD page size set to %iK", xhci->page_size / 1024); in xhci_mem_init()
2441 val = HCS_MAX_SLOTS(readl(&xhci->cap_regs->hcs_params1)); in xhci_mem_init()
2444 val2 = readl(&xhci->op_regs->config_reg); in xhci_mem_init()
2448 writel(val, &xhci->op_regs->config_reg); in xhci_mem_init()
2451 * xHCI section 5.4.6 - Device Context array must be in xhci_mem_init()
2452 * "physically contiguous and 64-byte (cache line) aligned". in xhci_mem_init()
2454 xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma, in xhci_mem_init()
2456 if (!xhci->dcbaa) in xhci_mem_init()
2458 xhci->dcbaa->dma = dma; in xhci_mem_init()
2461 &xhci->dcbaa->dma, xhci->dcbaa); in xhci_mem_init()
2462 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr); in xhci_mem_init()
2467 * however, the command ring segment needs 64-byte aligned segments in xhci_mem_init()
2471 if (xhci->quirks & XHCI_TRB_OVERFETCH) in xhci_mem_init()
2472 /* Buggy HC prefetches beyond segment bounds - allocate dummy space at the end */ in xhci_mem_init()
2473 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, in xhci_mem_init()
2474 TRB_SEGMENT_SIZE * 2, TRB_SEGMENT_SIZE * 2, xhci->page_size * 2); in xhci_mem_init()
2476 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, in xhci_mem_init()
2477 TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size); in xhci_mem_init()
2480 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev, in xhci_mem_init()
2481 2112, 64, xhci->page_size); in xhci_mem_init()
2482 if (!xhci->segment_pool || !xhci->device_pool) in xhci_mem_init()
2486 * and only need to be 16-byte aligned. in xhci_mem_init()
2488 xhci->small_streams_pool = in xhci_mem_init()
2491 xhci->medium_streams_pool = in xhci_mem_init()
2498 if (!xhci->small_streams_pool || !xhci->medium_streams_pool) in xhci_mem_init()
2502 xhci->cmd_ring = xhci_ring_alloc(xhci, 1, 1, TYPE_COMMAND, 0, flags); in xhci_mem_init()
2503 if (!xhci->cmd_ring) in xhci_mem_init()
2506 "Allocated command ring at %p", xhci->cmd_ring); in xhci_mem_init()
2508 &xhci->cmd_ring->first_seg->dma); in xhci_mem_init()
2511 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_mem_init()
2513 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) | in xhci_mem_init()
2514 xhci->cmd_ring->cycle_state; in xhci_mem_init()
2517 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_mem_init()
2523 xhci->cmd_ring_reserved_trbs++; in xhci_mem_init()
2525 val = readl(&xhci->cap_regs->db_off); in xhci_mem_init()
2530 xhci->dba = (void __iomem *) xhci->cap_regs + val; in xhci_mem_init()
2535 xhci->interrupters = kcalloc_node(xhci->max_interrupters, sizeof(*xhci->interrupters), in xhci_mem_init()
2545 xhci->isoc_bei_interval = AVOID_BEI_INTERVAL_MAX; in xhci_mem_init()
2553 xhci->devs[i] = NULL; in xhci_mem_init()
2564 temp = readl(&xhci->op_regs->dev_notification); in xhci_mem_init()
2567 writel(temp, &xhci->op_regs->dev_notification); in xhci_mem_init()
2575 return -ENOMEM; in xhci_mem_init()