Lines Matching +full:clock +full:- +full:generator
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 QE_BRG1, /* Baud Rate Generator 1 */
34 QE_BRG2, /* Baud Rate Generator 2 */
35 QE_BRG3, /* Baud Rate Generator 3 */
36 QE_BRG4, /* Baud Rate Generator 4 */
37 QE_BRG5, /* Baud Rate Generator 5 */
38 QE_BRG6, /* Baud Rate Generator 6 */
39 QE_BRG7, /* Baud Rate Generator 7 */
40 QE_BRG8, /* Baud Rate Generator 8 */
41 QE_BRG9, /* Baud Rate Generator 9 */
42 QE_BRG10, /* Baud Rate Generator 10 */
43 QE_BRG11, /* Baud Rate Generator 11 */
44 QE_BRG12, /* Baud Rate Generator 12 */
45 QE_BRG13, /* Baud Rate Generator 13 */
46 QE_BRG14, /* Baud Rate Generator 14 */
47 QE_BRG15, /* Baud Rate Generator 15 */
48 QE_BRG16, /* Baud Rate Generator 16 */
49 QE_CLK1, /* Clock 1 */
50 QE_CLK2, /* Clock 2 */
51 QE_CLK3, /* Clock 3 */
52 QE_CLK4, /* Clock 4 */
53 QE_CLK5, /* Clock 5 */
54 QE_CLK6, /* Clock 6 */
55 QE_CLK7, /* Clock 7 */
56 QE_CLK8, /* Clock 8 */
57 QE_CLK9, /* Clock 9 */
58 QE_CLK10, /* Clock 10 */
59 QE_CLK11, /* Clock 11 */
60 QE_CLK12, /* Clock 12 */
61 QE_CLK13, /* Clock 13 */
62 QE_CLK14, /* Clock 14 */
63 QE_CLK15, /* Clock 15 */
64 QE_CLK16, /* Clock 16 */
65 QE_CLK17, /* Clock 17 */
66 QE_CLK18, /* Clock 18 */
67 QE_CLK19, /* Clock 19 */
68 QE_CLK20, /* Clock 20 */
69 QE_CLK21, /* Clock 21 */
70 QE_CLK22, /* Clock 22 */
71 QE_CLK23, /* Clock 23 */
72 QE_CLK24, /* Clock 24 */
106 return -ENOSYS; in cpm_muram_alloc()
116 return -ENOSYS; in cpm_muram_alloc_fixed()
126 return -ENOSYS; in cpm_muram_offset()
165 static inline int par_io_init(struct device_node *np) { return -ENOSYS; } in par_io_init()
166 static inline int par_io_of_config(struct device_node *np) { return -ENOSYS; } in par_io_of_config()
168 int assignment, int has_irq) { return -ENOSYS; } in par_io_config_pin()
169 static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; } in par_io_data_set()
185 return ERR_PTR(-ENOSYS); in qe_pin_request()
198 return -ENOSYS; in qe_issue_cmd()
270 u8 id[62]; /* Null-terminated identifier string */
271 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
283 u8 id[32]; /* Null-terminated identifier */
286 __be32 iram_offset; /* Offset into I-RAM for the code */
287 __be32 count; /* Number of 32-bit words of the code */
311 return -ENOSYS; in qe_upload_firmware()
474 /* QE CECR Sub Block - sub block of QE command.
508 /* QE CECR Protocol - For non-MCC, specifies mode for QE CECR command */
557 #define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */
561 /* I-RAM */