Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
74 #define DESKTOP_EFX_FILE "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE "ctefx-r3di.bin"
107 #define VNODE_START_NID 0x80
115 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID 0x90
126 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
163 * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
182 int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 { .name = "X-Bass",
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
304 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
600 * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604 * enabled. X-Bass must be disabled when using these.
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 { .name = "Low (16-31",
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 { .name = "Medium (32-149",
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 { .name = "High (150-600",
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
804 { .stream_id = 0x14,
805 .count = 0x04,
806 .offset = { 0x00, 0x04, 0x08, 0x0c },
807 .value = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
809 { .stream_id = 0x0c,
810 .count = 0x0c,
811 .offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
812 0x20, 0x24, 0x28, 0x2c },
813 .value = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
814 0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
815 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
817 { .stream_id = 0x0c,
818 .count = 0x08,
819 .offset = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
820 .value = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
821 0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
827 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
828 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
830 VENDOR_DSPIO_STATUS = 0xF01,
831 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
832 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
833 VENDOR_DSPIO_DSP_INIT = 0x703,
834 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
835 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
838 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
839 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
840 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
841 VENDOR_CHIPIO_DATA_LOW = 0x300,
842 VENDOR_CHIPIO_DATA_HIGH = 0x400,
844 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
845 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
847 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
848 VENDOR_CHIPIO_STATUS = 0xF01,
849 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
850 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
852 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
853 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
854 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
855 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
856 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
858 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
859 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
861 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
862 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
863 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
864 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
865 VENDOR_CHIPIO_FLAG_SET = 0x70F,
866 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
867 VENDOR_CHIPIO_PARAM_SET = 0x710,
868 VENDOR_CHIPIO_PARAM_GET = 0xF10,
870 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
871 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
872 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
873 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
875 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
876 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
877 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
878 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
880 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
881 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
882 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
883 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
884 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
885 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
887 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
895 CONTROL_FLAG_C_MGR = 0,
900 /* Tracker for the SPDIF-in path is bypassed/enabled */
918 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
920 /* De-emphasis filter on DAC-1 disabled/enabled */
922 /* De-emphasis filter on DAC-2 disabled/enabled */
924 /* De-emphasis filter on DAC-3 disabled/enabled */
926 /* High-pass filter on ADC_B disabled/enabled */
928 /* High-pass filter on ADC_C disabled/enabled */
952 /* 0: None, 1: Mic1In*/
954 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
965 * sense given the fact the AE-5 uses it and has the ASI flag set.
1000 VENDOR_STATUS_DSPIO_OK = 0x00,
1002 VENDOR_STATUS_DSPIO_BUSY = 0x01,
1004 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
1006 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
1014 VENDOR_STATUS_CHIPIO_OK = 0x00,
1016 VENDOR_STATUS_CHIPIO_BUSY = 0x01
1023 SR_6_000 = 0x00,
1024 SR_8_000 = 0x01,
1025 SR_9_600 = 0x02,
1026 SR_11_025 = 0x03,
1027 SR_16_000 = 0x04,
1028 SR_22_050 = 0x05,
1029 SR_24_000 = 0x06,
1030 SR_32_000 = 0x07,
1031 SR_44_100 = 0x08,
1032 SR_48_000 = 0x09,
1033 SR_88_200 = 0x0A,
1034 SR_96_000 = 0x0B,
1035 SR_144_000 = 0x0C,
1036 SR_176_400 = 0x0D,
1037 SR_192_000 = 0x0E,
1038 SR_384_000 = 0x0F,
1040 SR_COUNT = 0x10,
1042 SR_RATE_UNKNOWN = 0x1F
1046 DSP_DOWNLOAD_FAILED = -1,
1047 DSP_DOWNLOAD_INIT = 0,
1053 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1054 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1055 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1056 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1129 /* AE-5 Control values */
1135 struct hda_codec *codec; member
1143 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1181 #define ca0132_quirk(spec) ((spec)->codec->fixup_id)
1182 #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio)
1183 #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions)
1184 #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls)
1193 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1194 { 0x0c, 0x411111f0 }, /* N/A */
1195 { 0x0d, 0x411111f0 }, /* N/A */
1196 { 0x0e, 0x411111f0 }, /* N/A */
1197 { 0x0f, 0x0321101f }, /* HP */
1198 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1199 { 0x11, 0x03a11021 }, /* Mic */
1200 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1201 { 0x13, 0x411111f0 }, /* N/A */
1202 { 0x18, 0x411111f0 }, /* N/A */
1208 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1209 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1210 { 0x0d, 0x014510f0 }, /* Digital Out */
1211 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1212 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1213 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1214 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1215 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1216 { 0x13, 0x908700f0 }, /* What U Hear In*/
1217 { 0x18, 0x50d000f0 }, /* N/A */
1223 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1224 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1225 { 0x0d, 0x014510f0 }, /* Digital Out */
1226 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1227 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1228 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1229 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1230 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1231 { 0x13, 0x908700f0 }, /* What U Hear In*/
1232 { 0x18, 0x50d000f0 }, /* N/A */
1238 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1239 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1240 { 0x0d, 0x014510f0 }, /* Digital Out */
1241 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1242 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1243 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1244 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1245 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1246 { 0x13, 0x908700f0 }, /* What U Hear In*/
1247 { 0x18, 0x50d000f0 }, /* N/A */
1251 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1253 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1254 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1255 { 0x0d, 0x014510f0 }, /* Digital Out */
1256 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1257 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1258 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1259 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1260 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1261 { 0x13, 0x908700f0 }, /* What U Hear In*/
1262 { 0x18, 0x50d000f0 }, /* N/A */
1268 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1269 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1270 { 0x0d, 0x014510f0 }, /* Digital Out */
1271 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1272 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1273 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1274 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1275 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1276 { 0x13, 0x908700f0 }, /* What U Hear In*/
1277 { 0x18, 0x500000f0 }, /* N/A */
1282 { 0x0b, 0x01017010 },
1283 { 0x0c, 0x014510f0 },
1284 { 0x0d, 0x414510f0 },
1285 { 0x0e, 0x01c520f0 },
1286 { 0x0f, 0x01017114 },
1287 { 0x10, 0x01017011 },
1288 { 0x11, 0x018170ff },
1289 { 0x12, 0x01a170f0 },
1290 { 0x13, 0x908700f0 },
1291 { 0x18, 0x500000f0 },
1296 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1297 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1298 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1299 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1300 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1301 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1302 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1303 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1304 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1305 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1306 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1307 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1308 SND_PCI_QUIRK(0x3842, 0x104b, "EVGA X299 Dark", QUIRK_R3DI),
1309 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1310 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1311 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1312 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1313 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1314 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1320 { .id = QUIRK_ALIENWARE_M17XR4, .name = "alienware-m17xr4" },
1323 { .id = QUIRK_ZXR_DBPRO, .name = "zxr-dbpro" },
1335 unsigned int dac2port; /* ParamID 0x0d value. */
1370 { .dac2port = 0x24,
1374 .mmio_gpio_count = 0,
1375 .scp_cmds_count = 0,
1379 { .dac2port = 0x21,
1382 .hda_gpio_set = 0,
1383 .mmio_gpio_count = 0,
1384 .scp_cmds_count = 0,
1393 { .dac2port = 0x24,
1398 .scp_cmds_count = 0,
1402 { .dac2port = 0x21,
1406 .mmio_gpio_set = { 0 },
1407 .scp_cmds_count = 0,
1416 { .dac2port = 0x18,
1420 .mmio_gpio_set = { 0, 1, 1 },
1421 .scp_cmds_count = 0,
1424 { .dac2port = 0x12,
1428 .mmio_gpio_set = { 1, 1, 0 },
1429 .scp_cmds_count = 0,
1438 { .dac2port = 0x24,
1442 .mmio_gpio_set = { 1, 1, 0 },
1443 .scp_cmds_count = 0,
1447 { .dac2port = 0x21,
1451 .mmio_gpio_set = { 0, 1, 1 },
1452 .scp_cmds_count = 0,
1461 { .dac2port = 0xa4,
1463 .mmio_gpio_count = 0,
1465 .scp_cmd_mid = { 0x96, 0x96 },
1470 .chipio_write_addr = 0x0018b03c,
1471 .chipio_write_data = 0x00000012
1474 { .dac2port = 0xa1,
1476 .mmio_gpio_count = 0,
1478 .scp_cmd_mid = { 0x96, 0x96 },
1483 .chipio_write_addr = 0x0018b03c,
1484 .chipio_write_data = 0x00000012
1492 { .dac2port = 0x58,
1495 .mmio_gpio_pin = { 0 },
1498 .scp_cmd_mid = { 0x96, 0x96 },
1503 .chipio_write_addr = 0x0018b03c,
1504 .chipio_write_data = 0x00000000
1507 { .dac2port = 0x58,
1510 .mmio_gpio_pin = { 0 },
1513 .scp_cmd_mid = { 0x96, 0x96 },
1518 .chipio_write_addr = 0x0018b03c,
1519 .chipio_write_data = 0x00000010
1525 * CA0132 codec access
1527 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, in codec_send_command() argument
1531 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1534 return ((response == -1) ? -1 : 0); in codec_send_command()
1537 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, in codec_set_converter_format() argument
1540 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, in codec_set_converter_format()
1541 converter_format & 0xffff, res); in codec_set_converter_format()
1544 static int codec_set_converter_stream_channel(struct hda_codec *codec, in codec_set_converter_stream_channel() argument
1548 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1550 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1551 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, in codec_set_converter_stream_channel()
1556 static int chipio_send(struct hda_codec *codec, in chipio_send() argument
1565 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1568 return 0; in chipio_send()
1572 return -EIO; in chipio_send()
1576 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1578 static int chipio_write_address(struct hda_codec *codec, in chipio_write_address() argument
1581 struct ca0132_spec *spec = codec->spec; in chipio_write_address()
1584 if (spec->curr_chip_addx == chip_addx) in chipio_write_address()
1585 return 0; in chipio_write_address()
1588 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, in chipio_write_address()
1589 chip_addx & 0xffff); in chipio_write_address()
1591 if (res != -EIO) { in chipio_write_address()
1593 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, in chipio_write_address()
1597 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1603 * Write data through the vendor widget -- NOT protected by the Mutex!
1605 static int chipio_write_data(struct hda_codec *codec, unsigned int data) in chipio_write_data() argument
1607 struct ca0132_spec *spec = codec->spec; in chipio_write_data()
1611 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1613 if (res != -EIO) { in chipio_write_data()
1615 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, in chipio_write_data()
1621 spec->curr_chip_addx = (res != -EIO) ? in chipio_write_data()
1622 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1627 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1629 static int chipio_write_data_multiple(struct hda_codec *codec, in chipio_write_data_multiple() argument
1633 int status = 0; in chipio_write_data_multiple()
1636 codec_dbg(codec, "chipio_write_data null ptr\n"); in chipio_write_data_multiple()
1637 return -EINVAL; in chipio_write_data_multiple()
1640 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1641 status = chipio_write_data(codec, *data++); in chipio_write_data_multiple()
1648 * Read data through the vendor widget -- NOT protected by the Mutex!
1650 static int chipio_read_data(struct hda_codec *codec, unsigned int *data) in chipio_read_data() argument
1652 struct ca0132_spec *spec = codec->spec; in chipio_read_data()
1656 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1658 if (res != -EIO) { in chipio_read_data()
1660 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1663 if (res != -EIO) { in chipio_read_data()
1665 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1667 0); in chipio_read_data()
1672 spec->curr_chip_addx = (res != -EIO) ? in chipio_read_data()
1673 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1681 static int chipio_write(struct hda_codec *codec, in chipio_write() argument
1684 struct ca0132_spec *spec = codec->spec; in chipio_write()
1687 mutex_lock(&spec->chipio_mutex); in chipio_write()
1690 err = chipio_write_address(codec, chip_addx); in chipio_write()
1691 if (err < 0) in chipio_write()
1694 err = chipio_write_data(codec, data); in chipio_write()
1695 if (err < 0) in chipio_write()
1699 mutex_unlock(&spec->chipio_mutex); in chipio_write()
1707 static int chipio_write_no_mutex(struct hda_codec *codec, in chipio_write_no_mutex() argument
1714 err = chipio_write_address(codec, chip_addx); in chipio_write_no_mutex()
1715 if (err < 0) in chipio_write_no_mutex()
1718 err = chipio_write_data(codec, data); in chipio_write_no_mutex()
1719 if (err < 0) in chipio_write_no_mutex()
1730 static int chipio_write_multiple(struct hda_codec *codec, in chipio_write_multiple() argument
1735 struct ca0132_spec *spec = codec->spec; in chipio_write_multiple()
1738 mutex_lock(&spec->chipio_mutex); in chipio_write_multiple()
1739 status = chipio_write_address(codec, chip_addx); in chipio_write_multiple()
1740 if (status < 0) in chipio_write_multiple()
1743 status = chipio_write_data_multiple(codec, data, count); in chipio_write_multiple()
1745 mutex_unlock(&spec->chipio_mutex); in chipio_write_multiple()
1754 static int chipio_read(struct hda_codec *codec, in chipio_read() argument
1757 struct ca0132_spec *spec = codec->spec; in chipio_read()
1760 mutex_lock(&spec->chipio_mutex); in chipio_read()
1763 err = chipio_write_address(codec, chip_addx); in chipio_read()
1764 if (err < 0) in chipio_read()
1767 err = chipio_read_data(codec, data); in chipio_read()
1768 if (err < 0) in chipio_read()
1772 mutex_unlock(&spec->chipio_mutex); in chipio_read()
1779 static void chipio_set_control_flag(struct hda_codec *codec, in chipio_set_control_flag() argument
1786 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1795 static void chipio_set_control_param(struct hda_codec *codec, in chipio_set_control_param() argument
1798 struct ca0132_spec *spec = codec->spec; in chipio_set_control_param()
1803 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1806 mutex_lock(&spec->chipio_mutex); in chipio_set_control_param()
1807 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1808 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1811 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1815 mutex_unlock(&spec->chipio_mutex); in chipio_set_control_param()
1822 static void chipio_set_control_param_no_mutex(struct hda_codec *codec, in chipio_set_control_param_no_mutex() argument
1829 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1832 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1833 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1836 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1846 static void chipio_set_stream_source_dest(struct hda_codec *codec, in chipio_set_stream_source_dest() argument
1849 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1851 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1853 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1860 static void chipio_set_stream_channels(struct hda_codec *codec, in chipio_set_stream_channels() argument
1863 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1865 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1872 static void chipio_set_stream_control(struct hda_codec *codec, in chipio_set_stream_control() argument
1875 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1877 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1884 static void chipio_get_stream_control(struct hda_codec *codec, in chipio_get_stream_control() argument
1887 chipio_set_control_param_no_mutex(codec, in chipio_get_stream_control()
1889 *enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_get_stream_control()
1897 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec, in chipio_set_conn_rate_no_mutex() argument
1900 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1902 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1909 static void chipio_set_conn_rate(struct hda_codec *codec, in chipio_set_conn_rate() argument
1912 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); in chipio_set_conn_rate()
1913 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, in chipio_set_conn_rate()
1920 * 0x80-0xFF.
1922 static void chipio_8051_write_direct(struct hda_codec *codec, in chipio_8051_write_direct() argument
1928 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1932 * Writes to the 8051's exram, which has 16-bits of address space.
1933 * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
1934 * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
1936 * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
1939 static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr) in chipio_8051_set_address() argument
1943 /* Lower 8-bits. */ in chipio_8051_set_address()
1944 tmp = addr & 0xff; in chipio_8051_set_address()
1945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1948 /* Upper 8-bits. */ in chipio_8051_set_address()
1949 tmp = (addr >> 8) & 0xff; in chipio_8051_set_address()
1950 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_address()
1954 static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data) in chipio_8051_set_data() argument
1956 /* 8-bits of data. */ in chipio_8051_set_data()
1957 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data()
1958 VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff); in chipio_8051_set_data()
1961 static unsigned int chipio_8051_get_data(struct hda_codec *codec) in chipio_8051_get_data() argument
1963 return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_get_data()
1964 VENDOR_CHIPIO_8051_DATA_READ, 0); in chipio_8051_get_data()
1968 static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data) in chipio_8051_set_data_pll() argument
1970 /* 8-bits of data. */ in chipio_8051_set_data_pll()
1971 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_8051_set_data_pll()
1972 VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff); in chipio_8051_set_data_pll()
1975 static void chipio_8051_write_exram(struct hda_codec *codec, in chipio_8051_write_exram() argument
1978 struct ca0132_spec *spec = codec->spec; in chipio_8051_write_exram()
1980 mutex_lock(&spec->chipio_mutex); in chipio_8051_write_exram()
1982 chipio_8051_set_address(codec, addr); in chipio_8051_write_exram()
1983 chipio_8051_set_data(codec, data); in chipio_8051_write_exram()
1985 mutex_unlock(&spec->chipio_mutex); in chipio_8051_write_exram()
1988 static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec, in chipio_8051_write_exram_no_mutex() argument
1991 chipio_8051_set_address(codec, addr); in chipio_8051_write_exram_no_mutex()
1992 chipio_8051_set_data(codec, data); in chipio_8051_write_exram_no_mutex()
1996 static void chipio_8051_read_exram(struct hda_codec *codec, in chipio_8051_read_exram() argument
1999 chipio_8051_set_address(codec, addr); in chipio_8051_read_exram()
2000 *data = chipio_8051_get_data(codec); in chipio_8051_read_exram()
2003 static void chipio_8051_write_pll_pmu(struct hda_codec *codec, in chipio_8051_write_pll_pmu() argument
2006 struct ca0132_spec *spec = codec->spec; in chipio_8051_write_pll_pmu()
2008 mutex_lock(&spec->chipio_mutex); in chipio_8051_write_pll_pmu()
2010 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu()
2011 chipio_8051_set_data_pll(codec, data); in chipio_8051_write_pll_pmu()
2013 mutex_unlock(&spec->chipio_mutex); in chipio_8051_write_pll_pmu()
2016 static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec, in chipio_8051_write_pll_pmu_no_mutex() argument
2019 chipio_8051_set_address(codec, addr & 0xff); in chipio_8051_write_pll_pmu_no_mutex()
2020 chipio_8051_set_data_pll(codec, data); in chipio_8051_write_pll_pmu_no_mutex()
2026 static void chipio_enable_clocks(struct hda_codec *codec) in chipio_enable_clocks() argument
2028 struct ca0132_spec *spec = codec->spec; in chipio_enable_clocks()
2030 mutex_lock(&spec->chipio_mutex); in chipio_enable_clocks()
2032 chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff); in chipio_enable_clocks()
2033 chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b); in chipio_enable_clocks()
2034 chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff); in chipio_enable_clocks()
2036 mutex_unlock(&spec->chipio_mutex); in chipio_enable_clocks()
2042 static int dspio_send(struct hda_codec *codec, unsigned int reg, in dspio_send() argument
2050 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
2051 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
2056 return -EIO; in dspio_send()
2062 static void dspio_write_wait(struct hda_codec *codec) in dspio_write_wait() argument
2068 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
2069 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
2080 static int dspio_write(struct hda_codec *codec, unsigned int scp_data) in dspio_write() argument
2082 struct ca0132_spec *spec = codec->spec; in dspio_write()
2085 dspio_write_wait(codec); in dspio_write()
2087 mutex_lock(&spec->chipio_mutex); in dspio_write()
2088 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, in dspio_write()
2089 scp_data & 0xffff); in dspio_write()
2090 if (status < 0) in dspio_write()
2093 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, in dspio_write()
2095 if (status < 0) in dspio_write()
2099 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
2100 VENDOR_DSPIO_STATUS, 0); in dspio_write()
2102 mutex_unlock(&spec->chipio_mutex); in dspio_write()
2105 -EIO : 0; in dspio_write()
2111 static int dspio_write_multiple(struct hda_codec *codec, in dspio_write_multiple() argument
2114 int status = 0; in dspio_write_multiple()
2118 return -EINVAL; in dspio_write_multiple()
2120 count = 0; in dspio_write_multiple()
2122 status = dspio_write(codec, *buffer++); in dspio_write_multiple()
2123 if (status != 0) in dspio_write_multiple()
2131 static int dspio_read(struct hda_codec *codec, unsigned int *data) in dspio_read() argument
2135 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
2136 if (status == -EIO) in dspio_read()
2139 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
2140 if (status == -EIO || in dspio_read()
2142 return -EIO; in dspio_read()
2144 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2145 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2147 return 0; in dspio_read()
2150 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, in dspio_read_multiple() argument
2153 int status = 0; in dspio_read_multiple()
2160 return -1; in dspio_read_multiple()
2162 count = 0; in dspio_read_multiple()
2164 status = dspio_read(codec, buffer++); in dspio_read_multiple()
2165 if (status != 0) in dspio_read_multiple()
2171 if (status == 0) { in dspio_read_multiple()
2173 status = dspio_read(codec, &dummy); in dspio_read_multiple()
2174 if (status != 0) in dspio_read_multiple()
2193 unsigned int header = 0; in make_scp_header()
2195 header = (data_size & 0x1f) << 27; in make_scp_header()
2196 header |= (error_flag & 0x01) << 26; in make_scp_header()
2197 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2198 header |= (device_flag & 0x01) << 24; in make_scp_header()
2199 header |= (req & 0x7f) << 17; in make_scp_header()
2200 header |= (get_flag & 0x01) << 16; in make_scp_header()
2201 header |= (source_id & 0xff) << 8; in make_scp_header()
2202 header |= target_id & 0xff; in make_scp_header()
2218 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2220 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2222 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2224 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2226 *req = (header >> 17) & 0x7f; in extract_scp_header()
2228 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2230 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2232 *target_id = header & 0xff; in extract_scp_header()
2243 static void dspio_clear_response_queue(struct hda_codec *codec) in dspio_clear_response_queue() argument
2246 unsigned int dummy = 0; in dspio_clear_response_queue()
2251 status = dspio_read(codec, &dummy); in dspio_clear_response_queue()
2252 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2255 static int dspio_get_response_data(struct hda_codec *codec) in dspio_get_response_data() argument
2257 struct ca0132_spec *spec = codec->spec; in dspio_get_response_data()
2258 unsigned int data = 0; in dspio_get_response_data()
2261 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2262 return -EIO; in dspio_get_response_data()
2264 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2265 spec->scp_resp_header = data; in dspio_get_response_data()
2266 spec->scp_resp_count = data >> 27; in dspio_get_response_data()
2267 count = spec->wait_num_data; in dspio_get_response_data()
2268 dspio_read_multiple(codec, spec->scp_resp_data, in dspio_get_response_data()
2269 &spec->scp_resp_count, count); in dspio_get_response_data()
2270 return 0; in dspio_get_response_data()
2273 return -EIO; in dspio_get_response_data()
2279 static int dspio_send_scp_message(struct hda_codec *codec, in dspio_send_scp_message() argument
2286 struct ca0132_spec *spec = codec->spec; in dspio_send_scp_message()
2288 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2297 *bytes_returned = 0; in dspio_send_scp_message()
2307 return -EINVAL; in dspio_send_scp_message()
2311 return -EINVAL; in dspio_send_scp_message()
2313 spec->wait_scp_header = *((unsigned int *)send_buf); in dspio_send_scp_message()
2318 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2319 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); in dspio_send_scp_message()
2320 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; in dspio_send_scp_message()
2321 spec->wait_scp = 1; in dspio_send_scp_message()
2325 status = dspio_write_multiple(codec, (unsigned int *)send_buf, in dspio_send_scp_message()
2327 if (status < 0) { in dspio_send_scp_message()
2328 spec->wait_scp = 0; in dspio_send_scp_message()
2334 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2337 } while (spec->wait_scp && time_before(jiffies, timeout)); in dspio_send_scp_message()
2339 if (!spec->wait_scp) { in dspio_send_scp_message()
2341 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); in dspio_send_scp_message()
2342 memcpy(&ret_msg->data, spec->scp_resp_data, in dspio_send_scp_message()
2343 spec->wait_num_data); in dspio_send_scp_message()
2344 *bytes_returned = (spec->scp_resp_count + 1) * 4; in dspio_send_scp_message()
2345 status = 0; in dspio_send_scp_message()
2347 status = -EIO; in dspio_send_scp_message()
2349 spec->wait_scp = 0; in dspio_send_scp_message()
2356 * dspio_scp - Prepare and send the SCP message to DSP
2357 * @codec: the HDA codec
2369 static int dspio_scp(struct hda_codec *codec, in dspio_scp() argument
2373 int status = 0; in dspio_scp()
2379 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2380 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2382 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2383 return -EINVAL; in dspio_scp()
2386 codec_dbg(codec, "dspio_scp get but has no buffer\n"); in dspio_scp()
2387 return -EINVAL; in dspio_scp()
2390 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2391 codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); in dspio_scp()
2392 return -EINVAL; in dspio_scp()
2396 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2397 if (data != NULL && len > 0) { in dspio_scp()
2402 ret_bytes = 0; in dspio_scp()
2404 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, in dspio_scp()
2408 if (status < 0) { in dspio_scp()
2409 codec_dbg(codec, "dspio_scp: send scp msg failed\n"); in dspio_scp()
2421 return 0; in dspio_scp()
2424 ret_size = (ret_bytes - sizeof(scp_reply.hdr)) in dspio_scp()
2428 codec_dbg(codec, "reply too long for buf\n"); in dspio_scp()
2429 return -EINVAL; in dspio_scp()
2431 codec_dbg(codec, "RetLen and HdrLen .NE.\n"); in dspio_scp()
2432 return -EINVAL; in dspio_scp()
2434 codec_dbg(codec, "NULL reply\n"); in dspio_scp()
2435 return -EINVAL; in dspio_scp()
2441 codec_dbg(codec, "reply ill-formed or errflag set\n"); in dspio_scp()
2442 return -EIO; in dspio_scp()
2451 static int dspio_set_param(struct hda_codec *codec, int mod_id, in dspio_set_param() argument
2454 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL, in dspio_set_param()
2458 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id, in dspio_set_uint_param() argument
2461 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2468 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) in dspio_alloc_dma_chan() argument
2470 int status = 0; in dspio_alloc_dma_chan()
2473 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); in dspio_alloc_dma_chan()
2474 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2475 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2478 if (status < 0) { in dspio_alloc_dma_chan()
2479 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); in dspio_alloc_dma_chan()
2483 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2484 codec_dbg(codec, "no free dma channels to allocate\n"); in dspio_alloc_dma_chan()
2485 return -EBUSY; in dspio_alloc_dma_chan()
2488 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); in dspio_alloc_dma_chan()
2489 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); in dspio_alloc_dma_chan()
2497 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) in dspio_free_dma_chan() argument
2499 int status = 0; in dspio_free_dma_chan()
2500 unsigned int dummy = 0; in dspio_free_dma_chan()
2502 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); in dspio_free_dma_chan()
2503 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); in dspio_free_dma_chan()
2505 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2509 if (status < 0) { in dspio_free_dma_chan()
2510 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); in dspio_free_dma_chan()
2514 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); in dspio_free_dma_chan()
2522 static int dsp_set_run_state(struct hda_codec *codec) in dsp_set_run_state() argument
2528 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); in dsp_set_run_state()
2529 if (err < 0) in dsp_set_run_state()
2535 if (halt_state != 0) { in dsp_set_run_state()
2538 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2540 if (err < 0) in dsp_set_run_state()
2545 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2547 if (err < 0) in dsp_set_run_state()
2551 return 0; in dsp_set_run_state()
2557 static int dsp_reset(struct hda_codec *codec) in dsp_reset() argument
2562 codec_dbg(codec, "dsp_reset\n"); in dsp_reset()
2564 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2565 retry--; in dsp_reset()
2566 } while (res == -EIO && retry); in dsp_reset()
2569 codec_dbg(codec, "dsp_reset timeout\n"); in dsp_reset()
2570 return -EIO; in dsp_reset()
2573 return 0; in dsp_reset()
2600 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) in dsp_is_dma_active() argument
2604 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); in dsp_is_dma_active()
2607 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2610 static int dsp_dma_setup_common(struct hda_codec *codec, in dsp_dma_setup_common() argument
2616 int status = 0; in dsp_dma_setup_common()
2622 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); in dsp_dma_setup_common()
2625 codec_dbg(codec, "dma chan num invalid\n"); in dsp_dma_setup_common()
2626 return -EINVAL; in dsp_dma_setup_common()
2629 if (dsp_is_dma_active(codec, dma_chan)) { in dsp_dma_setup_common()
2630 codec_dbg(codec, "dma already active\n"); in dsp_dma_setup_common()
2631 return -EBUSY; in dsp_dma_setup_common()
2637 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup_common()
2638 return -ENXIO; in dsp_dma_setup_common()
2642 active = 0; in dsp_dma_setup_common()
2644 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); in dsp_dma_setup_common()
2647 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, in dsp_dma_setup_common()
2650 if (status < 0) { in dsp_dma_setup_common()
2651 codec_dbg(codec, "read CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2654 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); in dsp_dma_setup_common()
2664 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); in dsp_dma_setup_common()
2665 if (status < 0) { in dsp_dma_setup_common()
2666 codec_dbg(codec, "write CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2669 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); in dsp_dma_setup_common()
2672 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, in dsp_dma_setup_common()
2675 if (status < 0) { in dsp_dma_setup_common()
2676 codec_dbg(codec, "read ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2679 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); in dsp_dma_setup_common()
2685 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); in dsp_dma_setup_common()
2686 if (status < 0) { in dsp_dma_setup_common()
2687 codec_dbg(codec, "write ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2691 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); in dsp_dma_setup_common()
2693 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2695 if (status < 0) { in dsp_dma_setup_common()
2696 codec_dbg(codec, "write AUDCHSEL Reg fail\n"); in dsp_dma_setup_common()
2699 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); in dsp_dma_setup_common()
2701 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2703 if (status < 0) { in dsp_dma_setup_common()
2704 codec_dbg(codec, "write IRQCNT Reg fail\n"); in dsp_dma_setup_common()
2707 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); in dsp_dma_setup_common()
2709 codec_dbg(codec, in dsp_dma_setup_common()
2710 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2711 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2715 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); in dsp_dma_setup_common()
2717 return 0; in dsp_dma_setup_common()
2721 * Setup the DSP DMA per-transfer-specific registers
2723 static int dsp_dma_setup(struct hda_codec *codec, in dsp_dma_setup() argument
2728 int status = 0; in dsp_dma_setup()
2735 unsigned int dma_cfg = 0; in dsp_dma_setup()
2736 unsigned int adr_ofs = 0; in dsp_dma_setup()
2737 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2738 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - in dsp_dma_setup()
2741 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); in dsp_dma_setup()
2744 codec_dbg(codec, "count too big\n"); in dsp_dma_setup()
2745 return -EINVAL; in dsp_dma_setup()
2750 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup()
2751 return -ENXIO; in dsp_dma_setup()
2754 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); in dsp_dma_setup()
2757 incr_field = 0; in dsp_dma_setup()
2768 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), in dsp_dma_setup()
2770 if (status < 0) { in dsp_dma_setup()
2771 codec_dbg(codec, "write DMACFG Reg fail\n"); in dsp_dma_setup()
2774 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); in dsp_dma_setup()
2776 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + in dsp_dma_setup()
2777 (code ? 0 : 1)); in dsp_dma_setup()
2779 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), in dsp_dma_setup()
2781 if (status < 0) { in dsp_dma_setup()
2782 codec_dbg(codec, "write DSPADROFS Reg fail\n"); in dsp_dma_setup()
2785 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); in dsp_dma_setup()
2787 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; in dsp_dma_setup()
2789 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; in dsp_dma_setup()
2793 status = chipio_write(codec, in dsp_dma_setup()
2795 if (status < 0) { in dsp_dma_setup()
2796 codec_dbg(codec, "write XFRCNT Reg fail\n"); in dsp_dma_setup()
2799 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); in dsp_dma_setup()
2801 codec_dbg(codec, in dsp_dma_setup()
2802 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2803 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2806 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); in dsp_dma_setup()
2808 return 0; in dsp_dma_setup()
2814 static int dsp_dma_start(struct hda_codec *codec, in dsp_dma_start() argument
2817 unsigned int reg = 0; in dsp_dma_start()
2818 int status = 0; in dsp_dma_start()
2820 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); in dsp_dma_start()
2823 status = chipio_read(codec, in dsp_dma_start()
2826 if (status < 0) { in dsp_dma_start()
2827 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_start()
2830 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); in dsp_dma_start()
2836 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_start()
2838 if (status < 0) { in dsp_dma_start()
2839 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_start()
2842 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); in dsp_dma_start()
2850 static int dsp_dma_stop(struct hda_codec *codec, in dsp_dma_stop() argument
2853 unsigned int reg = 0; in dsp_dma_stop()
2854 int status = 0; in dsp_dma_stop()
2856 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); in dsp_dma_stop()
2859 status = chipio_read(codec, in dsp_dma_stop()
2862 if (status < 0) { in dsp_dma_stop()
2863 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_stop()
2866 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); in dsp_dma_stop()
2871 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_stop()
2873 if (status < 0) { in dsp_dma_stop()
2874 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_stop()
2877 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); in dsp_dma_stop()
2883 * dsp_allocate_router_ports - Allocate router ports
2885 * @codec: the HDA codec
2893 static int dsp_allocate_router_ports(struct hda_codec *codec, in dsp_allocate_router_ports() argument
2899 int status = 0; in dsp_allocate_router_ports()
2903 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2904 if (status < 0) in dsp_allocate_router_ports()
2908 val |= (ports_per_channel - 1) << 4; in dsp_allocate_router_ports()
2909 val |= num_chans - 1; in dsp_allocate_router_ports()
2911 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2915 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2919 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2920 if (status < 0) in dsp_allocate_router_ports()
2923 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2924 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2928 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2934 static int dsp_free_router_ports(struct hda_codec *codec) in dsp_free_router_ports() argument
2936 int status = 0; in dsp_free_router_ports()
2938 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2939 if (status < 0) in dsp_free_router_ports()
2942 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2946 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2954 static int dsp_allocate_ports(struct hda_codec *codec, in dsp_allocate_ports() argument
2960 codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); in dsp_allocate_ports()
2963 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports()
2964 return -EINVAL; in dsp_allocate_ports()
2967 status = dsp_allocate_router_ports(codec, num_chans, in dsp_allocate_ports()
2968 rate_multi, 0, port_map); in dsp_allocate_ports()
2970 codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); in dsp_allocate_ports()
2975 static int dsp_allocate_ports_format(struct hda_codec *codec, in dsp_allocate_ports_format() argument
2981 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2986 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports_format()
2987 return -EINVAL; in dsp_allocate_ports_format()
2992 return dsp_allocate_ports(codec, num_chans, rate_multi, port_map); in dsp_allocate_ports_format()
2998 static int dsp_free_ports(struct hda_codec *codec) in dsp_free_ports() argument
3002 codec_dbg(codec, " dsp_free_ports() -- begin\n"); in dsp_free_ports()
3004 status = dsp_free_router_ports(codec); in dsp_free_ports()
3005 if (status < 0) { in dsp_free_ports()
3006 codec_dbg(codec, "free router ports fail\n"); in dsp_free_ports()
3009 codec_dbg(codec, " dsp_free_ports() -- complete\n"); in dsp_free_ports()
3018 struct hda_codec *codec; member
3026 DMA_STATE_STOP = 0,
3030 static int dma_convert_to_hda_format(struct hda_codec *codec, in dma_convert_to_hda_format() argument
3038 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
3043 return 0; in dma_convert_to_hda_format()
3051 struct hda_codec *codec = dma->codec; in dma_reset() local
3052 struct ca0132_spec *spec = codec->spec; in dma_reset()
3055 if (dma->dmab->area) in dma_reset()
3056 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab); in dma_reset()
3058 status = snd_hda_codec_load_dsp_prepare(codec, in dma_reset()
3059 dma->m_converter_format, in dma_reset()
3060 dma->buf_size, in dma_reset()
3061 dma->dmab); in dma_reset()
3062 if (status < 0) in dma_reset()
3064 spec->dsp_stream_id = status; in dma_reset()
3065 return 0; in dma_reset()
3080 return 0; in dma_set_state()
3083 snd_hda_codec_load_dsp_trigger(dma->codec, cmd); in dma_set_state()
3084 return 0; in dma_set_state()
3089 return dma->dmab->bytes; in dma_get_buffer_size()
3094 return dma->dmab->area; in dma_get_buffer_addr()
3101 memcpy(dma->dmab->area, data, count); in dma_xfer()
3102 return 0; in dma_xfer()
3110 *format = dma->m_converter_format; in dma_get_converter_format()
3115 struct ca0132_spec *spec = dma->codec->spec; in dma_get_stream_id()
3117 return spec->dsp_stream_id; in dma_get_stream_id()
3127 static const u32 g_magic_value = 0x4c46584d;
3128 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3132 return p->magic == g_magic_value; in is_valid()
3137 return g_chip_addr_magic_value == p->chip_addr; in is_hci_prog_list_seg()
3142 return p->count == 0; in is_last()
3147 return struct_size(p, data, p->count); in dsp_sizeof()
3159 #define INVALID_DMA_CHANNEL (~0U)
3166 static int dspxfr_hci_write(struct hda_codec *codec, in dspxfr_hci_write() argument
3173 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { in dspxfr_hci_write()
3174 codec_dbg(codec, "hci_write invalid params\n"); in dspxfr_hci_write()
3175 return -EINVAL; in dspxfr_hci_write()
3178 count = fls->count; in dspxfr_hci_write()
3179 data = (u32 *)(fls->data); in dspxfr_hci_write()
3181 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3182 if (status < 0) { in dspxfr_hci_write()
3183 codec_dbg(codec, "hci_write chipio failed\n"); in dspxfr_hci_write()
3186 count -= 2; in dspxfr_hci_write()
3189 return 0; in dspxfr_hci_write()
3193 * dspxfr_one_seg - Write a block of data into DSP code or data RAM using pre-allocated DMA engine.
3195 * @codec: the HDA codec
3197 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3206 static int dspxfr_one_seg(struct hda_codec *codec, in dspxfr_one_seg() argument
3214 int status = 0; in dspxfr_one_seg()
3235 return -EINVAL; in dspxfr_one_seg()
3242 codec_dbg(codec, "hci_write\n"); in dspxfr_one_seg()
3243 return dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3246 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3247 codec_dbg(codec, "Invalid Params\n"); in dspxfr_one_seg()
3248 return -EINVAL; in dspxfr_one_seg()
3251 data = fls->data; in dspxfr_one_seg()
3252 chip_addx = fls->chip_addr; in dspxfr_one_seg()
3253 words_to_write = fls->count; in dspxfr_one_seg()
3256 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3258 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3263 codec_dbg(codec, "Invalid chip_addx Params\n"); in dspxfr_one_seg()
3264 return -EINVAL; in dspxfr_one_seg()
3273 codec_dbg(codec, "dma_engine buffer NULL\n"); in dspxfr_one_seg()
3274 return -EINVAL; in dspxfr_one_seg()
3278 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3282 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3285 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3286 codec_dbg(codec, "frmsz zero\n"); in dspxfr_one_seg()
3287 return -EINVAL; in dspxfr_one_seg()
3293 buffer_size_words -= buffer_size_words % hda_frame_size_words; in dspxfr_one_seg()
3294 codec_dbg(codec, in dspxfr_one_seg()
3295 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3301 codec_dbg(codec, "dspxfr_one_seg:failed\n"); in dspxfr_one_seg()
3302 return -EINVAL; in dspxfr_one_seg()
3311 words_to_write -= remainder_words; in dspxfr_one_seg()
3313 while (words_to_write != 0) { in dspxfr_one_seg()
3315 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", in dspxfr_one_seg()
3319 status = dsp_dma_stop(codec, dma_chan, ovly); in dspxfr_one_seg()
3320 if (status < 0) in dspxfr_one_seg()
3322 status = dsp_dma_setup_common(codec, chip_addx, in dspxfr_one_seg()
3324 if (status < 0) in dspxfr_one_seg()
3329 status = dsp_dma_setup(codec, chip_addx, in dspxfr_one_seg()
3331 if (status < 0) in dspxfr_one_seg()
3333 status = dsp_dma_start(codec, dma_chan, ovly); in dspxfr_one_seg()
3334 if (status < 0) in dspxfr_one_seg()
3336 if (!dsp_is_dma_active(codec, dma_chan)) { in dspxfr_one_seg()
3337 codec_dbg(codec, "dspxfr:DMA did not start\n"); in dspxfr_one_seg()
3338 return -EIO; in dspxfr_one_seg()
3341 if (status < 0) in dspxfr_one_seg()
3343 if (remainder_words != 0) { in dspxfr_one_seg()
3344 status = chipio_write_multiple(codec, in dspxfr_one_seg()
3348 if (status < 0) in dspxfr_one_seg()
3350 remainder_words = 0; in dspxfr_one_seg()
3353 status = dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3354 if (status < 0) in dspxfr_one_seg()
3361 dma_active = dsp_is_dma_active(codec, dma_chan); in dspxfr_one_seg()
3369 codec_dbg(codec, "+++++ DMA complete\n"); in dspxfr_one_seg()
3373 if (status < 0) in dspxfr_one_seg()
3378 words_to_write -= run_size_words; in dspxfr_one_seg()
3381 if (remainder_words != 0) { in dspxfr_one_seg()
3382 status = chipio_write_multiple(codec, chip_addx_remainder, in dspxfr_one_seg()
3390 * dspxfr_image - Write the entire DSP image of a DSP code/data overlay to DSP memories
3392 * @codec: the HDA codec
3394 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3402 static int dspxfr_image(struct hda_codec *codec, in dspxfr_image() argument
3409 struct ca0132_spec *spec = codec->spec; in dspxfr_image()
3411 unsigned short hda_format = 0; in dspxfr_image()
3413 unsigned char stream_id = 0; in dspxfr_image()
3419 return -EINVAL; in dspxfr_image()
3423 return -ENOMEM; in dspxfr_image()
3425 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL); in dspxfr_image()
3426 if (!dma_engine->dmab) { in dspxfr_image()
3428 return -ENOMEM; in dspxfr_image()
3431 dma_engine->codec = codec; in dspxfr_image()
3432 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format); in dspxfr_image()
3433 dma_engine->m_converter_format = hda_format; in dspxfr_image()
3434 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : in dspxfr_image()
3437 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3439 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, in dspxfr_image()
3442 if (status < 0) { in dspxfr_image()
3443 codec_dbg(codec, "set converter format fail\n"); in dspxfr_image()
3447 status = snd_hda_codec_load_dsp_prepare(codec, in dspxfr_image()
3448 dma_engine->m_converter_format, in dspxfr_image()
3449 dma_engine->buf_size, in dspxfr_image()
3450 dma_engine->dmab); in dspxfr_image()
3451 if (status < 0) in dspxfr_image()
3453 spec->dsp_stream_id = status; in dspxfr_image()
3456 status = dspio_alloc_dma_chan(codec, &dma_chan); in dspxfr_image()
3457 if (status < 0) { in dspxfr_image()
3458 codec_dbg(codec, "alloc dmachan fail\n"); in dspxfr_image()
3464 port_map_mask = 0; in dspxfr_image()
3465 status = dsp_allocate_ports_format(codec, hda_format, in dspxfr_image()
3467 if (status < 0) { in dspxfr_image()
3468 codec_dbg(codec, "alloc ports fail\n"); in dspxfr_image()
3473 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3474 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3475 if (status < 0) { in dspxfr_image()
3476 codec_dbg(codec, "set stream chan fail\n"); in dspxfr_image()
3482 codec_dbg(codec, "FLS check fail\n"); in dspxfr_image()
3483 status = -EINVAL; in dspxfr_image()
3486 status = dspxfr_one_seg(codec, fls_data, reloc, in dspxfr_image()
3489 if (status < 0) in dspxfr_image()
3499 if (port_map_mask != 0) in dspxfr_image()
3500 status = dsp_free_ports(codec); in dspxfr_image()
3502 if (status < 0) in dspxfr_image()
3505 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3506 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3510 dspio_free_dma_chan(codec, dma_chan); in dspxfr_image()
3512 if (dma_engine->dmab->area) in dspxfr_image()
3513 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab); in dspxfr_image()
3514 kfree(dma_engine->dmab); in dspxfr_image()
3523 static void dspload_post_setup(struct hda_codec *codec) in dspload_post_setup() argument
3525 struct ca0132_spec *spec = codec->spec; in dspload_post_setup()
3526 codec_dbg(codec, "---- dspload_post_setup ------\n"); in dspload_post_setup()
3529 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3530 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3533 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3538 * dspload_image - Download DSP from a DSP Image Fast Load structure.
3540 * @codec: the HDA codec
3543 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3546 * @router_chans: number of audio router channels to be allocated (0 means use
3550 * linear, non-constant sized element array of structures, each of which
3555 static int dspload_image(struct hda_codec *codec, in dspload_image() argument
3562 int status = 0; in dspload_image()
3566 codec_dbg(codec, "---- dspload_image begin ------\n"); in dspload_image()
3567 if (router_chans == 0) { in dspload_image()
3583 codec_dbg(codec, "Ready to program DMA\n"); in dspload_image()
3585 status = dsp_reset(codec); in dspload_image()
3587 if (status < 0) in dspload_image()
3590 codec_dbg(codec, "dsp_reset() complete\n"); in dspload_image()
3591 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, in dspload_image()
3594 if (status < 0) in dspload_image()
3597 codec_dbg(codec, "dspxfr_image() complete\n"); in dspload_image()
3599 dspload_post_setup(codec); in dspload_image()
3600 status = dsp_set_run_state(codec); in dspload_image()
3603 codec_dbg(codec, "LOAD FINISHED\n"); in dspload_image()
3604 } while (0); in dspload_image()
3610 static bool dspload_is_loaded(struct hda_codec *codec) in dspload_is_loaded() argument
3612 unsigned int data = 0; in dspload_is_loaded()
3613 int status = 0; in dspload_is_loaded()
3615 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3616 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3622 #define dspload_is_loaded(codec) false argument
3625 static bool dspload_wait_loaded(struct hda_codec *codec) in dspload_wait_loaded() argument
3630 if (dspload_is_loaded(codec)) { in dspload_wait_loaded()
3631 codec_info(codec, "ca0132 DSP downloaded and running\n"); in dspload_wait_loaded()
3637 codec_err(codec, "ca0132 failed to download DSP\n"); in dspload_wait_loaded()
3642 * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3648 * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3649 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3652 * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3653 * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3656 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin, in ca0113_mmio_gpio_set() argument
3659 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_gpio_set()
3662 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3663 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3665 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3669 * Special pci region2 commands that are only used by the AE-5. They follow
3674 * target-id, and value.
3676 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group, in ca0113_mmio_command_set() argument
3679 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set()
3682 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3683 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3684 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3685 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3686 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3688 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3689 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3691 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3692 write_val = (target & 0xff); in ca0113_mmio_command_set()
3696 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3702 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3703 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3704 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3706 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3707 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3708 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3709 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3715 static void ca0113_mmio_command_set_type2(struct hda_codec *codec, in ca0113_mmio_command_set_type2() argument
3718 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set_type2()
3721 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3722 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3723 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3724 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3725 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3727 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3728 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3730 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3731 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3735 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3737 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3738 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3739 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3741 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3742 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3743 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3744 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3755 static void ca0132_gpio_init(struct hda_codec *codec) in ca0132_gpio_init() argument
3757 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_init()
3763 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3764 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3765 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3768 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3769 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3778 static void ca0132_gpio_setup(struct hda_codec *codec) in ca0132_gpio_setup() argument
3780 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_setup()
3784 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3785 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3786 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3787 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3788 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3789 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3790 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3791 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3794 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3795 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3796 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3797 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3798 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3799 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3811 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3813 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3828 /* Set GPIO bit 1 to 0 for rear mic */
3829 R3DI_REAR_MIC = 0,
3835 /* Set GPIO bit 2 to 0 for headphone */
3836 R3DI_HEADPHONE_OUT = 0,
3842 R3DI_DSP_DOWNLOADING = 0,
3848 static void r3di_gpio_mic_set(struct hda_codec *codec, in r3di_gpio_mic_set() argument
3854 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3864 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3868 static void r3di_gpio_dsp_status_set(struct hda_codec *codec, in r3di_gpio_dsp_status_set() argument
3874 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3879 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3883 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3886 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3893 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3901 struct hda_codec *codec, in ca0132_playback_pcm_prepare() argument
3906 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_prepare()
3908 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3910 return 0; in ca0132_playback_pcm_prepare()
3914 struct hda_codec *codec, in ca0132_playback_pcm_cleanup() argument
3917 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_cleanup()
3919 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_playback_pcm_cleanup()
3920 return 0; in ca0132_playback_pcm_cleanup()
3924 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_playback_pcm_cleanup()
3927 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3929 return 0; in ca0132_playback_pcm_cleanup()
3933 struct hda_codec *codec, in ca0132_playback_pcm_delay() argument
3936 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_delay()
3938 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_playback_pcm_delay()
3940 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_playback_pcm_delay()
3941 return 0; in ca0132_playback_pcm_delay()
3944 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) { in ca0132_playback_pcm_delay()
3945 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) || in ca0132_playback_pcm_delay()
3946 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID])) in ca0132_playback_pcm_delay()
3951 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_playback_pcm_delay()
3954 return (latency * runtime->rate) / 1000; in ca0132_playback_pcm_delay()
3961 struct hda_codec *codec, in ca0132_dig_playback_pcm_open() argument
3964 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_open()
3965 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in ca0132_dig_playback_pcm_open()
3969 struct hda_codec *codec, in ca0132_dig_playback_pcm_prepare() argument
3974 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_prepare()
3975 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in ca0132_dig_playback_pcm_prepare()
3980 struct hda_codec *codec, in ca0132_dig_playback_pcm_cleanup() argument
3983 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_cleanup()
3984 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout); in ca0132_dig_playback_pcm_cleanup()
3988 struct hda_codec *codec, in ca0132_dig_playback_pcm_close() argument
3991 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_close()
3992 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in ca0132_dig_playback_pcm_close()
3999 struct hda_codec *codec, in ca0132_capture_pcm_prepare() argument
4004 snd_hda_codec_setup_stream(codec, hinfo->nid, in ca0132_capture_pcm_prepare()
4005 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
4007 return 0; in ca0132_capture_pcm_prepare()
4011 struct hda_codec *codec, in ca0132_capture_pcm_cleanup() argument
4014 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_cleanup()
4016 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_capture_pcm_cleanup()
4017 return 0; in ca0132_capture_pcm_cleanup()
4019 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in ca0132_capture_pcm_cleanup()
4020 return 0; in ca0132_capture_pcm_cleanup()
4024 struct hda_codec *codec, in ca0132_capture_pcm_delay() argument
4027 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_delay()
4029 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_capture_pcm_delay()
4031 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_capture_pcm_delay()
4032 return 0; in ca0132_capture_pcm_delay()
4034 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_capture_pcm_delay()
4037 return (latency * runtime->rate) / 1000; in ca0132_capture_pcm_delay()
4058 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4076 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4085 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4101 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
4105 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
4106 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
4107 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
4108 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
4109 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
4110 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
4111 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
4112 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
4113 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
4114 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
4115 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
4116 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4117 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4118 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4119 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4120 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4121 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
4125 * This table counts from float 0 to 1 in increments of .01, which is
4129 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4130 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4131 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4132 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4133 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4134 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4135 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4136 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4137 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4138 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4139 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4140 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4141 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4142 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4143 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4144 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4145 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4149 * This table counts from float 10 to 1000, which is the range of the x-bass
4153 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4154 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4155 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4156 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4157 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4158 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4159 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4160 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4161 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4162 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4163 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4164 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4165 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4166 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4167 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4168 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4169 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4176 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4177 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4178 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4179 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4180 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4181 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4182 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4183 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4184 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4185 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4186 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4187 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4188 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4189 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4190 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4191 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4192 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4193 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4194 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4195 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4196 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4197 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4198 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4199 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4200 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4201 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4202 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4206 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4207 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4208 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4209 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4210 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4211 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4212 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4213 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4214 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4215 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4216 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4217 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4218 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4219 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4220 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4221 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4222 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4226 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4227 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4228 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4229 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4230 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4231 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4232 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4233 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4234 0x41C00000
4237 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, in tuning_ctl_set() argument
4240 int i = 0; in tuning_ctl_set()
4242 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4246 return -EINVAL; in tuning_ctl_set()
4248 snd_hda_power_up(codec); in tuning_ctl_set()
4249 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4252 snd_hda_power_down(codec); in tuning_ctl_set()
4260 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in tuning_ctl_get() local
4261 struct ca0132_spec *spec = codec->spec; in tuning_ctl_get()
4263 long *valp = ucontrol->value.integer.value; in tuning_ctl_get()
4264 int idx = nid - TUNING_CTL_START_NID; in tuning_ctl_get()
4266 *valp = spec->cur_ctl_vals[idx]; in tuning_ctl_get()
4267 return 0; in tuning_ctl_get()
4274 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in voice_focus_ctl_info()
4275 uinfo->count = chs == 3 ? 2 : 1; in voice_focus_ctl_info()
4276 uinfo->value.integer.min = 20; in voice_focus_ctl_info()
4277 uinfo->value.integer.max = 180; in voice_focus_ctl_info()
4278 uinfo->value.integer.step = 1; in voice_focus_ctl_info()
4280 return 0; in voice_focus_ctl_info()
4286 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in voice_focus_ctl_put() local
4287 struct ca0132_spec *spec = codec->spec; in voice_focus_ctl_put()
4289 long *valp = ucontrol->value.integer.value; in voice_focus_ctl_put()
4292 idx = nid - TUNING_CTL_START_NID; in voice_focus_ctl_put()
4294 if (spec->cur_ctl_vals[idx] == *valp) in voice_focus_ctl_put()
4295 return 0; in voice_focus_ctl_put()
4297 spec->cur_ctl_vals[idx] = *valp; in voice_focus_ctl_put()
4299 idx = *valp - 20; in voice_focus_ctl_put()
4300 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); in voice_focus_ctl_put()
4309 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in mic_svm_ctl_info()
4310 uinfo->count = chs == 3 ? 2 : 1; in mic_svm_ctl_info()
4311 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4312 uinfo->value.integer.max = 100; in mic_svm_ctl_info()
4313 uinfo->value.integer.step = 1; in mic_svm_ctl_info()
4315 return 0; in mic_svm_ctl_info()
4321 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in mic_svm_ctl_put() local
4322 struct ca0132_spec *spec = codec->spec; in mic_svm_ctl_put()
4324 long *valp = ucontrol->value.integer.value; in mic_svm_ctl_put()
4327 idx = nid - TUNING_CTL_START_NID; in mic_svm_ctl_put()
4329 if (spec->cur_ctl_vals[idx] == *valp) in mic_svm_ctl_put()
4330 return 0; in mic_svm_ctl_put()
4332 spec->cur_ctl_vals[idx] = *valp; in mic_svm_ctl_put()
4335 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); in mic_svm_ctl_put()
4337 return 0; in mic_svm_ctl_put()
4344 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in equalizer_ctl_info()
4345 uinfo->count = chs == 3 ? 2 : 1; in equalizer_ctl_info()
4346 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4347 uinfo->value.integer.max = 48; in equalizer_ctl_info()
4348 uinfo->value.integer.step = 1; in equalizer_ctl_info()
4350 return 0; in equalizer_ctl_info()
4356 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in equalizer_ctl_put() local
4357 struct ca0132_spec *spec = codec->spec; in equalizer_ctl_put()
4359 long *valp = ucontrol->value.integer.value; in equalizer_ctl_put()
4362 idx = nid - TUNING_CTL_START_NID; in equalizer_ctl_put()
4364 if (spec->cur_ctl_vals[idx] == *valp) in equalizer_ctl_put()
4365 return 0; in equalizer_ctl_put()
4367 spec->cur_ctl_vals[idx] = *valp; in equalizer_ctl_put()
4370 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); in equalizer_ctl_put()
4375 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4376 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4378 static int add_tuning_control(struct hda_codec *codec, in add_tuning_control() argument
4385 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4389 knew.tlv.c = 0; in add_tuning_control()
4390 knew.tlv.p = 0; in add_tuning_control()
4410 return 0; in add_tuning_control()
4413 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4415 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_tuning_control()
4418 static int add_tuning_ctls(struct hda_codec *codec) in add_tuning_ctls() argument
4423 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4424 err = add_tuning_control(codec, in add_tuning_ctls()
4429 if (err < 0) in add_tuning_ctls()
4433 return 0; in add_tuning_ctls()
4436 static void ca0132_init_tuning_defaults(struct hda_codec *codec) in ca0132_init_tuning_defaults() argument
4438 struct ca0132_spec *spec = codec->spec; in ca0132_init_tuning_defaults()
4441 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ in ca0132_init_tuning_defaults()
4442 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; in ca0132_init_tuning_defaults()
4444 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; in ca0132_init_tuning_defaults()
4446 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4448 spec->cur_ctl_vals[i] = 24; in ca0132_init_tuning_defaults()
4455 * If jack inserted, headphone will be selected, else built-in speakers
4458 static int ca0132_select_out(struct hda_codec *codec) in ca0132_select_out() argument
4460 struct ca0132_spec *spec = codec->spec; in ca0132_select_out()
4467 codec_dbg(codec, "ca0132_select_out\n"); in ca0132_select_out()
4469 snd_hda_power_up_pm(codec); in ca0132_select_out()
4471 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_select_out()
4474 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp); in ca0132_select_out()
4477 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; in ca0132_select_out()
4480 spec->cur_out_type = HEADPHONE_OUT; in ca0132_select_out()
4482 spec->cur_out_type = SPEAKER_OUT; in ca0132_select_out()
4484 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_select_out()
4485 codec_dbg(codec, "ca0132_select_out speaker\n"); in ca0132_select_out()
4488 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4489 if (err < 0) in ca0132_select_out()
4493 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4494 if (err < 0) in ca0132_select_out()
4498 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4499 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4500 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4501 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4502 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4503 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4504 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4505 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4508 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4509 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4510 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4513 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4514 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4515 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4518 codec_dbg(codec, "ca0132_select_out hp\n"); in ca0132_select_out()
4521 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4522 if (err < 0) in ca0132_select_out()
4526 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4527 if (err < 0) in ca0132_select_out()
4531 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4532 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4533 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4534 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4535 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4536 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4537 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4538 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4541 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4542 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4543 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4546 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4547 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4548 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4553 snd_hda_power_down_pm(codec); in ca0132_select_out()
4555 return err < 0 ? err : 0; in ca0132_select_out()
4558 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4559 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4560 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4562 static void ae5_mmio_select_out(struct hda_codec *codec) in ae5_mmio_select_out() argument
4564 struct ca0132_spec *spec = codec->spec; in ae5_mmio_select_out()
4573 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4574 ca0113_mmio_command_set(codec, out_cmds->group[i], in ae5_mmio_select_out()
4575 out_cmds->target[i], in ae5_mmio_select_out()
4576 out_cmds->vals[spec->cur_out_type][i]); in ae5_mmio_select_out()
4579 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec) in ca0132_alt_set_full_range_speaker() argument
4581 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_full_range_speaker()
4586 /* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */ in ca0132_alt_set_full_range_speaker()
4587 if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0 in ca0132_alt_set_full_range_speaker()
4588 || spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_set_full_range_speaker()
4589 return 0; in ca0132_alt_set_full_range_speaker()
4591 /* Set front L/R full range. Zero for full-range, one for redirection. */ in ca0132_alt_set_full_range_speaker()
4592 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4593 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4595 if (err < 0) in ca0132_alt_set_full_range_speaker()
4598 /* When setting full-range rear, both rear and center/lfe are set. */ in ca0132_alt_set_full_range_speaker()
4599 tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4600 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4602 if (err < 0) in ca0132_alt_set_full_range_speaker()
4605 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4607 if (err < 0) in ca0132_alt_set_full_range_speaker()
4611 * Only the AE series cards set this value when setting full-range, in ca0132_alt_set_full_range_speaker()
4615 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4617 if (err < 0) in ca0132_alt_set_full_range_speaker()
4621 return 0; in ca0132_alt_set_full_range_speaker()
4624 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec, in ca0132_alt_surround_set_bass_redirection() argument
4627 struct ca0132_spec *spec = codec->spec; in ca0132_alt_surround_set_bass_redirection()
4631 if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 && in ca0132_alt_surround_set_bass_redirection()
4632 spec->channel_cfg_val != SPEAKER_CHANNELS_2_0) in ca0132_alt_surround_set_bass_redirection()
4637 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4638 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4643 tmp = float_xbass_xover_lookup[spec->xbass_xover_freq]; in ca0132_alt_surround_set_bass_redirection()
4644 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4646 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4650 return 0; in ca0132_alt_surround_set_bass_redirection()
4657 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec, in ca0132_alt_select_out_get_quirk_data() argument
4660 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_get_quirk_data()
4665 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4673 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec) in ca0132_alt_select_out_quirk_set() argument
4677 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_quirk_set()
4681 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data); in ca0132_alt_select_out_quirk_set()
4683 return 0; in ca0132_alt_select_out_quirk_set()
4685 out_info = &quirk_data->out_set_info[spec->cur_out_type]; in ca0132_alt_select_out_quirk_set()
4686 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4687 ae5_mmio_select_out(codec); in ca0132_alt_select_out_quirk_set()
4689 if (out_info->has_hda_gpio) { in ca0132_alt_select_out_quirk_set()
4690 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4691 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4693 if (out_info->hda_gpio_set) in ca0132_alt_select_out_quirk_set()
4694 gpio_data |= (1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4696 gpio_data &= ~(1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4698 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4702 if (out_info->mmio_gpio_count) { in ca0132_alt_select_out_quirk_set()
4703 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4704 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i], in ca0132_alt_select_out_quirk_set()
4705 out_info->mmio_gpio_set[i]); in ca0132_alt_select_out_quirk_set()
4709 if (out_info->scp_cmds_count) { in ca0132_alt_select_out_quirk_set()
4710 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4711 err = dspio_set_uint_param(codec, in ca0132_alt_select_out_quirk_set()
4712 out_info->scp_cmd_mid[i], in ca0132_alt_select_out_quirk_set()
4713 out_info->scp_cmd_req[i], in ca0132_alt_select_out_quirk_set()
4714 out_info->scp_cmd_val[i]); in ca0132_alt_select_out_quirk_set()
4715 if (err < 0) in ca0132_alt_select_out_quirk_set()
4720 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4722 if (out_info->has_chipio_write) { in ca0132_alt_select_out_quirk_set()
4723 chipio_write(codec, out_info->chipio_write_addr, in ca0132_alt_select_out_quirk_set()
4724 out_info->chipio_write_data); in ca0132_alt_select_out_quirk_set()
4727 if (quirk_data->has_headphone_gain) { in ca0132_alt_select_out_quirk_set()
4728 if (spec->cur_out_type != HEADPHONE_OUT) { in ca0132_alt_select_out_quirk_set()
4729 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4730 ae5_headphone_gain_set(codec, 2); in ca0132_alt_select_out_quirk_set()
4732 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4734 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4735 ae5_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4736 spec->ae5_headphone_gain_val); in ca0132_alt_select_out_quirk_set()
4738 zxr_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4739 spec->zxr_gain_set); in ca0132_alt_select_out_quirk_set()
4743 return 0; in ca0132_alt_select_out_quirk_set()
4746 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid, in ca0132_set_out_node_pincfg() argument
4751 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4752 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4756 snd_hda_set_pin_ctl(codec, nid, pin_ctl); in ca0132_set_out_node_pincfg()
4765 * It also adds the ability to auto-detect the front headphone port.
4767 static int ca0132_alt_select_out(struct hda_codec *codec) in ca0132_alt_select_out() argument
4769 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out()
4775 hda_nid_t headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4777 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_out()
4779 snd_hda_power_up_pm(codec); in ca0132_alt_select_out()
4781 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_select_out()
4789 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) || in ca0132_alt_select_out()
4790 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp); in ca0132_alt_select_out()
4793 spec->cur_out_type = HEADPHONE_OUT; in ca0132_alt_select_out()
4795 spec->cur_out_type = SPEAKER_OUT; in ca0132_alt_select_out()
4797 spec->cur_out_type = spec->out_enum_val; in ca0132_alt_select_out()
4799 outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]; in ca0132_alt_select_out()
4802 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4803 if (err < 0) in ca0132_alt_select_out()
4806 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4809 switch (spec->cur_out_type) { in ca0132_alt_select_out()
4811 codec_dbg(codec, "%s speaker\n", __func__); in ca0132_alt_select_out()
4814 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4815 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4818 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4819 /* Set front L-R to output. */ in ca0132_alt_select_out()
4820 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4822 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4824 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4831 if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_select_out()
4834 tmp = speaker_channel_cfgs[spec->channel_cfg_val].val; in ca0132_alt_select_out()
4836 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4837 if (err < 0) in ca0132_alt_select_out()
4842 codec_dbg(codec, "%s hp\n", __func__); in ca0132_alt_select_out()
4843 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4844 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4847 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4848 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4849 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4852 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp)) in ca0132_alt_select_out()
4853 headphone_nid = spec->out_pins[2]; in ca0132_alt_select_out()
4854 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp)) in ca0132_alt_select_out()
4855 headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4857 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1); in ca0132_alt_select_out()
4860 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4862 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4864 if (err < 0) in ca0132_alt_select_out()
4869 * If output effects are enabled, set the X-Bass effect value again to in ca0132_alt_select_out()
4874 ca0132_effects_set(codec, X_BASS, in ca0132_alt_select_out()
4875 spec->effects_switch[X_BASS - EFFECT_START_NID]); in ca0132_alt_select_out()
4877 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4878 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4879 if (err < 0) in ca0132_alt_select_out()
4886 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4888 if (err < 0) in ca0132_alt_select_out()
4891 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_alt_select_out()
4892 err = ca0132_alt_surround_set_bass_redirection(codec, in ca0132_alt_select_out()
4893 spec->bass_redirection_val); in ca0132_alt_select_out()
4895 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4898 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4900 if (err < 0) in ca0132_alt_select_out()
4903 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_alt_select_out()
4904 err = ca0132_alt_set_full_range_speaker(codec); in ca0132_alt_select_out()
4905 if (err < 0) in ca0132_alt_select_out()
4910 snd_hda_power_down_pm(codec); in ca0132_alt_select_out()
4912 return err < 0 ? err : 0; in ca0132_alt_select_out()
4922 ca0132_alt_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4924 ca0132_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4926 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp); in ca0132_unsol_hp_delayed()
4928 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4929 snd_hda_jack_report_sync(spec->codec); in ca0132_unsol_hp_delayed()
4933 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4934 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4935 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4936 static int stop_mic1(struct hda_codec *codec);
4937 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4938 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4943 static int ca0132_set_vipsource(struct hda_codec *codec, int val) in ca0132_set_vipsource() argument
4945 struct ca0132_spec *spec = codec->spec; in ca0132_set_vipsource()
4948 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_set_vipsource()
4949 return 0; in ca0132_set_vipsource()
4951 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4952 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_set_vipsource()
4953 (val == 0)) { in ca0132_set_vipsource()
4954 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4955 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_vipsource()
4956 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_vipsource()
4957 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4961 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4963 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4965 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_set_vipsource()
4966 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_set_vipsource()
4967 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4971 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4973 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4975 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_set_vipsource()
4981 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) in ca0132_alt_set_vipsource() argument
4983 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_vipsource()
4986 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_alt_set_vipsource()
4987 return 0; in ca0132_alt_set_vipsource()
4989 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_set_vipsource()
4991 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4992 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4994 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4995 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_alt_set_vipsource()
4996 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4997 codec_dbg(codec, "%s: off.", __func__); in ca0132_alt_set_vipsource()
4998 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
5001 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5003 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_set_vipsource()
5004 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_set_vipsource()
5006 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
5009 if (spec->in_enum_val == REAR_LINE_IN) in ca0132_alt_set_vipsource()
5018 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5021 codec_dbg(codec, "%s: on.", __func__); in ca0132_alt_set_vipsource()
5022 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_alt_set_vipsource()
5023 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_alt_set_vipsource()
5025 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
5027 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) in ca0132_alt_set_vipsource()
5031 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
5034 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
5037 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_alt_set_vipsource()
5040 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
5041 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
5049 * If jack inserted, ext.mic will be selected, else built-in mic
5052 static int ca0132_select_mic(struct hda_codec *codec) in ca0132_select_mic() argument
5054 struct ca0132_spec *spec = codec->spec; in ca0132_select_mic()
5058 codec_dbg(codec, "ca0132_select_mic\n"); in ca0132_select_mic()
5060 snd_hda_power_up_pm(codec); in ca0132_select_mic()
5062 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_select_mic()
5065 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1); in ca0132_select_mic()
5068 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; in ca0132_select_mic()
5071 spec->cur_mic_type = LINE_MIC_IN; in ca0132_select_mic()
5073 spec->cur_mic_type = DIGITAL_MIC; in ca0132_select_mic()
5075 if (spec->cur_mic_type == DIGITAL_MIC) { in ca0132_select_mic()
5077 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000); in ca0132_select_mic()
5078 ca0132_set_dmic(codec, 1); in ca0132_select_mic()
5079 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
5081 ca0132_effects_set(codec, VOICE_FOCUS, in ca0132_select_mic()
5082 spec->effects_switch in ca0132_select_mic()
5083 [VOICE_FOCUS - EFFECT_START_NID]); in ca0132_select_mic()
5086 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000); in ca0132_select_mic()
5087 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
5088 ca0132_mic_boost_set(codec, spec->cur_mic_boost); in ca0132_select_mic()
5090 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
5093 snd_hda_power_down_pm(codec); in ca0132_select_mic()
5095 return 0; in ca0132_select_mic()
5101 * The front mic has no jack-detection, so the only way to switch to it
5104 static int ca0132_alt_select_in(struct hda_codec *codec) in ca0132_alt_select_in() argument
5106 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_in()
5109 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_in()
5111 snd_hda_power_up_pm(codec); in ca0132_alt_select_in()
5113 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
5114 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
5116 spec->cur_mic_type = spec->in_enum_val; in ca0132_alt_select_in()
5118 switch (spec->cur_mic_type) { in ca0132_alt_select_in()
5123 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5130 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5134 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5138 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5140 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5142 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5144 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5151 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5152 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5154 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5156 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5158 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5159 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5162 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5163 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5166 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5167 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5170 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5171 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5176 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5179 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5183 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5186 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5189 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5192 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5193 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5195 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5197 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5203 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5204 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5206 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5212 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5217 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5218 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5223 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5224 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5230 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5231 ca0113_mmio_gpio_set(codec, 5, false); in ca0132_alt_select_in()
5235 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC); in ca0132_alt_select_in()
5239 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5247 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5248 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5250 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5252 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5254 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5255 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5259 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5260 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5263 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5264 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5269 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5272 ca0132_cvoice_switch_set(codec); in ca0132_alt_select_in()
5274 snd_hda_power_down_pm(codec); in ca0132_alt_select_in()
5275 return 0; in ca0132_alt_select_in()
5281 static bool ca0132_is_vnode_effective(struct hda_codec *codec, in ca0132_is_vnode_effective() argument
5285 struct ca0132_spec *spec = codec->spec; in ca0132_is_vnode_effective()
5290 nid = spec->shared_out_nid; in ca0132_is_vnode_effective()
5293 nid = spec->shared_mic_nid; in ca0132_is_vnode_effective()
5307 * They return 0 if no changed. Return 1 if changed.
5309 static int ca0132_voicefx_set(struct hda_codec *codec, int enable) in ca0132_voicefx_set() argument
5311 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_set()
5316 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? in ca0132_voicefx_set()
5322 dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_set()
5323 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5331 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) in ca0132_effects_set() argument
5333 struct ca0132_spec *spec = codec->spec; in ca0132_effects_set()
5336 int err = 0; in ca0132_effects_set()
5337 int idx = nid - EFFECT_START_NID; in ca0132_effects_set()
5339 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5340 return 0; /* no changed */ in ca0132_effects_set()
5345 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_effects_set()
5346 val = 0; in ca0132_effects_set()
5347 if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) { in ca0132_effects_set()
5348 channel_cfg = spec->channel_cfg_val; in ca0132_effects_set()
5351 val = 0; in ca0132_effects_set()
5358 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_effects_set()
5359 val = 0; in ca0132_effects_set()
5361 /* Voice Focus applies to 2-ch Mic, Digital Mic */ in ca0132_effects_set()
5362 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) in ca0132_effects_set()
5363 val = 0; in ca0132_effects_set()
5367 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5368 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5371 if (spec->effects_switch[VOICE_FOCUS - in ca0132_effects_set()
5378 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5383 * to module ID 0x47. No clue why. in ca0132_effects_set()
5386 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5387 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5389 if (spec->effects_switch[NOISE_REDUCTION - in ca0132_effects_set()
5397 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5402 spec->in_enum_val == REAR_LINE_IN) in ca0132_effects_set()
5403 val = 0; in ca0132_effects_set()
5406 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5409 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5410 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_effects_set()
5411 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5413 if (err < 0) in ca0132_effects_set()
5414 return 0; /* no changed */ in ca0132_effects_set()
5422 static int ca0132_pe_switch_set(struct hda_codec *codec) in ca0132_pe_switch_set() argument
5424 struct ca0132_spec *spec = codec->spec; in ca0132_pe_switch_set()
5426 int i, ret = 0; in ca0132_pe_switch_set()
5428 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", in ca0132_pe_switch_set()
5429 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); in ca0132_pe_switch_set()
5432 ca0132_alt_select_out(codec); in ca0132_pe_switch_set()
5434 i = OUT_EFFECT_START_NID - EFFECT_START_NID; in ca0132_pe_switch_set()
5438 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_pe_switch_set()
5444 static int stop_mic1(struct hda_codec *codec) in stop_mic1() argument
5446 struct ca0132_spec *spec = codec->spec; in stop_mic1()
5447 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5448 AC_VERB_GET_CONV, 0); in stop_mic1()
5449 if (oldval != 0) in stop_mic1()
5450 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5452 0); in stop_mic1()
5457 static void resume_mic1(struct hda_codec *codec, unsigned int oldval) in resume_mic1() argument
5459 struct ca0132_spec *spec = codec->spec; in resume_mic1()
5461 if (oldval != 0) in resume_mic1()
5462 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5470 static int ca0132_cvoice_switch_set(struct hda_codec *codec) in ca0132_cvoice_switch_set() argument
5472 struct ca0132_spec *spec = codec->spec; in ca0132_cvoice_switch_set()
5474 int i, ret = 0; in ca0132_cvoice_switch_set()
5477 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", in ca0132_cvoice_switch_set()
5478 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); in ca0132_cvoice_switch_set()
5480 i = IN_EFFECT_START_NID - EFFECT_START_NID; in ca0132_cvoice_switch_set()
5484 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_cvoice_switch_set()
5487 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5490 oldval = stop_mic1(codec); in ca0132_cvoice_switch_set()
5492 ret |= ca0132_alt_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5494 ret |= ca0132_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5495 resume_mic1(codec, oldval); in ca0132_cvoice_switch_set()
5499 static int ca0132_mic_boost_set(struct hda_codec *codec, long val) in ca0132_mic_boost_set() argument
5501 struct ca0132_spec *spec = codec->spec; in ca0132_mic_boost_set()
5502 int ret = 0; in ca0132_mic_boost_set()
5505 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5506 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5508 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5509 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5514 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val) in ca0132_alt_mic_boost_set() argument
5516 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_set()
5517 int ret = 0; in ca0132_alt_mic_boost_set()
5519 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5520 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5524 static int ae5_headphone_gain_set(struct hda_codec *codec, long val) in ae5_headphone_gain_set() argument
5528 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5529 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5531 return 0; in ae5_headphone_gain_set()
5538 static int zxr_headphone_gain_set(struct hda_codec *codec, long val) in zxr_headphone_gain_set() argument
5540 ca0113_mmio_gpio_set(codec, 1, val); in zxr_headphone_gain_set()
5542 return 0; in zxr_headphone_gain_set()
5548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_vnode_switch_set() local
5550 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5552 int ret = 0; in ca0132_vnode_switch_set()
5553 struct ca0132_spec *spec = codec->spec; in ca0132_vnode_switch_set()
5558 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5561 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5563 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5570 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5572 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5578 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5580 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5585 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5590 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_vnode_switch_set()
5596 mutex_lock(&codec->control_mutex); in ca0132_vnode_switch_set()
5597 pval = kcontrol->private_value; in ca0132_vnode_switch_set()
5598 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_vnode_switch_set()
5599 0, dir); in ca0132_vnode_switch_set()
5601 kcontrol->private_value = pval; in ca0132_vnode_switch_set()
5602 mutex_unlock(&codec->control_mutex); in ca0132_vnode_switch_set()
5609 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec, in ca0132_alt_bass_redirection_xover_set() argument
5612 snd_hda_power_up(codec); in ca0132_alt_bass_redirection_xover_set()
5614 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5617 snd_hda_power_down(codec); in ca0132_alt_bass_redirection_xover_set()
5629 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_slider_ctl_set() argument
5632 int i = 0; in ca0132_alt_slider_ctl_set()
5643 snd_hda_power_up(codec); in ca0132_alt_slider_ctl_set()
5645 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5649 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5651 &(lookup[idx - 1]), sizeof(unsigned int)); in ca0132_alt_slider_ctl_set()
5654 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5658 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5663 snd_hda_power_down(codec); in ca0132_alt_slider_ctl_set()
5665 return 0; in ca0132_alt_slider_ctl_set()
5671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_ctl_get() local
5672 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_ctl_get()
5673 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_ctl_get()
5677 *valp = spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5679 *valp = spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5681 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5687 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_slider_ctl_get() local
5688 struct ca0132_spec *spec = codec->spec; in ca0132_alt_slider_ctl_get()
5690 long *valp = ucontrol->value.integer.value; in ca0132_alt_slider_ctl_get()
5691 int idx = nid - OUT_EFFECT_START_NID; in ca0132_alt_slider_ctl_get()
5693 *valp = spec->fx_ctl_val[idx]; in ca0132_alt_slider_ctl_get()
5694 return 0; in ca0132_alt_slider_ctl_get()
5698 * The X-bass crossover starts at 10hz, so the min is 1. The
5704 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_xbass_xover_slider_info()
5705 uinfo->count = 1; in ca0132_alt_xbass_xover_slider_info()
5706 uinfo->value.integer.min = 1; in ca0132_alt_xbass_xover_slider_info()
5707 uinfo->value.integer.max = 100; in ca0132_alt_xbass_xover_slider_info()
5708 uinfo->value.integer.step = 1; in ca0132_alt_xbass_xover_slider_info()
5710 return 0; in ca0132_alt_xbass_xover_slider_info()
5718 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_effect_slider_info()
5719 uinfo->count = chs == 3 ? 2 : 1; in ca0132_alt_effect_slider_info()
5720 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5721 uinfo->value.integer.max = 100; in ca0132_alt_effect_slider_info()
5722 uinfo->value.integer.step = 1; in ca0132_alt_effect_slider_info()
5724 return 0; in ca0132_alt_effect_slider_info()
5730 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_put() local
5731 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_put()
5733 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_put()
5738 cur_val = &spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5740 cur_val = &spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5744 return 0; in ca0132_alt_xbass_xover_slider_put()
5750 ca0132_alt_bass_redirection_xover_set(codec, *cur_val); in ca0132_alt_xbass_xover_slider_put()
5752 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx); in ca0132_alt_xbass_xover_slider_put()
5754 return 0; in ca0132_alt_xbass_xover_slider_put()
5760 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_effect_slider_put() local
5761 struct ca0132_spec *spec = codec->spec; in ca0132_alt_effect_slider_put()
5763 long *valp = ucontrol->value.integer.value; in ca0132_alt_effect_slider_put()
5766 idx = nid - EFFECT_START_NID; in ca0132_alt_effect_slider_put()
5768 if (spec->fx_ctl_val[idx] == *valp) in ca0132_alt_effect_slider_put()
5769 return 0; in ca0132_alt_effect_slider_put()
5771 spec->fx_ctl_val[idx] = *valp; in ca0132_alt_effect_slider_put()
5774 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx); in ca0132_alt_effect_slider_put()
5776 return 0; in ca0132_alt_effect_slider_put()
5783 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5794 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_mic_boost_info()
5795 uinfo->count = 1; in ca0132_alt_mic_boost_info()
5796 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS; in ca0132_alt_mic_boost_info()
5797 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS) in ca0132_alt_mic_boost_info()
5798 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1; in ca0132_alt_mic_boost_info()
5799 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx); in ca0132_alt_mic_boost_info()
5800 strcpy(uinfo->value.enumerated.name, namestr); in ca0132_alt_mic_boost_info()
5801 return 0; in ca0132_alt_mic_boost_info()
5807 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_get() local
5808 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_get()
5810 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5811 return 0; in ca0132_alt_mic_boost_get()
5817 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_put() local
5818 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_put()
5819 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5823 return 0; in ca0132_alt_mic_boost_put()
5825 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n", in ca0132_alt_mic_boost_put()
5828 spec->mic_boost_enum_val = sel; in ca0132_alt_mic_boost_put()
5830 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_alt_mic_boost_put()
5831 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_mic_boost_put()
5837 * Sound BlasterX AE-5 Headphone Gain Controls.
5846 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_headphone_gain_info()
5847 uinfo->count = 1; in ae5_headphone_gain_info()
5848 uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX; in ae5_headphone_gain_info()
5849 if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX) in ae5_headphone_gain_info()
5850 uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1; in ae5_headphone_gain_info()
5852 ae5_headphone_gain_presets[uinfo->value.enumerated.item].name, in ae5_headphone_gain_info()
5854 strcpy(uinfo->value.enumerated.name, namestr); in ae5_headphone_gain_info()
5855 return 0; in ae5_headphone_gain_info()
5861 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_get() local
5862 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_get()
5864 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5865 return 0; in ae5_headphone_gain_get()
5871 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_put() local
5872 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_put()
5873 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5877 return 0; in ae5_headphone_gain_put()
5879 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n", in ae5_headphone_gain_put()
5882 spec->ae5_headphone_gain_val = sel; in ae5_headphone_gain_put()
5884 if (spec->out_enum_val == HEADPHONE_OUT) in ae5_headphone_gain_put()
5885 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val); in ae5_headphone_gain_put()
5891 * Sound BlasterX AE-5 sound filter enumerated control.
5900 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_sound_filter_info()
5901 uinfo->count = 1; in ae5_sound_filter_info()
5902 uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX; in ae5_sound_filter_info()
5903 if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX) in ae5_sound_filter_info()
5904 uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1; in ae5_sound_filter_info()
5906 ae5_filter_presets[uinfo->value.enumerated.item].name); in ae5_sound_filter_info()
5907 strcpy(uinfo->value.enumerated.name, namestr); in ae5_sound_filter_info()
5908 return 0; in ae5_sound_filter_info()
5914 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_get() local
5915 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_get()
5917 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5918 return 0; in ae5_sound_filter_get()
5924 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_put() local
5925 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_put()
5926 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5930 return 0; in ae5_sound_filter_put()
5932 codec_dbg(codec, "ae5_sound_filter: %s\n", in ae5_sound_filter_put()
5935 spec->ae5_filter_val = sel; in ae5_sound_filter_put()
5937 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5945 * front microphone has no auto-detect, and we need a way to set the rear
5946 * as line-in
5951 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_input_source_info()
5952 uinfo->count = 1; in ca0132_alt_input_source_info()
5953 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS; in ca0132_alt_input_source_info()
5954 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS) in ca0132_alt_input_source_info()
5955 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1; in ca0132_alt_input_source_info()
5956 strcpy(uinfo->value.enumerated.name, in ca0132_alt_input_source_info()
5957 in_src_str[uinfo->value.enumerated.item]); in ca0132_alt_input_source_info()
5958 return 0; in ca0132_alt_input_source_info()
5964 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_get() local
5965 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_get()
5967 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5968 return 0; in ca0132_alt_input_source_get()
5974 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_put() local
5975 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_put()
5976 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5980 * The AE-7 has no front microphone, so limit items to 2: rear mic and in ca0132_alt_input_source_put()
5981 * line-in. in ca0132_alt_input_source_put()
5987 return 0; in ca0132_alt_input_source_put()
5989 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n", in ca0132_alt_input_source_put()
5992 spec->in_enum_val = sel; in ca0132_alt_input_source_put()
5994 ca0132_alt_select_in(codec); in ca0132_alt_input_source_put()
6003 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_output_select_get_info()
6004 uinfo->count = 1; in ca0132_alt_output_select_get_info()
6005 uinfo->value.enumerated.items = NUM_OF_OUTPUTS; in ca0132_alt_output_select_get_info()
6006 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS) in ca0132_alt_output_select_get_info()
6007 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1; in ca0132_alt_output_select_get_info()
6008 strcpy(uinfo->value.enumerated.name, in ca0132_alt_output_select_get_info()
6009 out_type_str[uinfo->value.enumerated.item]); in ca0132_alt_output_select_get_info()
6010 return 0; in ca0132_alt_output_select_get_info()
6016 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_get() local
6017 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_get()
6019 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
6020 return 0; in ca0132_alt_output_select_get()
6026 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_put() local
6027 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_put()
6028 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
6033 return 0; in ca0132_alt_output_select_put()
6035 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n", in ca0132_alt_output_select_put()
6038 spec->out_enum_val = sel; in ca0132_alt_output_select_put()
6040 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_output_select_put()
6043 ca0132_alt_select_out(codec); in ca0132_alt_output_select_put()
6054 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_speaker_channel_cfg_get_info()
6055 uinfo->count = 1; in ca0132_alt_speaker_channel_cfg_get_info()
6056 uinfo->value.enumerated.items = items; in ca0132_alt_speaker_channel_cfg_get_info()
6057 if (uinfo->value.enumerated.item >= items) in ca0132_alt_speaker_channel_cfg_get_info()
6058 uinfo->value.enumerated.item = items - 1; in ca0132_alt_speaker_channel_cfg_get_info()
6059 strcpy(uinfo->value.enumerated.name, in ca0132_alt_speaker_channel_cfg_get_info()
6060 speaker_channel_cfgs[uinfo->value.enumerated.item].name); in ca0132_alt_speaker_channel_cfg_get_info()
6061 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
6067 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_get() local
6068 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_get()
6070 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
6071 return 0; in ca0132_alt_speaker_channel_cfg_get()
6077 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_put() local
6078 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_put()
6079 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
6083 return 0; in ca0132_alt_speaker_channel_cfg_put()
6085 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n", in ca0132_alt_speaker_channel_cfg_put()
6088 spec->channel_cfg_val = sel; in ca0132_alt_speaker_channel_cfg_put()
6090 if (spec->out_enum_val == SPEAKER_OUT) in ca0132_alt_speaker_channel_cfg_put()
6091 ca0132_alt_select_out(codec); in ca0132_alt_speaker_channel_cfg_put()
6107 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_svm_setting_info()
6108 uinfo->count = 1; in ca0132_alt_svm_setting_info()
6109 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS; in ca0132_alt_svm_setting_info()
6110 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS) in ca0132_alt_svm_setting_info()
6111 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1; in ca0132_alt_svm_setting_info()
6112 strcpy(uinfo->value.enumerated.name, in ca0132_alt_svm_setting_info()
6113 out_svm_set_enum_str[uinfo->value.enumerated.item]); in ca0132_alt_svm_setting_info()
6114 return 0; in ca0132_alt_svm_setting_info()
6120 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_get() local
6121 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_get()
6123 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
6124 return 0; in ca0132_alt_svm_setting_get()
6130 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_put() local
6131 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_put()
6132 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6134 unsigned int idx = SMART_VOLUME - EFFECT_START_NID; in ca0132_alt_svm_setting_put()
6138 return 0; in ca0132_alt_svm_setting_put()
6140 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n", in ca0132_alt_svm_setting_put()
6143 spec->smart_volume_setting = sel; in ca0132_alt_svm_setting_put()
6146 case 0: in ca0132_alt_svm_setting_put()
6160 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_alt_svm_setting_put()
6171 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_eq_preset_info()
6172 uinfo->count = 1; in ca0132_alt_eq_preset_info()
6173 uinfo->value.enumerated.items = items; in ca0132_alt_eq_preset_info()
6174 if (uinfo->value.enumerated.item >= items) in ca0132_alt_eq_preset_info()
6175 uinfo->value.enumerated.item = items - 1; in ca0132_alt_eq_preset_info()
6176 strcpy(uinfo->value.enumerated.name, in ca0132_alt_eq_preset_info()
6177 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name); in ca0132_alt_eq_preset_info()
6178 return 0; in ca0132_alt_eq_preset_info()
6184 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_get() local
6185 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_get()
6187 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6188 return 0; in ca0132_alt_eq_preset_get()
6194 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_put() local
6195 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_put()
6196 int i, err = 0; in ca0132_alt_eq_preset_put()
6197 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6201 return 0; in ca0132_alt_eq_preset_put()
6203 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel, in ca0132_alt_eq_preset_put()
6206 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6209 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6210 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid, in ca0132_alt_eq_preset_put()
6213 if (err < 0) in ca0132_alt_eq_preset_put()
6217 if (err >= 0) in ca0132_alt_eq_preset_put()
6218 spec->eq_preset_val = sel; in ca0132_alt_eq_preset_put()
6228 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_voicefx_info()
6229 uinfo->count = 1; in ca0132_voicefx_info()
6230 uinfo->value.enumerated.items = items; in ca0132_voicefx_info()
6231 if (uinfo->value.enumerated.item >= items) in ca0132_voicefx_info()
6232 uinfo->value.enumerated.item = items - 1; in ca0132_voicefx_info()
6233 strcpy(uinfo->value.enumerated.name, in ca0132_voicefx_info()
6234 ca0132_voicefx_presets[uinfo->value.enumerated.item].name); in ca0132_voicefx_info()
6235 return 0; in ca0132_voicefx_info()
6241 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_get() local
6242 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_get()
6244 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6245 return 0; in ca0132_voicefx_get()
6251 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_put() local
6252 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_put()
6253 int i, err = 0; in ca0132_voicefx_put()
6254 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6257 return 0; in ca0132_voicefx_put()
6259 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", in ca0132_voicefx_put()
6263 * Idx 0 is default. in ca0132_voicefx_put()
6266 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6267 err = dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_put()
6270 if (err < 0) in ca0132_voicefx_put()
6274 if (err >= 0) { in ca0132_voicefx_put()
6275 spec->voicefx_val = sel; in ca0132_voicefx_put()
6277 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6286 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_get() local
6287 struct ca0132_spec *spec = codec->spec; in ca0132_switch_get()
6290 long *valp = ucontrol->value.integer.value; in ca0132_switch_get()
6295 *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6299 *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6302 return 0; in ca0132_switch_get()
6307 *valp = spec->effects_switch[nid - EFFECT_START_NID]; in ca0132_switch_get()
6308 return 0; in ca0132_switch_get()
6312 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6313 *valp = spec->cur_mic_boost; in ca0132_switch_get()
6314 return 0; in ca0132_switch_get()
6318 *valp = spec->zxr_gain_set; in ca0132_switch_get()
6319 return 0; in ca0132_switch_get()
6323 *valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT]; in ca0132_switch_get()
6324 return 0; in ca0132_switch_get()
6328 *valp = spec->bass_redirection_val; in ca0132_switch_get()
6329 return 0; in ca0132_switch_get()
6332 return 0; in ca0132_switch_get()
6338 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_put() local
6339 struct ca0132_spec *spec = codec->spec; in ca0132_switch_put()
6342 long *valp = ucontrol->value.integer.value; in ca0132_switch_put()
6345 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6348 snd_hda_power_up(codec); in ca0132_switch_put()
6352 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6356 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6365 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6366 changed = ca0132_pe_switch_set(codec); in ca0132_switch_put()
6372 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6373 changed = ca0132_cvoice_switch_set(codec); in ca0132_switch_put()
6380 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6381 changed = ca0132_effects_set(codec, nid, *valp); in ca0132_switch_put()
6386 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6387 spec->cur_mic_boost = *valp; in ca0132_switch_put()
6389 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_switch_put()
6390 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6393 if (spec->cur_mic_type != DIGITAL_MIC) in ca0132_switch_put()
6394 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6401 spec->zxr_gain_set = *valp; in ca0132_switch_put()
6402 if (spec->cur_out_type == HEADPHONE_OUT) in ca0132_switch_put()
6403 changed = zxr_headphone_gain_set(codec, *valp); in ca0132_switch_put()
6405 changed = 0; in ca0132_switch_put()
6411 spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp; in ca0132_switch_put()
6412 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6413 ca0132_alt_set_full_range_speaker(codec); in ca0132_switch_put()
6415 changed = 0; in ca0132_switch_put()
6419 spec->bass_redirection_val = *valp; in ca0132_switch_put()
6420 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6421 ca0132_alt_surround_set_bass_redirection(codec, *valp); in ca0132_switch_put()
6423 changed = 0; in ca0132_switch_put()
6427 snd_hda_power_down(codec); in ca0132_switch_put()
6439 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid) in ca0132_alt_dsp_volume_put() argument
6441 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_volume_put()
6450 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6452 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6454 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6457 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6459 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6464 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6472 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_info() local
6473 struct ca0132_spec *spec = codec->spec; in ca0132_volume_info()
6483 nid = spec->shared_out_nid; in ca0132_volume_info()
6484 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6485 pval = kcontrol->private_value; in ca0132_volume_info()
6486 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6488 kcontrol->private_value = pval; in ca0132_volume_info()
6489 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6493 nid = spec->shared_mic_nid; in ca0132_volume_info()
6494 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6495 pval = kcontrol->private_value; in ca0132_volume_info()
6496 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6498 kcontrol->private_value = pval; in ca0132_volume_info()
6499 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_get() local
6511 struct ca0132_spec *spec = codec->spec; in ca0132_volume_get()
6514 long *valp = ucontrol->value.integer.value; in ca0132_volume_get()
6518 *valp = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6522 *valp = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6525 return 0; in ca0132_volume_get()
6531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_put() local
6532 struct ca0132_spec *spec = codec->spec; in ca0132_volume_put()
6535 long *valp = ucontrol->value.integer.value; in ca0132_volume_put()
6536 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6542 spec->vnode_lvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6546 spec->vnode_rvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6551 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_volume_put()
6556 snd_hda_power_up(codec); in ca0132_volume_put()
6557 mutex_lock(&codec->control_mutex); in ca0132_volume_put()
6558 pval = kcontrol->private_value; in ca0132_volume_put()
6559 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_volume_put()
6560 0, dir); in ca0132_volume_put()
6562 kcontrol->private_value = pval; in ca0132_volume_put()
6563 mutex_unlock(&codec->control_mutex); in ca0132_volume_put()
6564 snd_hda_power_down(codec); in ca0132_volume_put()
6578 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_volume_put() local
6579 struct ca0132_spec *spec = codec->spec; in ca0132_alt_volume_put()
6582 long *valp = ucontrol->value.integer.value; in ca0132_alt_volume_put()
6583 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6587 case 0x02: in ca0132_alt_volume_put()
6590 case 0x07: in ca0132_alt_volume_put()
6597 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6601 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6605 snd_hda_power_up(codec); in ca0132_alt_volume_put()
6606 ca0132_alt_dsp_volume_put(codec, vnid); in ca0132_alt_volume_put()
6607 mutex_lock(&codec->control_mutex); in ca0132_alt_volume_put()
6609 mutex_unlock(&codec->control_mutex); in ca0132_alt_volume_put()
6610 snd_hda_power_down(codec); in ca0132_alt_volume_put()
6618 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_tlv() local
6619 struct ca0132_spec *spec = codec->spec; in ca0132_volume_tlv()
6629 nid = spec->shared_out_nid; in ca0132_volume_tlv()
6630 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6631 pval = kcontrol->private_value; in ca0132_volume_tlv()
6632 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6634 kcontrol->private_value = pval; in ca0132_volume_tlv()
6635 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6639 nid = spec->shared_mic_nid; in ca0132_volume_tlv()
6640 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6641 pval = kcontrol->private_value; in ca0132_volume_tlv()
6642 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6644 kcontrol->private_value = pval; in ca0132_volume_tlv()
6645 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6654 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_add_effect_slider() argument
6660 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6677 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6681 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in ca0132_alt_add_effect_slider()
6689 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, in add_fx_switch() argument
6692 struct ca0132_spec *spec = codec->spec; in add_fx_switch()
6705 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_fx_switch()
6708 static int add_voicefx(struct hda_codec *codec) in add_voicefx() argument
6712 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6716 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); in add_voicefx()
6720 static int add_ca0132_alt_eq_presets(struct hda_codec *codec) in add_ca0132_alt_eq_presets() argument
6724 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6728 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM, in add_ca0132_alt_eq_presets()
6729 snd_ctl_new1(&knew, codec)); in add_ca0132_alt_eq_presets()
6737 static int ca0132_alt_add_svm_enum(struct hda_codec *codec) in ca0132_alt_add_svm_enum() argument
6741 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6745 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM, in ca0132_alt_add_svm_enum()
6746 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_svm_enum()
6754 static int ca0132_alt_add_output_enum(struct hda_codec *codec) in ca0132_alt_add_output_enum() argument
6758 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6762 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM, in ca0132_alt_add_output_enum()
6763 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_output_enum()
6771 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec) in ca0132_alt_add_speaker_channel_cfg_enum() argument
6775 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6779 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM, in ca0132_alt_add_speaker_channel_cfg_enum()
6780 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_speaker_channel_cfg_enum()
6788 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_front_full_range_switch() argument
6791 CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers", in ca0132_alt_add_front_full_range_switch()
6794 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT, in ca0132_alt_add_front_full_range_switch()
6795 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_front_full_range_switch()
6798 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_rear_full_range_switch() argument
6801 CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers", in ca0132_alt_add_rear_full_range_switch()
6804 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR, in ca0132_alt_add_rear_full_range_switch()
6805 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_rear_full_range_switch()
6810 * channel on speakers that are set as not being full-range. On configurations
6812 * replacement for X-Bass on configurations with an LFE channel.
6814 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_crossover() argument
6818 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6826 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER, in ca0132_alt_add_bass_redirection_crossover()
6827 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_crossover()
6830 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_switch() argument
6837 return snd_hda_ctl_add(codec, BASS_REDIRECTION, in ca0132_alt_add_bass_redirection_switch()
6838 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_switch()
6843 * because the front microphone has no auto-detect, and Line-in has to be set
6846 static int ca0132_alt_add_input_enum(struct hda_codec *codec) in ca0132_alt_add_input_enum() argument
6850 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6854 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM, in ca0132_alt_add_input_enum()
6855 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_input_enum()
6859 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6862 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec) in ca0132_alt_add_mic_boost_enum() argument
6866 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6870 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM, in ca0132_alt_add_mic_boost_enum()
6871 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_mic_boost_enum()
6876 * Add headphone gain enumerated control for the AE-5. This switches between
6877 * three modes, low, medium, and high. When non-headphone outputs are selected,
6880 static int ae5_add_headphone_gain_enum(struct hda_codec *codec) in ae5_add_headphone_gain_enum() argument
6883 HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain", in ae5_add_headphone_gain_enum()
6884 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6888 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM, in ae5_add_headphone_gain_enum()
6889 snd_ctl_new1(&knew, codec)); in ae5_add_headphone_gain_enum()
6893 * Add sound filter enumerated control for the AE-5. This adds three different
6897 static int ae5_add_sound_filter_enum(struct hda_codec *codec) in ae5_add_sound_filter_enum() argument
6900 HDA_CODEC_MUTE_MONO("AE-5: Sound Filter", in ae5_add_sound_filter_enum()
6901 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6905 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM, in ae5_add_sound_filter_enum()
6906 snd_ctl_new1(&knew, codec)); in ae5_add_sound_filter_enum()
6909 static int zxr_add_headphone_gain_switch(struct hda_codec *codec) in zxr_add_headphone_gain_switch() argument
6915 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN, in zxr_add_headphone_gain_switch()
6916 snd_ctl_new1(&knew, codec)); in zxr_add_headphone_gain_switch()
6929 * I think this has to do with the pin for rear surround being 0x11,
6930 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6946 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec) in ca0132_alt_add_chmap_ctls() argument
6948 int err = 0; in ca0132_alt_add_chmap_ctls()
6951 list_for_each_entry(pcm, &codec->pcm_list_head, list) { in ca0132_alt_add_chmap_ctls()
6953 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in ca0132_alt_add_chmap_ctls()
6958 if (hinfo->channels_max == 6) { in ca0132_alt_add_chmap_ctls()
6959 err = snd_pcm_add_chmap_ctls(pcm->pcm, in ca0132_alt_add_chmap_ctls()
6961 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6962 if (err < 0) in ca0132_alt_add_chmap_ctls()
6963 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!"); in ca0132_alt_add_chmap_ctls()
6977 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6978 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6979 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6980 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6981 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6982 0x12, 1, HDA_INPUT),
6995 * Desktop specific control mixer. Removes auto-detect for mic, and adds
7000 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7002 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7003 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7004 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7005 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7006 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7007 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7008 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
7010 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7011 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7022 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7024 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7025 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7026 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7027 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7028 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7029 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7032 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7033 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7039 static int ca0132_build_controls(struct hda_codec *codec) in ca0132_build_controls() argument
7041 struct ca0132_spec *spec = codec->spec; in ca0132_build_controls()
7043 int err = 0; in ca0132_build_controls()
7046 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
7047 err = snd_hda_add_new_ctls(codec, spec->mixers[i]); in ca0132_build_controls()
7048 if (err < 0) in ca0132_build_controls()
7053 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
7054 spec->tlv); in ca0132_build_controls()
7055 snd_hda_add_vmaster(codec, "Master Playback Volume", in ca0132_build_controls()
7056 spec->tlv, ca0132_alt_follower_pfxs, in ca0132_build_controls()
7057 "Playback Volume", 0); in ca0132_build_controls()
7058 err = __snd_hda_add_vmaster(codec, "Master Playback Switch", in ca0132_build_controls()
7061 true, 0, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
7062 if (err < 0) in ca0132_build_controls()
7070 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
7073 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + in ca0132_build_controls()
7078 err = add_fx_switch(codec, ca0132_effects[i].nid, in ca0132_build_controls()
7081 if (err < 0) in ca0132_build_controls()
7085 * If codec has use_alt_controls set to true, add effect level sliders, in ca0132_build_controls()
7090 err = ca0132_alt_add_svm_enum(codec); in ca0132_build_controls()
7091 if (err < 0) in ca0132_build_controls()
7094 err = add_ca0132_alt_eq_presets(codec); in ca0132_build_controls()
7095 if (err < 0) in ca0132_build_controls()
7098 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
7099 "Enable OutFX", 0); in ca0132_build_controls()
7100 if (err < 0) in ca0132_build_controls()
7103 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
7105 if (err < 0) in ca0132_build_controls()
7108 num_sliders = OUT_EFFECTS_COUNT - 1; in ca0132_build_controls()
7109 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
7110 err = ca0132_alt_add_effect_slider(codec, in ca0132_build_controls()
7114 if (err < 0) in ca0132_build_controls()
7118 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER, in ca0132_build_controls()
7119 "X-Bass Crossover", EFX_DIR_OUT); in ca0132_build_controls()
7121 if (err < 0) in ca0132_build_controls()
7124 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
7125 "PlayEnhancement", 0); in ca0132_build_controls()
7126 if (err < 0) in ca0132_build_controls()
7129 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
7131 if (err < 0) in ca0132_build_controls()
7134 err = add_voicefx(codec); in ca0132_build_controls()
7135 if (err < 0) in ca0132_build_controls()
7139 * If the codec uses alt_functions, you need the enumerated controls in ca0132_build_controls()
7144 err = ca0132_alt_add_output_enum(codec); in ca0132_build_controls()
7145 if (err < 0) in ca0132_build_controls()
7147 err = ca0132_alt_add_speaker_channel_cfg_enum(codec); in ca0132_build_controls()
7148 if (err < 0) in ca0132_build_controls()
7150 err = ca0132_alt_add_front_full_range_switch(codec); in ca0132_build_controls()
7151 if (err < 0) in ca0132_build_controls()
7153 err = ca0132_alt_add_rear_full_range_switch(codec); in ca0132_build_controls()
7154 if (err < 0) in ca0132_build_controls()
7156 err = ca0132_alt_add_bass_redirection_crossover(codec); in ca0132_build_controls()
7157 if (err < 0) in ca0132_build_controls()
7159 err = ca0132_alt_add_bass_redirection_switch(codec); in ca0132_build_controls()
7160 if (err < 0) in ca0132_build_controls()
7162 err = ca0132_alt_add_mic_boost_enum(codec); in ca0132_build_controls()
7163 if (err < 0) in ca0132_build_controls()
7167 * header on the card, and aux-in is handled by the DBPro board. in ca0132_build_controls()
7170 err = ca0132_alt_add_input_enum(codec); in ca0132_build_controls()
7171 if (err < 0) in ca0132_build_controls()
7179 err = ae5_add_headphone_gain_enum(codec); in ca0132_build_controls()
7180 if (err < 0) in ca0132_build_controls()
7182 err = ae5_add_sound_filter_enum(codec); in ca0132_build_controls()
7183 if (err < 0) in ca0132_build_controls()
7187 err = zxr_add_headphone_gain_switch(codec); in ca0132_build_controls()
7188 if (err < 0) in ca0132_build_controls()
7196 add_tuning_ctls(codec); in ca0132_build_controls()
7199 err = snd_hda_jack_add_kctls(codec, &spec->autocfg); in ca0132_build_controls()
7200 if (err < 0) in ca0132_build_controls()
7203 if (spec->dig_out) { in ca0132_build_controls()
7204 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in ca0132_build_controls()
7205 spec->dig_out); in ca0132_build_controls()
7206 if (err < 0) in ca0132_build_controls()
7208 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); in ca0132_build_controls()
7209 if (err < 0) in ca0132_build_controls()
7211 /* spec->multiout.share_spdif = 1; */ in ca0132_build_controls()
7214 if (spec->dig_in) { in ca0132_build_controls()
7215 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in ca0132_build_controls()
7216 if (err < 0) in ca0132_build_controls()
7221 ca0132_alt_add_chmap_ctls(codec); in ca0132_build_controls()
7223 return 0; in ca0132_build_controls()
7226 static int dbpro_build_controls(struct hda_codec *codec) in dbpro_build_controls() argument
7228 struct ca0132_spec *spec = codec->spec; in dbpro_build_controls()
7229 int err = 0; in dbpro_build_controls()
7231 if (spec->dig_out) { in dbpro_build_controls()
7232 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in dbpro_build_controls()
7233 spec->dig_out); in dbpro_build_controls()
7234 if (err < 0) in dbpro_build_controls()
7238 if (spec->dig_in) { in dbpro_build_controls()
7239 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in dbpro_build_controls()
7240 if (err < 0) in dbpro_build_controls()
7244 return 0; in dbpro_build_controls()
7290 static int ca0132_build_pcms(struct hda_codec *codec) in ca0132_build_pcms() argument
7292 struct ca0132_spec *spec = codec->spec; in ca0132_build_pcms()
7295 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); in ca0132_build_pcms()
7297 return -ENOMEM; in ca0132_build_pcms()
7299 info->own_chmap = true; in ca0132_build_pcms()
7300 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap in ca0132_build_pcms()
7303 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; in ca0132_build_pcms()
7304 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7305 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = in ca0132_build_pcms()
7306 spec->multiout.max_channels; in ca0132_build_pcms()
7307 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7308 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7309 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7313 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); in ca0132_build_pcms()
7315 return -ENOMEM; in ca0132_build_pcms()
7316 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7318 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7319 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; in ca0132_build_pcms()
7322 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear"); in ca0132_build_pcms()
7324 return -ENOMEM; in ca0132_build_pcms()
7325 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7326 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7327 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; in ca0132_build_pcms()
7329 if (!spec->dig_out && !spec->dig_in) in ca0132_build_pcms()
7330 return 0; in ca0132_build_pcms()
7332 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in ca0132_build_pcms()
7334 return -ENOMEM; in ca0132_build_pcms()
7335 info->pcm_type = HDA_PCM_TYPE_SPDIF; in ca0132_build_pcms()
7336 if (spec->dig_out) { in ca0132_build_pcms()
7337 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in ca0132_build_pcms()
7339 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in ca0132_build_pcms()
7341 if (spec->dig_in) { in ca0132_build_pcms()
7342 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7344 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in ca0132_build_pcms()
7347 return 0; in ca0132_build_pcms()
7350 static int dbpro_build_pcms(struct hda_codec *codec) in dbpro_build_pcms() argument
7352 struct ca0132_spec *spec = codec->spec; in dbpro_build_pcms()
7355 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog"); in dbpro_build_pcms()
7357 return -ENOMEM; in dbpro_build_pcms()
7358 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in dbpro_build_pcms()
7359 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in dbpro_build_pcms()
7360 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7363 if (!spec->dig_out && !spec->dig_in) in dbpro_build_pcms()
7364 return 0; in dbpro_build_pcms()
7366 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in dbpro_build_pcms()
7368 return -ENOMEM; in dbpro_build_pcms()
7369 info->pcm_type = HDA_PCM_TYPE_SPDIF; in dbpro_build_pcms()
7370 if (spec->dig_out) { in dbpro_build_pcms()
7371 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in dbpro_build_pcms()
7373 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in dbpro_build_pcms()
7375 if (spec->dig_in) { in dbpro_build_pcms()
7376 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in dbpro_build_pcms()
7378 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in dbpro_build_pcms()
7381 return 0; in dbpro_build_pcms()
7384 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) in init_output() argument
7387 snd_hda_set_pin_ctl(codec, pin, PIN_HP); in init_output()
7388 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in init_output()
7389 snd_hda_codec_write(codec, pin, 0, in init_output()
7393 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP)) in init_output()
7394 snd_hda_codec_write(codec, dac, 0, in init_output()
7398 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) in init_input() argument
7401 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80); in init_input()
7402 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) in init_input()
7403 snd_hda_codec_write(codec, pin, 0, in init_input()
7405 AMP_IN_UNMUTE(0)); in init_input()
7407 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) { in init_input()
7408 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7409 AMP_IN_UNMUTE(0)); in init_input()
7411 /* init to 0 dB and unmute. */ in init_input()
7412 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7413 HDA_AMP_VOLMASK, 0x5a); in init_input()
7414 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7415 HDA_AMP_MUTE, 0); in init_input()
7419 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) in refresh_amp_caps() argument
7423 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? in refresh_amp_caps()
7425 snd_hda_override_amp_caps(codec, nid, dir, caps); in refresh_amp_caps()
7429 * Switch between Digital built-in mic and analog mic.
7431 static void ca0132_set_dmic(struct hda_codec *codec, int enable) in ca0132_set_dmic() argument
7433 struct ca0132_spec *spec = codec->spec; in ca0132_set_dmic()
7438 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); in ca0132_set_dmic()
7440 oldval = stop_mic1(codec); in ca0132_set_dmic()
7441 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7443 /* set DMic input as 2-ch */ in ca0132_set_dmic()
7445 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7447 val = spec->dmic_ctl; in ca0132_set_dmic()
7448 val |= 0x80; in ca0132_set_dmic()
7449 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7452 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7453 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); in ca0132_set_dmic()
7457 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7459 val = spec->dmic_ctl; in ca0132_set_dmic()
7461 val &= 0x5f; in ca0132_set_dmic()
7462 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7465 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7466 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7468 ca0132_set_vipsource(codec, 1); in ca0132_set_dmic()
7469 resume_mic1(codec, oldval); in ca0132_set_dmic()
7475 static void ca0132_init_dmic(struct hda_codec *codec) in ca0132_init_dmic() argument
7477 struct ca0132_spec *spec = codec->spec; in ca0132_init_dmic()
7485 * Bit 2-0: MPIO select in ca0132_init_dmic()
7487 * Bit 7-4: reserved in ca0132_init_dmic()
7489 val = 0x01; in ca0132_init_dmic()
7490 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7494 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7496 * Bit 6-4: Data2 MPIO select in ca0132_init_dmic()
7499 val = 0x83; in ca0132_init_dmic()
7500 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7503 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7504 * Bit 3-0: Channel mask in ca0132_init_dmic()
7511 val = 0x33; in ca0132_init_dmic()
7513 val = 0x23; in ca0132_init_dmic()
7515 spec->dmic_ctl = val; in ca0132_init_dmic()
7516 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7523 static void ca0132_init_analog_mic2(struct hda_codec *codec) in ca0132_init_analog_mic2() argument
7525 struct ca0132_spec *spec = codec->spec; in ca0132_init_analog_mic2()
7527 mutex_lock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7529 chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00); in ca0132_init_analog_mic2()
7530 chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00); in ca0132_init_analog_mic2()
7532 mutex_unlock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7535 static void ca0132_refresh_widget_caps(struct hda_codec *codec) in ca0132_refresh_widget_caps() argument
7537 struct ca0132_spec *spec = codec->spec; in ca0132_refresh_widget_caps()
7540 codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); in ca0132_refresh_widget_caps()
7541 snd_hda_codec_update_widgets(codec); in ca0132_refresh_widget_caps()
7543 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7544 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7546 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7547 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7549 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7550 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7551 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7557 static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec) in ca0132_alt_free_active_dma_channels() argument
7563 status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp); in ca0132_alt_free_active_dma_channels()
7564 if (status >= 0) { in ca0132_alt_free_active_dma_channels()
7565 /* AND against 0xfff to get the active channel bits. */ in ca0132_alt_free_active_dma_channels()
7566 tmp = tmp & 0xfff; in ca0132_alt_free_active_dma_channels()
7572 codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n", in ca0132_alt_free_active_dma_channels()
7581 for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) { in ca0132_alt_free_active_dma_channels()
7582 if (dsp_is_dma_active(codec, i)) { in ca0132_alt_free_active_dma_channels()
7583 status = dspio_free_dma_chan(codec, i); in ca0132_alt_free_active_dma_channels()
7584 if (status < 0) in ca0132_alt_free_active_dma_channels()
7585 codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n", in ca0132_alt_free_active_dma_channels()
7596 * cause of most of the no-audio on startup issues were due to improperly
7609 * DSP stream that uses the DMA channels. These are 0x0c, the audio output
7610 * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
7612 static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec) in ca0132_alt_start_dsp_audio_streams() argument
7614 static const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 }; in ca0132_alt_start_dsp_audio_streams()
7615 struct ca0132_spec *spec = codec->spec; in ca0132_alt_start_dsp_audio_streams()
7622 mutex_lock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7624 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7625 chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp); in ca0132_alt_start_dsp_audio_streams()
7628 chipio_set_stream_control(codec, in ca0132_alt_start_dsp_audio_streams()
7629 dsp_dma_stream_ids[i], 0); in ca0132_alt_start_dsp_audio_streams()
7633 mutex_unlock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7640 ca0132_alt_free_active_dma_channels(codec); in ca0132_alt_start_dsp_audio_streams()
7642 mutex_lock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7644 /* Make sure stream 0x0c is six channels. */ in ca0132_alt_start_dsp_audio_streams()
7645 chipio_set_stream_channels(codec, 0x0c, 6); in ca0132_alt_start_dsp_audio_streams()
7647 for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) { in ca0132_alt_start_dsp_audio_streams()
7648 chipio_set_stream_control(codec, in ca0132_alt_start_dsp_audio_streams()
7655 mutex_unlock(&spec->chipio_mutex); in ca0132_alt_start_dsp_audio_streams()
7659 * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
7661 * of an 8-bit destination, an 8-bit source, and an unknown 2-bit number
7662 * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
7665 * 0x0001f8c0
7669 * the region of exram memory from 0x1477-0x1575 has each byte represent an
7670 * entry within the 0x190000 range, and when a range of entries is in use, the
7671 * ending value is overwritten with 0xff.
7672 * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
7673 * streamID's, where each entry is a starting 0x190000 port offset.
7674 * 0x159d in exram is the same as 0x1578, except it contains the ending port
7682 * 0x00-0x1f: HDA audio stream input/output ports.
7683 * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
7684 * have the lower-nibble set to 0x1, 0x2, and 0x9.
7685 * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
7686 * 0xe0-0xff: DAC/ADC audio input/output ports.
7689 * 0x03: Mic1 ADC to DSP.
7690 * 0x04: Mic2 ADC to DSP.
7691 * 0x05: HDA node 0x02 audio stream to DSP.
7692 * 0x0f: DSP Mic exit to HDA node 0x07.
7693 * 0x0c: DSP processed audio to DACs.
7694 * 0x14: DAC0, front L/R.
7702 static void chipio_remap_stream(struct hda_codec *codec, in chipio_remap_stream() argument
7708 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7712 * Check if the stream's port value is 0xff, because the 8051 may not in chipio_remap_stream()
7716 if (stream_offset == 0xff) { in chipio_remap_stream()
7717 for (i = 0; i < 5; i++) { in chipio_remap_stream()
7720 chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id, in chipio_remap_stream()
7723 if (stream_offset != 0xff) in chipio_remap_stream()
7728 if (stream_offset == 0xff) { in chipio_remap_stream()
7729 codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n", in chipio_remap_stream()
7730 __func__, remap_data->stream_id); in chipio_remap_stream()
7734 /* Offset isn't in bytes, its in 32-bit words, so multiply it by 4. */ in chipio_remap_stream()
7735 stream_offset *= 0x04; in chipio_remap_stream()
7736 stream_offset += 0x190000; in chipio_remap_stream()
7738 for (i = 0; i < remap_data->count; i++) { in chipio_remap_stream()
7739 chipio_write_no_mutex(codec, in chipio_remap_stream()
7740 stream_offset + remap_data->offset[i], in chipio_remap_stream()
7741 remap_data->value[i]); in chipio_remap_stream()
7745 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in chipio_remap_stream()
7752 /* Non-zero values are floating point 0.000198. */
7753 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7757 /* Non-zero values are floating point 0.000220. */
7758 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7762 /* Non-zero values are floating point 0.000100. */
7763 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7769 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec) in ca0132_alt_init_speaker_tuning() argument
7771 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_speaker_tuning()
7792 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7797 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7802 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7805 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7806 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7811 * Initialize mic for non-chromebook ca0132 implementations.
7813 static void ca0132_alt_init_analog_mics(struct hda_codec *codec) in ca0132_alt_init_analog_mics() argument
7815 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_analog_mics()
7819 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_init_analog_mics()
7820 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_init_analog_mics()
7822 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7826 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7829 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); in ca0132_alt_init_analog_mics()
7830 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); in ca0132_alt_init_analog_mics()
7832 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7834 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7838 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7839 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7843 static void sbz_connect_streams(struct hda_codec *codec) in sbz_connect_streams() argument
7845 struct ca0132_spec *spec = codec->spec; in sbz_connect_streams()
7847 mutex_lock(&spec->chipio_mutex); in sbz_connect_streams()
7849 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n"); in sbz_connect_streams()
7851 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7852 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7854 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7855 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7856 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7857 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7858 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7859 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7861 codec_dbg(codec, "Connect Streams exited, mutex released.\n"); in sbz_connect_streams()
7863 mutex_unlock(&spec->chipio_mutex); in sbz_connect_streams()
7872 static void sbz_chipio_startup_data(struct hda_codec *codec) in sbz_chipio_startup_data() argument
7875 struct ca0132_spec *spec = codec->spec; in sbz_chipio_startup_data()
7877 mutex_lock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7878 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n"); in sbz_chipio_startup_data()
7881 chipio_remap_stream(codec, &stream_remap_data[0]); in sbz_chipio_startup_data()
7899 chipio_remap_stream(codec, dsp_out_remap_data); in sbz_chipio_startup_data()
7901 codec_dbg(codec, "Startup Data exited, mutex released.\n"); in sbz_chipio_startup_data()
7902 mutex_unlock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7905 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) in ca0132_alt_dsp_initial_mic_setup() argument
7907 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_initial_mic_setup()
7910 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7911 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7913 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7914 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7917 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7919 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7920 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7924 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7925 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7928 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7929 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7936 static void ae5_post_dsp_register_set(struct hda_codec *codec) in ae5_post_dsp_register_set() argument
7938 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_register_set()
7940 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7941 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_post_dsp_register_set()
7943 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7944 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7945 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7946 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7947 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7948 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7949 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7950 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7951 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7952 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7953 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7954 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7956 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7957 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7958 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7961 static void ae5_post_dsp_param_setup(struct hda_codec *codec) in ae5_post_dsp_param_setup() argument
7966 * AE-5's registry values in Windows. in ae5_post_dsp_param_setup()
7968 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7971 * change colors on the external LED strip connected to the AE-5. in ae5_post_dsp_param_setup()
7973 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae5_post_dsp_param_setup()
7975 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7976 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7978 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae5_post_dsp_param_setup()
7981 static void ae5_post_dsp_pll_setup(struct hda_codec *codec) in ae5_post_dsp_pll_setup() argument
7983 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_post_dsp_pll_setup()
7984 chipio_8051_write_pll_pmu(codec, 0x45, 0xcc); in ae5_post_dsp_pll_setup()
7985 chipio_8051_write_pll_pmu(codec, 0x40, 0xcb); in ae5_post_dsp_pll_setup()
7986 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae5_post_dsp_pll_setup()
7987 chipio_8051_write_pll_pmu(codec, 0x51, 0x8d); in ae5_post_dsp_pll_setup()
7990 static void ae5_post_dsp_stream_setup(struct hda_codec *codec) in ae5_post_dsp_stream_setup() argument
7992 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_stream_setup()
7994 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7996 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7998 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
8000 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
8002 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
8003 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
8004 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
8005 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
8007 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae5_post_dsp_stream_setup()
8009 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae5_post_dsp_stream_setup()
8011 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
8013 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
8016 static void ae5_post_dsp_startup_data(struct hda_codec *codec) in ae5_post_dsp_startup_data() argument
8018 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_startup_data()
8020 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
8022 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
8023 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
8024 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
8025 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
8027 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8028 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae5_post_dsp_startup_data()
8029 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
8030 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
8031 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
8032 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
8033 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
8034 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8035 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8036 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
8037 ca0113_mmio_gpio_set(codec, 1, true); in ae5_post_dsp_startup_data()
8038 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
8040 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
8042 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
8043 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
8045 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
8048 static void ae7_post_dsp_setup_ports(struct hda_codec *codec) in ae7_post_dsp_setup_ports() argument
8050 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_setup_ports()
8052 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
8055 chipio_remap_stream(codec, &stream_remap_data[1]); in ae7_post_dsp_setup_ports()
8057 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
8058 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
8059 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
8060 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
8061 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
8062 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
8063 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
8064 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
8066 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
8069 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec) in ae7_post_dsp_asi_stream_setup() argument
8071 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_stream_setup()
8073 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
8075 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
8076 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
8078 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8080 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
8081 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
8083 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
8084 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
8085 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
8087 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae7_post_dsp_asi_stream_setup()
8089 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
8092 static void ae7_post_dsp_pll_setup(struct hda_codec *codec) in ae7_post_dsp_pll_setup() argument
8095 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
8098 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
8102 for (i = 0; i < ARRAY_SIZE(addr); i++) in ae7_post_dsp_pll_setup()
8103 chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]); in ae7_post_dsp_pll_setup()
8106 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec) in ae7_post_dsp_asi_setup_ports() argument
8108 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_setup_ports()
8110 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
8113 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
8117 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8119 chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup_ports()
8121 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8122 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
8123 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
8124 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
8126 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8127 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8129 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
8130 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
8132 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8133 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8134 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8136 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
8137 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
8138 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
8140 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
8146 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
8148 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
8152 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
8154 * know what data is being sent. Interestingly, the AE-5 seems to go in ae7_post_dsp_asi_setup_ports()
8156 * step, but the AE-7 does. in ae7_post_dsp_asi_setup_ports()
8159 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
8160 ca0113_mmio_gpio_set(codec, 1, 1); in ae7_post_dsp_asi_setup_ports()
8162 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
8163 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
8164 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
8165 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
8167 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
8168 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
8170 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
8171 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8177 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8178 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8180 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8188 static void ae7_post_dsp_asi_setup(struct hda_codec *codec) in ae7_post_dsp_asi_setup() argument
8190 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8192 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae7_post_dsp_asi_setup()
8194 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8195 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8197 chipio_set_control_param(codec, 3, 3); in ae7_post_dsp_asi_setup()
8198 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae7_post_dsp_asi_setup()
8200 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8201 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8202 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8204 chipio_8051_write_exram(codec, 0xfa92, 0x22); in ae7_post_dsp_asi_setup()
8206 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup()
8207 ae7_post_dsp_asi_stream_setup(codec); in ae7_post_dsp_asi_setup()
8209 chipio_8051_write_pll_pmu(codec, 0x43, 0xc7); in ae7_post_dsp_asi_setup()
8211 ae7_post_dsp_asi_setup_ports(codec); in ae7_post_dsp_asi_setup()
8217 static void ca0132_setup_defaults(struct hda_codec *codec) in ca0132_setup_defaults() argument
8219 struct ca0132_spec *spec = codec->spec; in ca0132_setup_defaults()
8224 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_setup_defaults()
8229 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8230 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8231 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_setup_defaults()
8239 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8242 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8246 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8247 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8251 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8255 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8262 static void r3d_setup_defaults(struct hda_codec *codec) in r3d_setup_defaults() argument
8264 struct ca0132_spec *spec = codec->spec; in r3d_setup_defaults()
8269 if (spec->dsp_state != DSP_DOWNLOADED) in r3d_setup_defaults()
8272 ca0132_alt_init_analog_mics(codec); in r3d_setup_defaults()
8273 ca0132_alt_start_dsp_audio_streams(codec); in r3d_setup_defaults()
8277 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8281 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8282 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in r3d_setup_defaults()
8285 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8288 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); in r3d_setup_defaults()
8292 ca0113_mmio_gpio_set(codec, 2, false); in r3d_setup_defaults()
8293 ca0113_mmio_gpio_set(codec, 4, true); in r3d_setup_defaults()
8298 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8299 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8300 dspio_set_uint_param(codec, in r3d_setup_defaults()
8312 static void sbz_setup_defaults(struct hda_codec *codec) in sbz_setup_defaults() argument
8314 struct ca0132_spec *spec = codec->spec; in sbz_setup_defaults()
8319 if (spec->dsp_state != DSP_DOWNLOADED) in sbz_setup_defaults()
8322 ca0132_alt_init_analog_mics(codec); in sbz_setup_defaults()
8323 ca0132_alt_start_dsp_audio_streams(codec); in sbz_setup_defaults()
8324 sbz_connect_streams(codec); in sbz_setup_defaults()
8325 sbz_chipio_startup_data(codec); in sbz_setup_defaults()
8332 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8333 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8337 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8341 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8342 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in sbz_setup_defaults()
8345 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8347 ca0132_alt_dsp_initial_mic_setup(codec); in sbz_setup_defaults()
8351 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8352 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8353 dspio_set_uint_param(codec, in sbz_setup_defaults()
8360 ca0132_alt_init_speaker_tuning(codec); in sbz_setup_defaults()
8364 * Setup default parameters for the Sound BlasterX AE-5 DSP.
8366 static void ae5_setup_defaults(struct hda_codec *codec) in ae5_setup_defaults() argument
8368 struct ca0132_spec *spec = codec->spec; in ae5_setup_defaults()
8373 if (spec->dsp_state != DSP_DOWNLOADED) in ae5_setup_defaults()
8376 ca0132_alt_init_analog_mics(codec); in ae5_setup_defaults()
8377 ca0132_alt_start_dsp_audio_streams(codec); in ae5_setup_defaults()
8381 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8382 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8383 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8384 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8386 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8387 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8388 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8392 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8393 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8397 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8401 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8402 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae5_setup_defaults()
8405 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8407 ca0132_alt_dsp_initial_mic_setup(codec); in ae5_setup_defaults()
8408 ae5_post_dsp_register_set(codec); in ae5_setup_defaults()
8409 ae5_post_dsp_param_setup(codec); in ae5_setup_defaults()
8410 ae5_post_dsp_pll_setup(codec); in ae5_setup_defaults()
8411 ae5_post_dsp_stream_setup(codec); in ae5_setup_defaults()
8412 ae5_post_dsp_startup_data(codec); in ae5_setup_defaults()
8416 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8417 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8418 dspio_set_uint_param(codec, in ae5_setup_defaults()
8425 ca0132_alt_init_speaker_tuning(codec); in ae5_setup_defaults()
8429 * Setup default parameters for the Sound Blaster AE-7 DSP.
8431 static void ae7_setup_defaults(struct hda_codec *codec) in ae7_setup_defaults() argument
8433 struct ca0132_spec *spec = codec->spec; in ae7_setup_defaults()
8438 if (spec->dsp_state != DSP_DOWNLOADED) in ae7_setup_defaults()
8441 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8442 ca0132_alt_start_dsp_audio_streams(codec); in ae7_setup_defaults()
8443 ae7_post_dsp_setup_ports(codec); in ae7_setup_defaults()
8446 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8448 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8451 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8454 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8455 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8457 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8461 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8462 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8466 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8470 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8471 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae7_setup_defaults()
8474 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8475 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8481 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8483 ae7_post_dsp_asi_setup(codec); in ae7_setup_defaults()
8486 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8489 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8490 ca0113_mmio_gpio_set(codec, 1, true); in ae7_setup_defaults()
8493 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8494 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8495 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8499 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8500 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8501 dspio_set_uint_param(codec, in ae7_setup_defaults()
8508 ca0132_alt_init_speaker_tuning(codec); in ae7_setup_defaults()
8514 static void ca0132_init_flags(struct hda_codec *codec) in ca0132_init_flags() argument
8516 struct ca0132_spec *spec = codec->spec; in ca0132_init_flags()
8519 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); in ca0132_init_flags()
8520 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); in ca0132_init_flags()
8521 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); in ca0132_init_flags()
8522 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1); in ca0132_init_flags()
8523 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1); in ca0132_init_flags()
8524 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8525 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8526 chipio_set_control_flag(codec, in ca0132_init_flags()
8527 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8528 chipio_set_control_flag(codec, in ca0132_init_flags()
8531 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8532 chipio_set_control_flag(codec, in ca0132_init_flags()
8533 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8534 chipio_set_control_flag(codec, in ca0132_init_flags()
8535 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8536 chipio_set_control_flag(codec, in ca0132_init_flags()
8537 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8538 chipio_set_control_flag(codec, in ca0132_init_flags()
8539 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8540 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); in ca0132_init_flags()
8547 static void ca0132_init_params(struct hda_codec *codec) in ca0132_init_params() argument
8549 struct ca0132_spec *spec = codec->spec; in ca0132_init_params()
8552 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_init_params()
8553 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8554 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8555 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8556 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8559 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6); in ca0132_init_params()
8560 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6); in ca0132_init_params()
8563 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) in ca0132_set_dsp_msr() argument
8565 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); in ca0132_set_dsp_msr()
8566 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); in ca0132_set_dsp_msr()
8567 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); in ca0132_set_dsp_msr()
8568 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); in ca0132_set_dsp_msr()
8569 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); in ca0132_set_dsp_msr()
8570 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); in ca0132_set_dsp_msr()
8572 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_dsp_msr()
8573 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_dsp_msr()
8574 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_set_dsp_msr()
8577 static bool ca0132_download_dsp_images(struct hda_codec *codec) in ca0132_download_dsp_images() argument
8580 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp_images()
8593 codec->card->dev) != 0) in ca0132_download_dsp_images()
8594 codec_dbg(codec, "Desktop firmware not found."); in ca0132_download_dsp_images()
8596 codec_dbg(codec, "Desktop firmware selected."); in ca0132_download_dsp_images()
8600 codec->card->dev) != 0) in ca0132_download_dsp_images()
8601 codec_dbg(codec, "Recon3Di alt firmware not detected."); in ca0132_download_dsp_images()
8603 codec_dbg(codec, "Recon3Di firmware selected."); in ca0132_download_dsp_images()
8610 * exists for your particular codec. in ca0132_download_dsp_images()
8613 codec_dbg(codec, "Default firmware selected."); in ca0132_download_dsp_images()
8615 codec->card->dev) != 0) in ca0132_download_dsp_images()
8619 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); in ca0132_download_dsp_images()
8620 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8621 codec_err(codec, "ca0132 DSP load image failed\n"); in ca0132_download_dsp_images()
8625 dsp_loaded = dspload_wait_loaded(codec); in ca0132_download_dsp_images()
8633 static void ca0132_download_dsp(struct hda_codec *codec) in ca0132_download_dsp() argument
8635 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp()
8641 if (spec->dsp_state == DSP_DOWNLOAD_FAILED) in ca0132_download_dsp()
8644 chipio_enable_clocks(codec); in ca0132_download_dsp()
8645 if (spec->dsp_state != DSP_DOWNLOADED) { in ca0132_download_dsp()
8646 spec->dsp_state = DSP_DOWNLOADING; in ca0132_download_dsp()
8648 if (!ca0132_download_dsp_images(codec)) in ca0132_download_dsp()
8649 spec->dsp_state = DSP_DOWNLOAD_FAILED; in ca0132_download_dsp()
8651 spec->dsp_state = DSP_DOWNLOADED; in ca0132_download_dsp()
8655 if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) in ca0132_download_dsp()
8656 ca0132_set_dsp_msr(codec, true); in ca0132_download_dsp()
8659 static void ca0132_process_dsp_response(struct hda_codec *codec, in ca0132_process_dsp_response() argument
8662 struct ca0132_spec *spec = codec->spec; in ca0132_process_dsp_response()
8664 codec_dbg(codec, "ca0132_process_dsp_response\n"); in ca0132_process_dsp_response()
8665 snd_hda_power_up_pm(codec); in ca0132_process_dsp_response()
8666 if (spec->wait_scp) { in ca0132_process_dsp_response()
8667 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8668 spec->wait_scp = 0; in ca0132_process_dsp_response()
8671 dspio_clear_response_queue(codec); in ca0132_process_dsp_response()
8672 snd_hda_power_down_pm(codec); in ca0132_process_dsp_response()
8675 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in hp_callback() argument
8677 struct ca0132_spec *spec = codec->spec; in hp_callback()
8680 /* Delay enabling the HP amp, to let the mic-detection in hp_callback()
8683 tbl = snd_hda_jack_tbl_get(codec, cb->nid); in hp_callback()
8685 tbl->block_report = 1; in hp_callback()
8686 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); in hp_callback()
8689 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in amic_callback() argument
8691 struct ca0132_spec *spec = codec->spec; in amic_callback()
8694 ca0132_alt_select_in(codec); in amic_callback()
8696 ca0132_select_mic(codec); in amic_callback()
8699 static void ca0132_setup_unsol(struct hda_codec *codec) in ca0132_setup_unsol() argument
8701 struct ca0132_spec *spec = codec->spec; in ca0132_setup_unsol()
8702 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback); in ca0132_setup_unsol()
8703 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1, in ca0132_setup_unsol()
8705 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, in ca0132_setup_unsol()
8709 snd_hda_jack_detect_enable_callback(codec, in ca0132_setup_unsol()
8710 spec->unsol_tag_front_hp, hp_callback); in ca0132_setup_unsol()
8720 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8727 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8729 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8737 {0x15, 0x70D, 0xF0},
8738 {0x15, 0x70E, 0xFE},
8739 {0x15, 0x707, 0x75},
8740 {0x15, 0x707, 0xD3},
8741 {0x15, 0x707, 0x09},
8742 {0x15, 0x707, 0x53},
8743 {0x15, 0x707, 0xD4},
8744 {0x15, 0x707, 0xEF},
8745 {0x15, 0x707, 0x75},
8746 {0x15, 0x707, 0xD3},
8747 {0x15, 0x707, 0x09},
8748 {0x15, 0x707, 0x02},
8749 {0x15, 0x707, 0x37},
8750 {0x15, 0x707, 0x78},
8751 {0x15, 0x53C, 0xCE},
8752 {0x15, 0x575, 0xC9},
8753 {0x15, 0x53D, 0xCE},
8754 {0x15, 0x5B7, 0xC9},
8755 {0x15, 0x70D, 0xE8},
8756 {0x15, 0x70E, 0xFE},
8757 {0x15, 0x707, 0x02},
8758 {0x15, 0x707, 0x68},
8759 {0x15, 0x707, 0x62},
8760 {0x15, 0x53A, 0xCE},
8761 {0x15, 0x546, 0xC9},
8762 {0x15, 0x53B, 0xCE},
8763 {0x15, 0x5E8, 0xC9},
8769 {0x15, 0x70D, 0x20},
8770 {0x15, 0x70E, 0x19},
8771 {0x15, 0x707, 0x00},
8772 {0x15, 0x539, 0xCE},
8773 {0x15, 0x546, 0xC9},
8774 {0x15, 0x70D, 0xB7},
8775 {0x15, 0x70E, 0x09},
8776 {0x15, 0x707, 0x10},
8777 {0x15, 0x70D, 0xAF},
8778 {0x15, 0x70E, 0x09},
8779 {0x15, 0x707, 0x01},
8780 {0x15, 0x707, 0x05},
8781 {0x15, 0x70D, 0x73},
8782 {0x15, 0x70E, 0x09},
8783 {0x15, 0x707, 0x14},
8784 {0x15, 0x6FF, 0xC4},
8788 static void ca0132_init_chip(struct hda_codec *codec) in ca0132_init_chip() argument
8790 struct ca0132_spec *spec = codec->spec; in ca0132_init_chip()
8795 mutex_init(&spec->chipio_mutex); in ca0132_init_chip()
8804 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_chip()
8805 chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2); in ca0132_init_chip()
8807 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8808 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8809 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_init_chip()
8810 AC_VERB_SET_CODEC_RESET, 0); in ca0132_init_chip()
8813 spec->cur_out_type = SPEAKER_OUT; in ca0132_init_chip()
8815 spec->cur_mic_type = DIGITAL_MIC; in ca0132_init_chip()
8817 spec->cur_mic_type = REAR_MIC; in ca0132_init_chip()
8819 spec->cur_mic_boost = 0; in ca0132_init_chip()
8821 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8822 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8823 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8824 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8825 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8832 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8833 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8834 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8838 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. in ca0132_init_chip()
8842 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8843 spec->speaker_range_val[1] = 1; in ca0132_init_chip()
8845 spec->xbass_xover_freq = 8; in ca0132_init_chip()
8846 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8847 spec->fx_ctl_val[i] = effect_slider_defaults[i]; in ca0132_init_chip()
8849 spec->bass_redirect_xover_freq = 8; in ca0132_init_chip()
8852 spec->voicefx_val = 0; in ca0132_init_chip()
8853 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; in ca0132_init_chip()
8854 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8857 * The ZxR doesn't have a front panel header, and it's line-in is on in ca0132_init_chip()
8859 * to make sure that spec->in_enum_val is set properly. in ca0132_init_chip()
8862 spec->in_enum_val = REAR_MIC; in ca0132_init_chip()
8865 ca0132_init_tuning_defaults(codec); in ca0132_init_chip()
8873 static void r3di_gpio_shutdown(struct hda_codec *codec) in r3di_gpio_shutdown() argument
8875 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8881 static void sbz_region2_exit(struct hda_codec *codec) in sbz_region2_exit() argument
8883 struct ca0132_spec *spec = codec->spec; in sbz_region2_exit()
8886 for (i = 0; i < 4; i++) in sbz_region2_exit()
8887 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8888 for (i = 0; i < 8; i++) in sbz_region2_exit()
8889 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8891 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8892 ca0113_mmio_gpio_set(codec, 1, false); in sbz_region2_exit()
8893 ca0113_mmio_gpio_set(codec, 4, true); in sbz_region2_exit()
8894 ca0113_mmio_gpio_set(codec, 5, false); in sbz_region2_exit()
8895 ca0113_mmio_gpio_set(codec, 7, false); in sbz_region2_exit()
8898 static void sbz_set_pin_ctl_default(struct hda_codec *codec) in sbz_set_pin_ctl_default() argument
8900 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8903 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8904 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8906 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8907 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8908 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8911 static void ca0132_clear_unsolicited(struct hda_codec *codec) in ca0132_clear_unsolicited() argument
8913 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8916 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8917 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8918 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8923 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir, in sbz_gpio_shutdown_commands() argument
8926 if (dir >= 0) in sbz_gpio_shutdown_commands()
8927 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8929 if (mask >= 0) in sbz_gpio_shutdown_commands()
8930 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8933 if (data >= 0) in sbz_gpio_shutdown_commands()
8934 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8938 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec) in zxr_dbpro_power_state_shutdown() argument
8940 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8943 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8944 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8945 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8948 static void sbz_exit_chip(struct hda_codec *codec) in sbz_exit_chip() argument
8950 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8951 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8954 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8955 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8956 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8958 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8959 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8961 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8962 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8964 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8966 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8967 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8968 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8970 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8972 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8974 ca0132_clear_unsolicited(codec); in sbz_exit_chip()
8975 sbz_set_pin_ctl_default(codec); in sbz_exit_chip()
8977 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8978 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8980 sbz_region2_exit(codec); in sbz_exit_chip()
8983 static void r3d_exit_chip(struct hda_codec *codec) in r3d_exit_chip() argument
8985 ca0132_clear_unsolicited(codec); in r3d_exit_chip()
8986 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8987 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8990 static void ae5_exit_chip(struct hda_codec *codec) in ae5_exit_chip() argument
8992 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8993 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8995 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8996 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8997 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8998 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8999 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
9000 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
9001 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
9002 ca0113_mmio_gpio_set(codec, 1, false); in ae5_exit_chip()
9004 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
9005 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
9007 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
9009 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
9010 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
9012 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
9015 static void ae7_exit_chip(struct hda_codec *codec) in ae7_exit_chip() argument
9017 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9018 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
9019 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
9020 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
9021 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
9023 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
9025 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
9026 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
9028 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
9029 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
9030 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
9031 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
9032 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
9033 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
9034 ca0113_mmio_gpio_set(codec, 1, false); in ae7_exit_chip()
9035 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
9037 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
9038 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
9041 static void zxr_exit_chip(struct hda_codec *codec) in zxr_exit_chip() argument
9043 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
9044 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
9045 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
9046 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
9048 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
9049 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
9051 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
9053 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
9054 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
9056 ca0132_clear_unsolicited(codec); in zxr_exit_chip()
9057 sbz_set_pin_ctl_default(codec); in zxr_exit_chip()
9058 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
9060 ca0113_mmio_gpio_set(codec, 5, false); in zxr_exit_chip()
9061 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
9062 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
9063 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
9064 ca0113_mmio_gpio_set(codec, 4, true); in zxr_exit_chip()
9065 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
9066 ca0113_mmio_gpio_set(codec, 5, true); in zxr_exit_chip()
9067 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
9068 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
9071 static void ca0132_exit_chip(struct hda_codec *codec) in ca0132_exit_chip() argument
9075 if (dspload_is_loaded(codec)) in ca0132_exit_chip()
9076 dsp_reset(codec); in ca0132_exit_chip()
9087 static void sbz_dsp_startup_check(struct hda_codec *codec) in sbz_dsp_startup_check() argument
9089 struct ca0132_spec *spec = codec->spec; in sbz_dsp_startup_check()
9091 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
9093 unsigned int failure = 0; in sbz_dsp_startup_check()
9096 if (spec->startup_check_entered) in sbz_dsp_startup_check()
9099 spec->startup_check_entered = true; in sbz_dsp_startup_check()
9101 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9102 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
9103 cur_address += 0x4; in sbz_dsp_startup_check()
9105 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9106 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9110 codec_dbg(codec, "Startup Check: %d ", failure); in sbz_dsp_startup_check()
9112 codec_info(codec, "DSP not initialized properly. Attempting to fix."); in sbz_dsp_startup_check()
9118 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
9119 codec_info(codec, "Reloading... Tries left: %d", reload); in sbz_dsp_startup_check()
9120 sbz_exit_chip(codec); in sbz_dsp_startup_check()
9121 spec->dsp_state = DSP_DOWNLOAD_INIT; in sbz_dsp_startup_check()
9122 codec->patch_ops.init(codec); in sbz_dsp_startup_check()
9123 failure = 0; in sbz_dsp_startup_check()
9124 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9125 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
9126 cur_address += 0x4; in sbz_dsp_startup_check()
9128 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
9129 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
9132 reload--; in sbz_dsp_startup_check()
9136 codec_info(codec, "DSP fixed."); in sbz_dsp_startup_check()
9141 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c… in sbz_dsp_startup_check()
9145 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
9150 * to 0 just incase a value has lingered from a boot into Windows.
9152 static void ca0132_alt_vol_setup(struct hda_codec *codec) in ca0132_alt_vol_setup() argument
9154 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9155 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9156 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9157 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9158 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9159 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9160 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
9161 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9167 static void sbz_pre_dsp_setup(struct hda_codec *codec) in sbz_pre_dsp_setup() argument
9169 struct ca0132_spec *spec = codec->spec; in sbz_pre_dsp_setup()
9171 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9172 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9174 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9176 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9177 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9180 static void r3d_pre_dsp_setup(struct hda_codec *codec) in r3d_pre_dsp_setup() argument
9182 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9184 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3d_pre_dsp_setup()
9186 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9187 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9190 static void r3di_pre_dsp_setup(struct hda_codec *codec) in r3di_pre_dsp_setup() argument
9192 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9194 chipio_8051_write_exram(codec, 0x1c1e, 0x5b); in r3di_pre_dsp_setup()
9195 chipio_8051_write_exram(codec, 0x1920, 0x00); in r3di_pre_dsp_setup()
9196 chipio_8051_write_exram(codec, 0x1921, 0x40); in r3di_pre_dsp_setup()
9198 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9199 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9207 static void zxr_pre_dsp_setup(struct hda_codec *codec) in zxr_pre_dsp_setup() argument
9209 static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 }; in zxr_pre_dsp_setup()
9210 static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d }; in zxr_pre_dsp_setup()
9213 chipio_write(codec, 0x189000, 0x0001f100); in zxr_pre_dsp_setup()
9215 chipio_write(codec, 0x18900c, 0x0001f100); in zxr_pre_dsp_setup()
9220 * 0xfa92 in exram. This function seems to have something to do with in zxr_pre_dsp_setup()
9224 chipio_8051_write_exram(codec, 0xfa92, 0x22); in zxr_pre_dsp_setup()
9226 chipio_8051_write_pll_pmu(codec, 0x51, 0x98); in zxr_pre_dsp_setup()
9228 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82); in zxr_pre_dsp_setup()
9229 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3); in zxr_pre_dsp_setup()
9231 chipio_write(codec, 0x18902c, 0x00000000); in zxr_pre_dsp_setup()
9233 chipio_write(codec, 0x18902c, 0x00000003); in zxr_pre_dsp_setup()
9236 for (i = 0; i < ARRAY_SIZE(addr); i++) in zxr_pre_dsp_setup()
9237 chipio_8051_write_pll_pmu(codec, addr[i], data[i]); in zxr_pre_dsp_setup()
9246 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9247 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9251 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9252 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9253 0x000000c1, 0x00000080
9257 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9258 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9259 0x000000c1, 0x00000080
9263 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9264 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9265 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9266 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9270 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9271 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9272 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9273 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9274 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9275 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9276 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9277 0x00000080, 0x00880680
9280 static void ca0132_mmio_init_sbz(struct hda_codec *codec) in ca0132_mmio_init_sbz() argument
9282 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_sbz()
9287 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9288 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9293 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9294 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9297 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9298 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9301 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9302 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9305 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9306 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9310 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9311 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9326 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9327 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9330 static void ca0132_mmio_init_ae5(struct hda_codec *codec) in ca0132_mmio_init_ae5() argument
9332 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_ae5()
9341 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9342 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9345 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9347 * AE-7 shares all writes with the AE-5, except that it writes in ca0132_mmio_init_ae5()
9348 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9351 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9355 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9359 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9362 static void ca0132_mmio_init(struct hda_codec *codec) in ca0132_mmio_init() argument
9364 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init()
9370 ca0132_mmio_init_sbz(codec); in ca0132_mmio_init()
9373 ca0132_mmio_init_ae5(codec); in ca0132_mmio_init()
9381 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9382 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9386 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9387 0x01, 0x6b, 0x57
9392 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9395 static void ae5_register_set(struct hda_codec *codec) in ae5_register_set() argument
9397 struct ca0132_spec *spec = codec->spec; in ae5_register_set()
9405 chipio_8051_write_pll_pmu(codec, 0x41, 0xc8); in ae5_register_set()
9407 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9408 chipio_8051_write_pll_pmu(codec, 0x44, 0xc2); in ae5_register_set()
9411 tmp[0] = 0x03; in ae5_register_set()
9412 tmp[1] = 0x03; in ae5_register_set()
9413 tmp[2] = 0x07; in ae5_register_set()
9415 tmp[0] = 0x0f; in ae5_register_set()
9416 tmp[1] = 0x0f; in ae5_register_set()
9417 tmp[2] = 0x0f; in ae5_register_set()
9420 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9421 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9427 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9428 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9431 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9433 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9436 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9437 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9439 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9442 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9443 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9446 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9454 static void ca0132_alt_init(struct hda_codec *codec) in ca0132_alt_init() argument
9456 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init()
9458 ca0132_alt_vol_setup(codec); in ca0132_alt_init()
9462 codec_dbg(codec, "SBZ alt_init"); in ca0132_alt_init()
9463 ca0132_gpio_init(codec); in ca0132_alt_init()
9464 sbz_pre_dsp_setup(codec); in ca0132_alt_init()
9465 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9466 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9469 codec_dbg(codec, "R3DI alt_init"); in ca0132_alt_init()
9470 ca0132_gpio_init(codec); in ca0132_alt_init()
9471 ca0132_gpio_setup(codec); in ca0132_alt_init()
9472 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING); in ca0132_alt_init()
9473 r3di_pre_dsp_setup(codec); in ca0132_alt_init()
9474 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9475 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9478 r3d_pre_dsp_setup(codec); in ca0132_alt_init()
9479 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9480 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9483 ca0132_gpio_init(codec); in ca0132_alt_init()
9484 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9485 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9486 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9487 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9488 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9491 ca0132_gpio_init(codec); in ca0132_alt_init()
9492 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9493 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9494 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9495 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9496 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9497 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9498 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9501 chipio_8051_write_pll_pmu(codec, 0x49, 0x88); in ca0132_alt_init()
9502 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9503 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9504 zxr_pre_dsp_setup(codec); in ca0132_alt_init()
9511 static int ca0132_init(struct hda_codec *codec) in ca0132_init() argument
9513 struct ca0132_spec *spec = codec->spec; in ca0132_init()
9514 struct auto_pin_cfg *cfg = &spec->autocfg; in ca0132_init()
9520 * there's only two reasons for it. One, the codec has awaken from a in ca0132_init()
9528 if (spec->dsp_state == DSP_DOWNLOADED) { in ca0132_init()
9529 dsp_loaded = dspload_is_loaded(codec); in ca0132_init()
9531 spec->dsp_reload = true; in ca0132_init()
9532 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9535 sbz_dsp_startup_check(codec); in ca0132_init()
9536 return 0; in ca0132_init()
9540 if (spec->dsp_state != DSP_DOWNLOAD_FAILED) in ca0132_init()
9541 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9542 spec->curr_chip_addx = INVALID_CHIP_ADDRESS; in ca0132_init()
9545 ca0132_mmio_init(codec); in ca0132_init()
9547 snd_hda_power_up_pm(codec); in ca0132_init()
9550 ae5_register_set(codec); in ca0132_init()
9552 ca0132_init_params(codec); in ca0132_init()
9553 ca0132_init_flags(codec); in ca0132_init()
9555 snd_hda_sequence_write(codec, spec->base_init_verbs); in ca0132_init()
9558 ca0132_alt_init(codec); in ca0132_init()
9560 ca0132_download_dsp(codec); in ca0132_init()
9562 ca0132_refresh_widget_caps(codec); in ca0132_init()
9567 r3d_setup_defaults(codec); in ca0132_init()
9571 sbz_setup_defaults(codec); in ca0132_init()
9574 ae5_setup_defaults(codec); in ca0132_init()
9577 ae7_setup_defaults(codec); in ca0132_init()
9580 ca0132_setup_defaults(codec); in ca0132_init()
9581 ca0132_init_analog_mic2(codec); in ca0132_init()
9582 ca0132_init_dmic(codec); in ca0132_init()
9586 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9587 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9589 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9591 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9592 init_input(codec, spec->input_pins[i], spec->adcs[i]); in ca0132_init()
9594 init_input(codec, cfg->dig_in_pin, spec->dig_in); in ca0132_init()
9597 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_init()
9598 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9599 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9600 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9601 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9605 ca0132_gpio_setup(codec); in ca0132_init()
9607 snd_hda_sequence_write(codec, spec->spec_init_verbs); in ca0132_init()
9609 ca0132_alt_select_out(codec); in ca0132_init()
9610 ca0132_alt_select_in(codec); in ca0132_init()
9612 ca0132_select_out(codec); in ca0132_init()
9613 ca0132_select_mic(codec); in ca0132_init()
9616 snd_hda_jack_report_sync(codec); in ca0132_init()
9622 if (spec->dsp_reload) { in ca0132_init()
9623 spec->dsp_reload = false; in ca0132_init()
9624 ca0132_pe_switch_set(codec); in ca0132_init()
9627 snd_hda_power_down_pm(codec); in ca0132_init()
9629 return 0; in ca0132_init()
9632 static int dbpro_init(struct hda_codec *codec) in dbpro_init() argument
9634 struct ca0132_spec *spec = codec->spec; in dbpro_init()
9635 struct auto_pin_cfg *cfg = &spec->autocfg; in dbpro_init()
9638 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9639 init_input(codec, cfg->dig_in_pin, spec->dig_in); in dbpro_init()
9641 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9642 init_input(codec, spec->input_pins[i], spec->adcs[i]); in dbpro_init()
9644 return 0; in dbpro_init()
9647 static void ca0132_free(struct hda_codec *codec) in ca0132_free() argument
9649 struct ca0132_spec *spec = codec->spec; in ca0132_free()
9651 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_free()
9652 snd_hda_power_up(codec); in ca0132_free()
9655 sbz_exit_chip(codec); in ca0132_free()
9658 zxr_exit_chip(codec); in ca0132_free()
9661 r3d_exit_chip(codec); in ca0132_free()
9664 ae5_exit_chip(codec); in ca0132_free()
9667 ae7_exit_chip(codec); in ca0132_free()
9670 r3di_gpio_shutdown(codec); in ca0132_free()
9676 snd_hda_sequence_write(codec, spec->base_exit_verbs); in ca0132_free()
9677 ca0132_exit_chip(codec); in ca0132_free()
9679 snd_hda_power_down(codec); in ca0132_free()
9681 if (spec->mem_base) in ca0132_free()
9682 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
9684 kfree(spec->spec_init_verbs); in ca0132_free()
9685 kfree(codec->spec); in ca0132_free()
9688 static void dbpro_free(struct hda_codec *codec) in dbpro_free() argument
9690 struct ca0132_spec *spec = codec->spec; in dbpro_free()
9692 zxr_dbpro_power_state_shutdown(codec); in dbpro_free()
9694 kfree(spec->spec_init_verbs); in dbpro_free()
9695 kfree(codec->spec); in dbpro_free()
9699 static int ca0132_suspend(struct hda_codec *codec) in ca0132_suspend() argument
9701 struct ca0132_spec *spec = codec->spec; in ca0132_suspend()
9703 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_suspend()
9704 return 0; in ca0132_suspend()
9726 static void ca0132_config(struct hda_codec *codec) in ca0132_config() argument
9728 struct ca0132_spec *spec = codec->spec; in ca0132_config()
9730 spec->dacs[0] = 0x2; in ca0132_config()
9731 spec->dacs[1] = 0x3; in ca0132_config()
9732 spec->dacs[2] = 0x4; in ca0132_config()
9734 spec->multiout.dac_nids = spec->dacs; in ca0132_config()
9735 spec->multiout.num_dacs = 3; in ca0132_config()
9738 spec->multiout.max_channels = 2; in ca0132_config()
9740 spec->multiout.max_channels = 6; in ca0132_config()
9744 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); in ca0132_config()
9745 snd_hda_apply_pincfgs(codec, alienware_pincfgs); in ca0132_config()
9748 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__); in ca0132_config()
9749 snd_hda_apply_pincfgs(codec, sbz_pincfgs); in ca0132_config()
9752 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__); in ca0132_config()
9753 snd_hda_apply_pincfgs(codec, zxr_pincfgs); in ca0132_config()
9756 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__); in ca0132_config()
9757 snd_hda_apply_pincfgs(codec, r3d_pincfgs); in ca0132_config()
9760 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__); in ca0132_config()
9761 snd_hda_apply_pincfgs(codec, r3di_pincfgs); in ca0132_config()
9764 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); in ca0132_config()
9765 snd_hda_apply_pincfgs(codec, ae5_pincfgs); in ca0132_config()
9768 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__); in ca0132_config()
9769 snd_hda_apply_pincfgs(codec, ae7_pincfgs); in ca0132_config()
9777 spec->num_outputs = 2; in ca0132_config()
9778 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9779 spec->out_pins[1] = 0x0f; in ca0132_config()
9780 spec->shared_out_nid = 0x2; in ca0132_config()
9781 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9783 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9784 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9785 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9787 spec->num_inputs = 3; in ca0132_config()
9788 spec->input_pins[0] = 0x12; in ca0132_config()
9789 spec->input_pins[1] = 0x11; in ca0132_config()
9790 spec->input_pins[2] = 0x13; in ca0132_config()
9791 spec->shared_mic_nid = 0x7; in ca0132_config()
9792 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9796 spec->num_outputs = 2; in ca0132_config()
9797 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9798 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9799 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9800 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9801 spec->shared_out_nid = 0x2; in ca0132_config()
9802 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9803 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9805 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9806 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9807 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9809 spec->num_inputs = 2; in ca0132_config()
9810 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9811 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9812 spec->shared_mic_nid = 0x7; in ca0132_config()
9813 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9816 spec->dig_out = 0x05; in ca0132_config()
9817 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9818 spec->dig_in = 0x09; in ca0132_config()
9821 spec->num_outputs = 2; in ca0132_config()
9822 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9823 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9824 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9825 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9826 spec->shared_out_nid = 0x2; in ca0132_config()
9827 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9828 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9830 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9831 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9832 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9834 spec->num_inputs = 2; in ca0132_config()
9835 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9836 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9837 spec->shared_mic_nid = 0x7; in ca0132_config()
9838 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9841 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9843 spec->num_inputs = 1; in ca0132_config()
9844 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9846 spec->dig_out = 0x05; in ca0132_config()
9847 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9849 spec->dig_in = 0x09; in ca0132_config()
9853 spec->num_outputs = 2; in ca0132_config()
9854 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9855 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9856 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9857 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9858 spec->shared_out_nid = 0x2; in ca0132_config()
9859 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9860 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9862 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9863 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9864 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9866 spec->num_inputs = 2; in ca0132_config()
9867 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9868 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9869 spec->shared_mic_nid = 0x7; in ca0132_config()
9870 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9873 spec->dig_out = 0x05; in ca0132_config()
9874 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9877 spec->num_outputs = 2; in ca0132_config()
9878 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9879 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9880 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9881 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9882 spec->shared_out_nid = 0x2; in ca0132_config()
9883 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9884 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9886 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9887 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9888 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9890 spec->num_inputs = 2; in ca0132_config()
9891 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9892 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9893 spec->shared_mic_nid = 0x7; in ca0132_config()
9894 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9897 spec->dig_out = 0x05; in ca0132_config()
9898 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9901 spec->num_outputs = 2; in ca0132_config()
9902 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9903 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9904 spec->shared_out_nid = 0x2; in ca0132_config()
9905 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9907 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9908 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9909 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9911 spec->num_inputs = 3; in ca0132_config()
9912 spec->input_pins[0] = 0x12; in ca0132_config()
9913 spec->input_pins[1] = 0x11; in ca0132_config()
9914 spec->input_pins[2] = 0x13; in ca0132_config()
9915 spec->shared_mic_nid = 0x7; in ca0132_config()
9916 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9919 spec->dig_out = 0x05; in ca0132_config()
9920 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9921 spec->dig_in = 0x09; in ca0132_config()
9926 static int ca0132_prepare_verbs(struct hda_codec *codec) in ca0132_prepare_verbs() argument
9930 struct ca0132_spec *spec = codec->spec; in ca0132_prepare_verbs()
9932 spec->chip_init_verbs = ca0132_init_verbs0; in ca0132_prepare_verbs()
9938 spec->desktop_init_verbs = ca0132_init_verbs1; in ca0132_prepare_verbs()
9939 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, in ca0132_prepare_verbs()
9942 if (!spec->spec_init_verbs) in ca0132_prepare_verbs()
9943 return -ENOMEM; in ca0132_prepare_verbs()
9946 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9947 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9948 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9952 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9953 spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9954 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9956 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9957 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9958 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9960 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9961 spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9962 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9965 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */ in ca0132_prepare_verbs()
9966 return 0; in ca0132_prepare_verbs()
9971 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9975 static void sbz_detect_quirk(struct hda_codec *codec) in sbz_detect_quirk() argument
9977 switch (codec->core.subsystem_id) { in sbz_detect_quirk()
9978 case 0x11020033: in sbz_detect_quirk()
9979 codec->fixup_id = QUIRK_ZXR; in sbz_detect_quirk()
9981 case 0x1102003f: in sbz_detect_quirk()
9982 codec->fixup_id = QUIRK_ZXR_DBPRO; in sbz_detect_quirk()
9985 codec->fixup_id = QUIRK_SBZ; in sbz_detect_quirk()
9990 static int patch_ca0132(struct hda_codec *codec) in patch_ca0132() argument
9995 codec_dbg(codec, "patch_ca0132\n"); in patch_ca0132()
9999 return -ENOMEM; in patch_ca0132()
10000 codec->spec = spec; in patch_ca0132()
10001 spec->codec = codec; in patch_ca0132()
10003 /* Detect codec quirk */ in patch_ca0132()
10004 snd_hda_pick_fixup(codec, ca0132_quirk_models, ca0132_quirks, NULL); in patch_ca0132()
10006 sbz_detect_quirk(codec); in patch_ca0132()
10009 codec->patch_ops = dbpro_patch_ops; in patch_ca0132()
10011 codec->patch_ops = ca0132_patch_ops; in patch_ca0132()
10013 codec->pcm_format_first = 1; in patch_ca0132()
10014 codec->no_sticky_stream = 1; in patch_ca0132()
10017 spec->dsp_state = DSP_DOWNLOAD_INIT; in patch_ca0132()
10018 spec->num_mixers = 1; in patch_ca0132()
10023 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10024 snd_hda_codec_set_name(codec, "Sound Blaster Z"); in patch_ca0132()
10027 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10028 snd_hda_codec_set_name(codec, "Sound Blaster ZxR"); in patch_ca0132()
10033 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10034 snd_hda_codec_set_name(codec, "Recon3D"); in patch_ca0132()
10037 spec->mixers[0] = r3di_mixer; in patch_ca0132()
10038 snd_hda_codec_set_name(codec, "Recon3Di"); in patch_ca0132()
10041 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10042 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5"); in patch_ca0132()
10045 spec->mixers[0] = desktop_mixer; in patch_ca0132()
10046 snd_hda_codec_set_name(codec, "Sound Blaster AE-7"); in patch_ca0132()
10049 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
10060 spec->use_alt_controls = true; in patch_ca0132()
10061 spec->use_alt_functions = true; in patch_ca0132()
10062 spec->use_pci_mmio = true; in patch_ca0132()
10065 spec->use_alt_controls = true; in patch_ca0132()
10066 spec->use_alt_functions = true; in patch_ca0132()
10067 spec->use_pci_mmio = false; in patch_ca0132()
10070 spec->use_alt_controls = false; in patch_ca0132()
10071 spec->use_alt_functions = false; in patch_ca0132()
10072 spec->use_pci_mmio = false; in patch_ca0132()
10077 if (spec->use_pci_mmio) { in patch_ca0132()
10078 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
10079 if (spec->mem_base == NULL) { in patch_ca0132()
10080 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE."); in patch_ca0132()
10081 codec->fixup_id = QUIRK_NONE; in patch_ca0132()
10086 spec->base_init_verbs = ca0132_base_init_verbs; in patch_ca0132()
10087 spec->base_exit_verbs = ca0132_base_exit_verbs; in patch_ca0132()
10089 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed); in patch_ca0132()
10091 ca0132_init_chip(codec); in patch_ca0132()
10093 ca0132_config(codec); in patch_ca0132()
10095 err = ca0132_prepare_verbs(codec); in patch_ca0132()
10096 if (err < 0) in patch_ca0132()
10099 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL); in patch_ca0132()
10100 if (err < 0) in patch_ca0132()
10103 ca0132_setup_unsol(codec); in patch_ca0132()
10105 return 0; in patch_ca0132()
10108 ca0132_free(codec); in patch_ca0132()
10116 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
10122 MODULE_DESCRIPTION("Creative Sound Core3D codec");