Lines Matching +full:dmic +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <sound/soc-dapm.h>
15 #include <linux/clk-provider.h>
17 #include "lpass-macro-common.h"
199 #define TX_ADC_TO_DMIC(n) ((n - TX_ADC_MAX)/2)
281 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
604 struct regmap *regmap = tx->regmap; in tx_macro_mclk_enable()
607 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
619 tx->tx_mclk_users++; in tx_macro_mclk_enable()
621 if (tx->tx_mclk_users <= 0) { in tx_macro_mclk_enable()
622 dev_err(tx->dev, "clock already disabled\n"); in tx_macro_mclk_enable()
623 tx->tx_mclk_users = 0; in tx_macro_mclk_enable()
626 tx->tx_mclk_users--; in tx_macro_mclk_enable()
627 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
666 tx = hpf_work->tx; in tx_macro_tx_hpf_corner_freq_callback()
667 component = tx->component; in tx_macro_tx_hpf_corner_freq_callback()
668 hpf_cut_off_freq = hpf_work->hpf_cut_off_freq; in tx_macro_tx_hpf_corner_freq_callback()
670 dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
671 hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
673 if (is_amic_enabled(component, hpf_work->decimator)) { in tx_macro_tx_hpf_corner_freq_callback()
709 tx = tx_mute_dwork->tx; in tx_macro_mute_update_callback()
710 component = tx->component; in tx_macro_mute_update_callback()
711 decimator = tx_mute_dwork->decimator; in tx_macro_mute_update_callback()
720 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_mclk_event()
741 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_put_dec_enum()
742 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_put_dec_enum()
743 unsigned int val, dmic; in tx_macro_put_dec_enum() local
748 val = ucontrol->value.enumerated.item[0]; in tx_macro_put_dec_enum()
749 if (val >= e->items) in tx_macro_put_dec_enum()
750 return -EINVAL; in tx_macro_put_dec_enum()
752 switch (e->reg) { in tx_macro_put_dec_enum()
778 dev_err(component->dev, "Error in configuration!!\n"); in tx_macro_put_dec_enum()
779 return -EINVAL; in tx_macro_put_dec_enum()
783 if (widget->shift) { /* MSM DMIC */ in tx_macro_put_dec_enum()
792 dmic = TX_ADC_TO_DMIC(val); in tx_macro_put_dec_enum()
793 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_put_dec_enum()
796 tx->dmic_clk_div); in tx_macro_put_dec_enum()
807 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_get()
808 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_get()
809 u32 dai_id = widget->shift; in tx_macro_tx_mixer_get()
810 u32 dec_id = mc->shift; in tx_macro_tx_mixer_get()
813 if (test_bit(dec_id, &tx->active_ch_mask[dai_id])) in tx_macro_tx_mixer_get()
814 ucontrol->value.integer.value[0] = 1; in tx_macro_tx_mixer_get()
816 ucontrol->value.integer.value[0] = 0; in tx_macro_tx_mixer_get()
825 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_put()
827 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_put()
828 u32 dai_id = widget->shift; in tx_macro_tx_mixer_put()
829 u32 dec_id = mc->shift; in tx_macro_tx_mixer_put()
830 u32 enable = ucontrol->value.integer.value[0]; in tx_macro_tx_mixer_put()
834 if (tx->active_decimator[dai_id] == dec_id) in tx_macro_tx_mixer_put()
837 set_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
838 tx->active_ch_cnt[dai_id]++; in tx_macro_tx_mixer_put()
839 tx->active_decimator[dai_id] = dec_id; in tx_macro_tx_mixer_put()
841 if (tx->active_decimator[dai_id] == -1) in tx_macro_tx_mixer_put()
844 tx->active_ch_cnt[dai_id]--; in tx_macro_tx_mixer_put()
845 clear_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
846 tx->active_decimator[dai_id] = -1; in tx_macro_tx_mixer_put()
848 snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update); in tx_macro_tx_mixer_put()
856 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_enable_dec()
862 u16 adc_mux_reg, adc_reg, adc_n, dmic; in tx_macro_enable_dec() local
866 decimator = w->shift; in tx_macro_enable_dec()
880 dmic = TX_ADC_TO_DMIC(adc_n); in tx_macro_enable_dec()
881 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_enable_dec()
885 tx->dmic_clk_div); in tx_macro_enable_dec()
890 tx->dec_mode[decimator]); in tx_macro_enable_dec()
906 tx->tx_hpf_work[decimator].hpf_cut_off_freq = in tx_macro_enable_dec()
920 &tx->tx_mute_dwork[decimator].dwork, in tx_macro_enable_dec()
922 if (tx->tx_hpf_work[decimator].hpf_cut_off_freq != CF_MIN_3DB_150HZ) { in tx_macro_enable_dec()
924 &tx->tx_hpf_work[decimator].dwork, in tx_macro_enable_dec()
949 if (tx->bcs_enable) { in tx_macro_enable_dec()
952 tx->bcs_clk_en = true; in tx_macro_enable_dec()
957 tx->tx_hpf_work[decimator].hpf_cut_off_freq; in tx_macro_enable_dec()
961 &tx->tx_hpf_work[decimator].dwork)) { in tx_macro_enable_dec()
991 cancel_delayed_work_sync(&tx->tx_mute_dwork[decimator].dwork); in tx_macro_enable_dec()
1000 if (tx->bcs_enable) { in tx_macro_enable_dec()
1007 tx->bcs_clk_en = false; in tx_macro_enable_dec()
1019 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_get()
1020 int path = e->shift_l; in tx_macro_dec_mode_get()
1022 ucontrol->value.integer.value[0] = tx->dec_mode[path]; in tx_macro_dec_mode_get()
1031 int value = ucontrol->value.integer.value[0]; in tx_macro_dec_mode_put()
1032 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_put()
1033 int path = e->shift_l; in tx_macro_dec_mode_put()
1036 if (tx->dec_mode[path] == value) in tx_macro_dec_mode_put()
1039 tx->dec_mode[path] = value; in tx_macro_dec_mode_put()
1050 ucontrol->value.integer.value[0] = tx->bcs_enable; in tx_macro_get_bcs()
1059 int value = ucontrol->value.integer.value[0]; in tx_macro_set_bcs()
1062 tx->bcs_enable = value; in tx_macro_set_bcs()
1071 struct snd_soc_component *component = dai->component; in tx_macro_hw_params()
1101 dev_err(component->dev, "%s: Invalid TX sample rate: %d\n", in tx_macro_hw_params()
1103 return -EINVAL; in tx_macro_hw_params()
1106 for_each_set_bit(decimator, &tx->active_ch_mask[dai->id], TX_MACRO_DEC_MAX) in tx_macro_hw_params()
1117 struct snd_soc_component *component = dai->component; in tx_macro_get_channel_map()
1120 switch (dai->id) { in tx_macro_get_channel_map()
1124 *tx_slot = tx->active_ch_mask[dai->id]; in tx_macro_get_channel_map()
1125 *tx_num = tx->active_ch_cnt[dai->id]; in tx_macro_get_channel_map()
1135 struct snd_soc_component *component = dai->component; in tx_macro_digital_mute()
1140 if (tx->active_decimator[dai->id] == -1) in tx_macro_digital_mute()
1143 decimator = tx->active_decimator[dai->id]; in tx_macro_digital_mute()
1439 SND_SOC_DAPM_MUX("TX DMIC MUX0", SND_SOC_NOPM, 4, 0, &tx_dmic0_mux),
1440 SND_SOC_DAPM_MUX("TX DMIC MUX1", SND_SOC_NOPM, 4, 0, &tx_dmic1_mux),
1441 SND_SOC_DAPM_MUX("TX DMIC MUX2", SND_SOC_NOPM, 4, 0, &tx_dmic2_mux),
1442 SND_SOC_DAPM_MUX("TX DMIC MUX3", SND_SOC_NOPM, 4, 0, &tx_dmic3_mux),
1443 SND_SOC_DAPM_MUX("TX DMIC MUX4", SND_SOC_NOPM, 4, 0, &tx_dmic4_mux),
1444 SND_SOC_DAPM_MUX("TX DMIC MUX5", SND_SOC_NOPM, 4, 0, &tx_dmic5_mux),
1445 SND_SOC_DAPM_MUX("TX DMIC MUX6", SND_SOC_NOPM, 4, 0, &tx_dmic6_mux),
1446 SND_SOC_DAPM_MUX("TX DMIC MUX7", SND_SOC_NOPM, 4, 0, &tx_dmic7_mux),
1571 {"TX DEC0 MUX", "MSM_DMIC", "TX DMIC MUX0"},
1572 {"TX DMIC MUX0", "DMIC0", "TX DMIC0"},
1573 {"TX DMIC MUX0", "DMIC1", "TX DMIC1"},
1574 {"TX DMIC MUX0", "DMIC2", "TX DMIC2"},
1575 {"TX DMIC MUX0", "DMIC3", "TX DMIC3"},
1576 {"TX DMIC MUX0", "DMIC4", "TX DMIC4"},
1577 {"TX DMIC MUX0", "DMIC5", "TX DMIC5"},
1578 {"TX DMIC MUX0", "DMIC6", "TX DMIC6"},
1579 {"TX DMIC MUX0", "DMIC7", "TX DMIC7"},
1596 {"TX DEC1 MUX", "MSM_DMIC", "TX DMIC MUX1"},
1597 {"TX DMIC MUX1", "DMIC0", "TX DMIC0"},
1598 {"TX DMIC MUX1", "DMIC1", "TX DMIC1"},
1599 {"TX DMIC MUX1", "DMIC2", "TX DMIC2"},
1600 {"TX DMIC MUX1", "DMIC3", "TX DMIC3"},
1601 {"TX DMIC MUX1", "DMIC4", "TX DMIC4"},
1602 {"TX DMIC MUX1", "DMIC5", "TX DMIC5"},
1603 {"TX DMIC MUX1", "DMIC6", "TX DMIC6"},
1604 {"TX DMIC MUX1", "DMIC7", "TX DMIC7"},
1621 {"TX DEC2 MUX", "MSM_DMIC", "TX DMIC MUX2"},
1622 {"TX DMIC MUX2", "DMIC0", "TX DMIC0"},
1623 {"TX DMIC MUX2", "DMIC1", "TX DMIC1"},
1624 {"TX DMIC MUX2", "DMIC2", "TX DMIC2"},
1625 {"TX DMIC MUX2", "DMIC3", "TX DMIC3"},
1626 {"TX DMIC MUX2", "DMIC4", "TX DMIC4"},
1627 {"TX DMIC MUX2", "DMIC5", "TX DMIC5"},
1628 {"TX DMIC MUX2", "DMIC6", "TX DMIC6"},
1629 {"TX DMIC MUX2", "DMIC7", "TX DMIC7"},
1646 {"TX DEC3 MUX", "MSM_DMIC", "TX DMIC MUX3"},
1647 {"TX DMIC MUX3", "DMIC0", "TX DMIC0"},
1648 {"TX DMIC MUX3", "DMIC1", "TX DMIC1"},
1649 {"TX DMIC MUX3", "DMIC2", "TX DMIC2"},
1650 {"TX DMIC MUX3", "DMIC3", "TX DMIC3"},
1651 {"TX DMIC MUX3", "DMIC4", "TX DMIC4"},
1652 {"TX DMIC MUX3", "DMIC5", "TX DMIC5"},
1653 {"TX DMIC MUX3", "DMIC6", "TX DMIC6"},
1654 {"TX DMIC MUX3", "DMIC7", "TX DMIC7"},
1671 {"TX DEC4 MUX", "MSM_DMIC", "TX DMIC MUX4"},
1672 {"TX DMIC MUX4", "DMIC0", "TX DMIC0"},
1673 {"TX DMIC MUX4", "DMIC1", "TX DMIC1"},
1674 {"TX DMIC MUX4", "DMIC2", "TX DMIC2"},
1675 {"TX DMIC MUX4", "DMIC3", "TX DMIC3"},
1676 {"TX DMIC MUX4", "DMIC4", "TX DMIC4"},
1677 {"TX DMIC MUX4", "DMIC5", "TX DMIC5"},
1678 {"TX DMIC MUX4", "DMIC6", "TX DMIC6"},
1679 {"TX DMIC MUX4", "DMIC7", "TX DMIC7"},
1696 {"TX DEC5 MUX", "MSM_DMIC", "TX DMIC MUX5"},
1697 {"TX DMIC MUX5", "DMIC0", "TX DMIC0"},
1698 {"TX DMIC MUX5", "DMIC1", "TX DMIC1"},
1699 {"TX DMIC MUX5", "DMIC2", "TX DMIC2"},
1700 {"TX DMIC MUX5", "DMIC3", "TX DMIC3"},
1701 {"TX DMIC MUX5", "DMIC4", "TX DMIC4"},
1702 {"TX DMIC MUX5", "DMIC5", "TX DMIC5"},
1703 {"TX DMIC MUX5", "DMIC6", "TX DMIC6"},
1704 {"TX DMIC MUX5", "DMIC7", "TX DMIC7"},
1721 {"TX DEC6 MUX", "MSM_DMIC", "TX DMIC MUX6"},
1722 {"TX DMIC MUX6", "DMIC0", "TX DMIC0"},
1723 {"TX DMIC MUX6", "DMIC1", "TX DMIC1"},
1724 {"TX DMIC MUX6", "DMIC2", "TX DMIC2"},
1725 {"TX DMIC MUX6", "DMIC3", "TX DMIC3"},
1726 {"TX DMIC MUX6", "DMIC4", "TX DMIC4"},
1727 {"TX DMIC MUX6", "DMIC5", "TX DMIC5"},
1728 {"TX DMIC MUX6", "DMIC6", "TX DMIC6"},
1729 {"TX DMIC MUX6", "DMIC7", "TX DMIC7"},
1746 {"TX DEC7 MUX", "MSM_DMIC", "TX DMIC MUX7"},
1747 {"TX DMIC MUX7", "DMIC0", "TX DMIC0"},
1748 {"TX DMIC MUX7", "DMIC1", "TX DMIC1"},
1749 {"TX DMIC MUX7", "DMIC2", "TX DMIC2"},
1750 {"TX DMIC MUX7", "DMIC3", "TX DMIC3"},
1751 {"TX DMIC MUX7", "DMIC4", "TX DMIC4"},
1752 {"TX DMIC MUX7", "DMIC5", "TX DMIC5"},
1753 {"TX DMIC MUX7", "DMIC6", "TX DMIC6"},
1754 {"TX DMIC MUX7", "DMIC7", "TX DMIC7"},
1775 -84, 40, digital_gain),
1778 -84, 40, digital_gain),
1781 -84, 40, digital_gain),
1784 -84, 40, digital_gain),
1787 -84, 40, digital_gain),
1790 -84, 40, digital_gain),
1793 -84, 40, digital_gain),
1796 -84, 40, digital_gain),
1798 SOC_ENUM_EXT("DEC0 MODE", dec_mode_mux_enum[0],
1801 SOC_ENUM_EXT("DEC1 MODE", dec_mode_mux_enum[1],
1804 SOC_ENUM_EXT("DEC2 MODE", dec_mode_mux_enum[2],
1807 SOC_ENUM_EXT("DEC3 MODE", dec_mode_mux_enum[3],
1810 SOC_ENUM_EXT("DEC4 MODE", dec_mode_mux_enum[4],
1813 SOC_ENUM_EXT("DEC5 MODE", dec_mode_mux_enum[5],
1816 SOC_ENUM_EXT("DEC6 MODE", dec_mode_mux_enum[6],
1819 SOC_ENUM_EXT("DEC7 MODE", dec_mode_mux_enum[7],
1831 snd_soc_component_init_regmap(comp, tx->regmap); in tx_macro_component_probe()
1834 tx->tx_hpf_work[i].tx = tx; in tx_macro_component_probe()
1835 tx->tx_hpf_work[i].decimator = i; in tx_macro_component_probe()
1836 INIT_DELAYED_WORK(&tx->tx_hpf_work[i].dwork, in tx_macro_component_probe()
1841 tx->tx_mute_dwork[i].tx = tx; in tx_macro_component_probe()
1842 tx->tx_mute_dwork[i].decimator = i; in tx_macro_component_probe()
1843 INIT_DELAYED_WORK(&tx->tx_mute_dwork[i].dwork, in tx_macro_component_probe()
1846 tx->component = comp; in tx_macro_component_probe()
1860 struct regmap *regmap = tx->regmap; in swclk_gate_enable()
1863 ret = clk_prepare_enable(tx->mclk); in swclk_gate_enable()
1865 dev_err(tx->dev, "failed to enable mclk\n"); in swclk_gate_enable()
1880 struct regmap *regmap = tx->regmap; in swclk_gate_disable()
1886 clk_disable_unprepare(tx->mclk); in swclk_gate_disable()
1894 regmap_read(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
1916 struct device *dev = tx->dev; in tx_macro_register_mclk_output()
1918 const char *clk_name = "lpass-tx-mclk"; in tx_macro_register_mclk_output()
1923 if (tx->npl) in tx_macro_register_mclk_output()
1924 parent_clk_name = __clk_get_name(tx->npl); in tx_macro_register_mclk_output()
1926 parent_clk_name = __clk_get_name(tx->mclk); in tx_macro_register_mclk_output()
1933 tx->hw.init = &init; in tx_macro_register_mclk_output()
1934 hw = &tx->hw; in tx_macro_register_mclk_output()
1943 .name = "RX-MACRO",
1955 struct device *dev = &pdev->dev; in tx_macro_probe()
1956 struct device_node *np = dev->of_node; in tx_macro_probe()
1966 return -ENOMEM; in tx_macro_probe()
1968 tx->macro = devm_clk_get_optional(dev, "macro"); in tx_macro_probe()
1969 if (IS_ERR(tx->macro)) in tx_macro_probe()
1970 return dev_err_probe(dev, PTR_ERR(tx->macro), "unable to get macro clock\n"); in tx_macro_probe()
1972 tx->dcodec = devm_clk_get_optional(dev, "dcodec"); in tx_macro_probe()
1973 if (IS_ERR(tx->dcodec)) in tx_macro_probe()
1974 return dev_err_probe(dev, PTR_ERR(tx->dcodec), "unable to get dcodec clock\n"); in tx_macro_probe()
1976 tx->mclk = devm_clk_get(dev, "mclk"); in tx_macro_probe()
1977 if (IS_ERR(tx->mclk)) in tx_macro_probe()
1978 return dev_err_probe(dev, PTR_ERR(tx->mclk), "unable to get mclk clock\n"); in tx_macro_probe()
1981 tx->npl = devm_clk_get(dev, "npl"); in tx_macro_probe()
1982 if (IS_ERR(tx->npl)) in tx_macro_probe()
1983 return dev_err_probe(dev, PTR_ERR(tx->npl), "unable to get npl clock\n"); in tx_macro_probe()
1986 tx->fsgen = devm_clk_get(dev, "fsgen"); in tx_macro_probe()
1987 if (IS_ERR(tx->fsgen)) in tx_macro_probe()
1988 return dev_err_probe(dev, PTR_ERR(tx->fsgen), "unable to get fsgen clock\n"); in tx_macro_probe()
1990 tx->pds = lpass_macro_pds_init(dev); in tx_macro_probe()
1991 if (IS_ERR(tx->pds)) in tx_macro_probe()
1992 return PTR_ERR(tx->pds); in tx_macro_probe()
2001 if (of_device_is_compatible(np, "qcom,sc7280-lpass-tx-macro")) { in tx_macro_probe()
2014 tx->regmap = devm_regmap_init_mmio(dev, base, &tx_regmap_config); in tx_macro_probe()
2015 if (IS_ERR(tx->regmap)) { in tx_macro_probe()
2016 ret = PTR_ERR(tx->regmap); in tx_macro_probe()
2022 tx->dev = dev; in tx_macro_probe()
2025 tx->active_decimator[TX_MACRO_AIF1_CAP] = -1; in tx_macro_probe()
2026 tx->active_decimator[TX_MACRO_AIF2_CAP] = -1; in tx_macro_probe()
2027 tx->active_decimator[TX_MACRO_AIF3_CAP] = -1; in tx_macro_probe()
2030 clk_set_rate(tx->mclk, MCLK_FREQ); in tx_macro_probe()
2031 clk_set_rate(tx->npl, MCLK_FREQ); in tx_macro_probe()
2033 ret = clk_prepare_enable(tx->macro); in tx_macro_probe()
2037 ret = clk_prepare_enable(tx->dcodec); in tx_macro_probe()
2041 ret = clk_prepare_enable(tx->mclk); in tx_macro_probe()
2045 ret = clk_prepare_enable(tx->npl); in tx_macro_probe()
2049 ret = clk_prepare_enable(tx->fsgen); in tx_macro_probe()
2054 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2057 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2060 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2082 clk_disable_unprepare(tx->fsgen); in tx_macro_probe()
2084 clk_disable_unprepare(tx->npl); in tx_macro_probe()
2086 clk_disable_unprepare(tx->mclk); in tx_macro_probe()
2088 clk_disable_unprepare(tx->dcodec); in tx_macro_probe()
2090 clk_disable_unprepare(tx->macro); in tx_macro_probe()
2092 lpass_macro_pds_exit(tx->pds); in tx_macro_probe()
2099 struct tx_macro *tx = dev_get_drvdata(&pdev->dev); in tx_macro_remove()
2101 clk_disable_unprepare(tx->macro); in tx_macro_remove()
2102 clk_disable_unprepare(tx->dcodec); in tx_macro_remove()
2103 clk_disable_unprepare(tx->mclk); in tx_macro_remove()
2104 clk_disable_unprepare(tx->npl); in tx_macro_remove()
2105 clk_disable_unprepare(tx->fsgen); in tx_macro_remove()
2107 lpass_macro_pds_exit(tx->pds); in tx_macro_remove()
2114 regcache_cache_only(tx->regmap, true); in tx_macro_runtime_suspend()
2115 regcache_mark_dirty(tx->regmap); in tx_macro_runtime_suspend()
2117 clk_disable_unprepare(tx->fsgen); in tx_macro_runtime_suspend()
2118 clk_disable_unprepare(tx->npl); in tx_macro_runtime_suspend()
2119 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_suspend()
2129 ret = clk_prepare_enable(tx->mclk); in tx_macro_runtime_resume()
2135 ret = clk_prepare_enable(tx->npl); in tx_macro_runtime_resume()
2141 ret = clk_prepare_enable(tx->fsgen); in tx_macro_runtime_resume()
2147 regcache_cache_only(tx->regmap, false); in tx_macro_runtime_resume()
2148 regcache_sync(tx->regmap); in tx_macro_runtime_resume()
2152 clk_disable_unprepare(tx->npl); in tx_macro_runtime_resume()
2154 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_resume()
2165 .compatible = "qcom,sc7280-lpass-tx-macro",
2168 .compatible = "qcom,sm8250-lpass-tx-macro",
2171 .compatible = "qcom,sm8450-lpass-tx-macro",
2174 .compatible = "qcom,sm8550-lpass-tx-macro",
2176 .compatible = "qcom,sc8280xp-lpass-tx-macro",