Lines Matching +full:spk +full:- +full:btl
1 // SPDX-License-Identifier: GPL-2.0
3 // nau8822.c -- NAU8822 ALSA Soc Audio driver
8 // Co-author: John Hsu <kchsu0@nuvoton.com>
9 // Co-author: Seven Li <wtli@nuvoton.com>
184 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8822_eq_get()
189 val = (u16 *)ucontrol->value.bytes.data; in nau8822_eq_get()
191 for (i = 0; i < params->max / sizeof(u16); i++) { in nau8822_eq_get()
193 /* conversion of 16-bit integers between native CPU format in nau8822_eq_get()
205 * cut-off frequency, bandwidth control, and equalizer path.
216 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8822_eq_put()
222 data = kmemdup(ucontrol->value.bytes.data, in nau8822_eq_put()
223 params->max, GFP_KERNEL | GFP_DMA); in nau8822_eq_put()
225 return -ENOMEM; in nau8822_eq_put()
229 for (i = 0; i < params->max / sizeof(u16); i++) { in nau8822_eq_put()
230 /* conversion of 16-bit integers between native CPU format in nau8822_eq_put()
237 dev_err(component->dev, in nau8822_eq_put()
250 "Off", "NC", "u-law", "A-law"};
277 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
278 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
279 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
281 static const DECLARE_TLV_DB_SCALE(boost_tlv, -1500, 300, 1);
448 snd_soc_dapm_to_component(source->dapm); in check_mclk_select_pll()
618 struct snd_soc_component *component = dai->component; in nau8822_set_dai_sysclk()
621 nau8822->div_id = clk_id; in nau8822_set_dai_sysclk()
622 nau8822->sysclk = freq; in nau8822_set_dai_sysclk()
623 dev_dbg(component->dev, "master sysclk %dHz, source %s\n", freq, in nau8822_set_dai_sysclk()
636 return -EINVAL; in nau8822_calc_pll()
650 return -EINVAL; in nau8822_calc_pll()
651 pll_param->mclk_scaler = scal_sel; in nau8822_calc_pll()
654 /* Calculate the PLL 4-bit integer input and the PLL 24-bit fractional in nau8822_calc_pll()
658 pll_param->pre_factor = 0; in nau8822_calc_pll()
661 pll_param->pre_factor = 1; in nau8822_calc_pll()
663 pll_param->pll_int = (pll_ratio >> 28) & 0xF; in nau8822_calc_pll()
664 pll_param->pll_frac = ((pll_ratio & 0xFFFFFFF) >> 4); in nau8822_calc_pll()
671 struct snd_soc_component *component = dai->component; in nau8822_config_clkdiv()
673 struct nau8822_pll *pll = &nau8822->pll; in nau8822_config_clkdiv()
676 switch (nau8822->div_id) { in nau8822_config_clkdiv()
685 sclk = (nau8822->sysclk * 10) / nau8822_mclk_scaler[i]; in nau8822_config_clkdiv()
690 dev_dbg(component->dev, "master clock prescaler %x for fs %d\n", in nau8822_config_clkdiv()
704 if (pll->mclk_scaler != div) { in nau8822_config_clkdiv()
705 dev_err(component->dev, in nau8822_config_clkdiv()
707 return -EINVAL; in nau8822_config_clkdiv()
718 return -EINVAL; in nau8822_config_clkdiv()
727 struct snd_soc_component *component = dai->component; in nau8822_set_pll()
729 struct nau8822_pll *pll_param = &nau8822->pll; in nau8822_set_pll()
732 if (freq_in == pll_param->freq_in && in nau8822_set_pll()
733 freq_out == pll_param->freq_out) in nau8822_set_pll()
737 dev_dbg(component->dev, "PLL disabled\n"); in nau8822_set_pll()
747 dev_err(component->dev, "Unsupported input clock %d\n", in nau8822_set_pll()
752 dev_info(component->dev, in nau8822_set_pll()
754 pll_param->pll_int, pll_param->pll_frac, in nau8822_set_pll()
755 pll_param->mclk_scaler, pll_param->pre_factor); in nau8822_set_pll()
761 (pll_param->pre_factor ? NAU8822_PLLMCLK_DIV2 : 0) | in nau8822_set_pll()
762 pll_param->pll_int); in nau8822_set_pll()
764 NAU8822_REG_PLL_K1, (pll_param->pll_frac >> NAU8822_PLLK1_SFT) & in nau8822_set_pll()
767 NAU8822_REG_PLL_K2, (pll_param->pll_frac >> NAU8822_PLLK2_SFT) & in nau8822_set_pll()
770 NAU8822_REG_PLL_K3, pll_param->pll_frac & NAU8822_PLLK3_MASK); in nau8822_set_pll()
773 pll_param->mclk_scaler << NAU8822_MCLKSEL_SFT); in nau8822_set_pll()
779 pll_param->freq_in = freq_in; in nau8822_set_pll()
780 pll_param->freq_out = freq_out; in nau8822_set_pll()
787 struct snd_soc_component *component = dai->component; in nau8822_set_dai_fmt()
790 dev_dbg(component->dev, "%s\n", __func__); in nau8822_set_dai_fmt()
800 return -EINVAL; in nau8822_set_dai_fmt()
816 return -EINVAL; in nau8822_set_dai_fmt()
832 return -EINVAL; in nau8822_set_dai_fmt()
849 struct snd_soc_component *component = dai->component; in nau8822_hw_params()
866 return -EINVAL; in nau8822_hw_params()
884 return -EINVAL; in nau8822_hw_params()
907 return -EINVAL; in nau8822_hw_params()
918 if (nau8822->div_id == NAU8822_CLK_MCLK) in nau8822_hw_params()
926 struct snd_soc_component *component = dai->component; in nau8822_mute()
928 dev_dbg(component->dev, "%s: %d\n", __func__, mute); in nau8822_mute()
979 dev_dbg(component->dev, "%s: %d\n", __func__, level); in nau8822_set_bias_level()
999 .name = "nau8822-hifi",
1024 regcache_mark_dirty(nau8822->regmap); in nau8822_suspend()
1033 regcache_sync(nau8822->regmap); in nau8822_resume()
1041 * These registers contain an "update" bit - bit 8. This means, for example,
1043 * the update bit is set, will also the volume be updated - simultaneously for
1062 struct device_node *of_node = component->dev->of_node; in nau8822_probe()
1076 if (of_property_read_bool(of_node, "nuvoton,spk-btl")) in nau8822_probe()
1117 struct device *dev = &i2c->dev; in nau8822_i2c_probe()
1124 return -ENOMEM; in nau8822_i2c_probe()
1128 nau8822->regmap = devm_regmap_init_i2c(i2c, &nau8822_regmap_config); in nau8822_i2c_probe()
1129 if (IS_ERR(nau8822->regmap)) { in nau8822_i2c_probe()
1130 ret = PTR_ERR(nau8822->regmap); in nau8822_i2c_probe()
1131 dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret); in nau8822_i2c_probe()
1134 nau8822->dev = dev; in nau8822_i2c_probe()
1137 ret = regmap_write(nau8822->regmap, NAU8822_REG_RESET, 0x00); in nau8822_i2c_probe()
1139 dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); in nau8822_i2c_probe()
1146 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); in nau8822_i2c_probe()