Lines Matching full:addrlib
13 #include "addrlib/inc/addrinterface.h"
14 #include "addrlib/src/amdgpu_asic_addr.h"
664 struct ac_addrlib *addrlib = calloc(1, sizeof(struct ac_addrlib)); in ac_addrlib_create() local
665 if (!addrlib) { in ac_addrlib_create()
670 addrlib->handle = addrCreateOutput.hLib; in ac_addrlib_create()
671 simple_mtx_init(&addrlib->lock, mtx_plain); in ac_addrlib_create()
672 return addrlib; in ac_addrlib_create()
675 void ac_addrlib_destroy(struct ac_addrlib *addrlib) in ac_addrlib_destroy() argument
677 simple_mtx_destroy(&addrlib->lock); in ac_addrlib_destroy()
678 AddrDestroy(addrlib->handle); in ac_addrlib_destroy()
679 free(addrlib); in ac_addrlib_destroy()
682 void *ac_addrlib_get_handle(struct ac_addrlib *addrlib) in ac_addrlib_get_handle() argument
684 return addrlib->handle; in ac_addrlib_get_handle()
746 * matching is fine since addrlib needs only blk_w, blk_h and bpe to compute surface in bpe_to_format()
808 /* The addrlib pitch alignment is forced to this number for all chips to support interop
813 static int gfx6_compute_level(ADDR_HANDLE addrlib, const struct ac_surf_config *config, in gfx6_compute_level() argument
839 /* addrlib assumes the bytes/pixel is a divisor of 64, which is not in gfx6_compute_level()
870 ret = AddrComputeSurfaceInfo(addrlib, AddrSurfInfoIn, AddrSurfInfoOut); in gfx6_compute_level()
930 ret = AddrComputeDccInfo(addrlib, AddrDccIn, AddrDccOut); in gfx6_compute_level()
955 /* Compute the DCC slice size because addrlib doesn't in gfx6_compute_level()
972 ret = AddrComputeDccInfo(addrlib, AddrDccIn, AddrDccOut); in gfx6_compute_level()
1015 ret = AddrComputeHtileInfo(addrlib, AddrHtileIn, AddrHtileOut); in gfx6_compute_level()
1090 static int gfx6_surface_settings(ADDR_HANDLE addrlib, const struct radeon_info *info, in gfx6_surface_settings() argument
1128 int r = AddrComputeBaseSwizzle(addrlib, &AddrBaseSwizzleIn, &AddrBaseSwizzleOut); in gfx6_surface_settings()
1206 static int gfx6_compute_surface(ADDR_HANDLE addrlib, const struct radeon_info *info, in gfx6_compute_surface() argument
1378 /* If AddrSurfInfoIn.pTileInfo is set, Addrlib doesn't set in gfx6_compute_surface()
1382 * This is something that can easily be fixed in Addrlib. in gfx6_compute_surface()
1412 /* Addrlib doesn't set this if tileIndex is forced like above. */ in gfx6_compute_surface()
1430 r = gfx6_compute_level(addrlib, config, surf, false, level, compressed, &AddrSurfInfoIn, in gfx6_compute_surface()
1452 r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf); in gfx6_compute_surface()
1470 r = gfx6_compute_level(addrlib, config, surf, true, level, compressed, &AddrSurfInfoIn, in gfx6_compute_surface()
1485 r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf); in gfx6_compute_surface()
1517 r = AddrComputeFmaskInfo(addrlib, &fin, &fout); in gfx6_compute_surface()
1549 int r = AddrComputeBaseSwizzle(addrlib, &xin, &xout); in gfx6_compute_surface()
1559 * This is what addrlib does, but calling addrlib would be a lot more in gfx6_compute_surface()
1628 static int gfx9_get_preferred_swizzle_mode(ADDR_HANDLE addrlib, const struct radeon_info *info, in gfx9_get_preferred_swizzle_mode() argument
1725 ret = Addr2GetPreferredSurfaceSetting(addrlib, &sin, &sout); in gfx9_get_preferred_swizzle_mode()
1941 static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx9_compute_miptree() argument
1952 ret = Addr2ComputeSurfaceInfo(addrlib->handle, in, &out); in gfx9_compute_miptree()
2067 ret = Addr2ComputeHtileInfo(addrlib->handle, &hin, &hout); in gfx9_compute_miptree()
2118 ret = Addr2ComputePipeBankXor(addrlib->handle, &xin, &xout); in gfx9_compute_miptree()
2168 simple_mtx_lock(&addrlib->lock); in gfx9_compute_miptree()
2169 ret = Addr2ComputeDccInfo(addrlib->handle, &din, &dout); in gfx9_compute_miptree()
2171 simple_mtx_unlock(&addrlib->lock); in gfx9_compute_miptree()
2254 simple_mtx_lock(&addrlib->lock); in gfx9_compute_miptree()
2255 ret = Addr2ComputeDccInfo(addrlib->handle, &din, &dout); in gfx9_compute_miptree()
2257 simple_mtx_unlock(&addrlib->lock); in gfx9_compute_miptree()
2282 … ret = gfx9_get_preferred_swizzle_mode(addrlib->handle, info, surf, in, true, &fin.swizzleMode); in gfx9_compute_miptree()
2292 ret = Addr2ComputeFmaskInfo(addrlib->handle, &fin, &fout); in gfx9_compute_miptree()
2320 ret = Addr2ComputePipeBankXor(addrlib->handle, &xin, &xout); in gfx9_compute_miptree()
2361 simple_mtx_lock(&addrlib->lock); in gfx9_compute_miptree()
2362 ret = Addr2ComputeCmaskInfo(addrlib->handle, &cin, &cout); in gfx9_compute_miptree()
2364 simple_mtx_unlock(&addrlib->lock); in gfx9_compute_miptree()
2384 static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx9_compute_surface() argument
2533 r = gfx9_get_preferred_swizzle_mode(addrlib->handle, info, surf, &AddrSurfInfoIn, false, in gfx9_compute_surface()
2570 r = gfx9_compute_miptree(addrlib, info, config, surf, compressed, &AddrSurfInfoIn); in gfx9_compute_surface()
2582 r = gfx9_get_preferred_swizzle_mode(addrlib->handle, info, surf, &AddrSurfInfoIn, false, in gfx9_compute_surface()
2589 r = gfx9_compute_miptree(addrlib, info, config, surf, compressed, &AddrSurfInfoIn); in gfx9_compute_surface()
2601 r = Addr2IsValidDisplaySwizzleMode(addrlib->handle, surf->u.gfx9.swizzle_mode, in gfx9_compute_surface()
2763 static unsigned gfx12_select_swizzle_mode(struct ac_addrlib *addrlib, in gfx12_select_swizzle_mode() argument
2791 if (Addr3GetPossibleSwizzleModes(addrlib->handle, &get_in, &get_out) != ADDR_OK) { in gfx12_select_swizzle_mode()
2796 …/* TODO: Workaround for SW_LINEAR assertion failures in addrlib. This should be fixed in addrlib. … in gfx12_select_swizzle_mode()
3038 static bool gfx12_compute_hiz_his_info(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx12_compute_hiz_his_info() argument
3066 in.swizzleMode = gfx12_select_swizzle_mode(addrlib, info, NULL, &in); in gfx12_compute_hiz_his_info()
3068 int ret = Addr3ComputeSurfaceInfo(addrlib->handle, &in, &out); in gfx12_compute_hiz_his_info()
3080 static bool gfx12_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx12_compute_miptree() argument
3091 ret = Addr3ComputeSurfaceInfo(addrlib->handle, in, &out); in gfx12_compute_miptree()
3095 /* TODO: remove this block once addrlib stops giving us 64K pitch for small images, breaking in gfx12_compute_miptree()
3119 !gfx12_compute_hiz_his_info(addrlib, info, surf, &surf->u.gfx9.zs.his, in)) in gfx12_compute_miptree()
3182 return gfx12_compute_hiz_his_info(addrlib, info, surf, &surf->u.gfx9.zs.hiz, in); in gfx12_compute_miptree()
3198 ret = Addr3ComputePipeBankXor(addrlib->handle, &xin, &xout); in gfx12_compute_miptree()
3209 static bool gfx12_compute_surface(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx12_compute_surface() argument
3268 AddrSurfInfoIn.swizzleMode = gfx12_select_swizzle_mode(addrlib, info, surf, &AddrSurfInfoIn); in gfx12_compute_surface()
3321 !gfx12_compute_miptree(addrlib, info, config, surf, compressed, &AddrSurfInfoIn)) in gfx12_compute_surface()
3338 if (!gfx12_compute_miptree(addrlib, info, config, surf, compressed, &AddrSurfInfoIn)) in gfx12_compute_surface()
3345 int ac_compute_surface(struct ac_addrlib *addrlib, const struct radeon_info *info, in ac_compute_surface() argument
3363 if (!gfx12_compute_surface(addrlib, info, config, mode, surf)) in ac_compute_surface()
3393 r = gfx9_compute_surface(addrlib, info, config, mode, surf); in ac_compute_surface()
3395 r = gfx6_compute_surface(addrlib->handle, info, config, mode, surf); in ac_compute_surface()
4058 ac_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info *info, in ac_surface_addr_from_coord() argument
4084 Addr2ComputeSurfaceAddrFromCoord(addrlib->handle, &input, &output); in ac_surface_addr_from_coord()
4089 gfx12_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx12_surface_compute_nbc_view() argument
4117 res = Addr3ComputeNonBlockCompressedView(addrlib->handle, &input, &output); in gfx12_surface_compute_nbc_view()
4132 gfx10_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info, in gfx10_surface_compute_nbc_view() argument
4161 res = Addr2ComputeNonBlockCompressedView(addrlib->handle, &input, &output); in gfx10_surface_compute_nbc_view()
4176 ac_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info, in ac_surface_compute_nbc_view() argument
4184 gfx12_surface_compute_nbc_view(addrlib, info, surf, surf_info, level, layer, out); in ac_surface_compute_nbc_view()
4186 gfx10_surface_compute_nbc_view(addrlib, info, surf, surf_info, level, layer, out); in ac_surface_compute_nbc_view()