Lines Matching full:printf
104 printf(".mem = {\n"); in amdgpu_dump_memory()
105 printf(" .vram = {\n"); in amdgpu_dump_memory()
106 printf(" .total_heap_size = UINT64_C(%"PRIu64"),\n", (uint64_t)info.vram.total_heap_size); in amdgpu_dump_memory()
107 printf(" .usable_heap_size = UINT64_C(%"PRIu64"),\n", (uint64_t)info.vram.usable_heap_size); in amdgpu_dump_memory()
108 printf(" .heap_usage = UINT64_C(%"PRIu64"),\n", (uint64_t)info.vram.heap_usage); in amdgpu_dump_memory()
109 printf(" .max_allocation = UINT64_C(%"PRIu64"),\n", (uint64_t)info.vram.max_allocation); in amdgpu_dump_memory()
110 printf(" },\n"); in amdgpu_dump_memory()
111 printf(" .cpu_accessible_vram = {\n"); in amdgpu_dump_memory()
112 printf(" .total_heap_size = UINT64_C(%"PRIu64"),\n", in amdgpu_dump_memory()
114 printf(" .usable_heap_size = UINT64_C(%"PRIu64"),\n", in amdgpu_dump_memory()
116 printf(" .heap_usage = UINT64_C(%"PRIu64"),\n", in amdgpu_dump_memory()
118 printf(" .max_allocation = UINT64_C(%"PRIu64"),\n", in amdgpu_dump_memory()
120 printf(" },\n"); in amdgpu_dump_memory()
121 printf(" .gtt = {\n"); in amdgpu_dump_memory()
122 printf(" .total_heap_size = UINT64_C(%"PRIu64"),\n", (uint64_t)info.gtt.total_heap_size); in amdgpu_dump_memory()
123 printf(" .usable_heap_size = UINT64_C(%"PRIu64"),\n", (uint64_t)info.gtt.usable_heap_size); in amdgpu_dump_memory()
124 printf(" .heap_usage = UINT64_C(%"PRIu64"),\n", (uint64_t)info.gtt.heap_usage); in amdgpu_dump_memory()
125 printf(" .max_allocation = UINT64_C(%"PRIu64"),\n", (uint64_t)info.gtt.max_allocation); in amdgpu_dump_memory()
126 printf(" },\n"); in amdgpu_dump_memory()
127 printf("},\n"); in amdgpu_dump_memory()
172 printf(".dev = {\n"); in amdgpu_dump_dev_info()
173 printf(" .device_id = 0x%04x,\n", info.device_id); in amdgpu_dump_dev_info()
174 printf(" .chip_rev = 0x%02x,\n", info.chip_rev); in amdgpu_dump_dev_info()
175 printf(" .external_rev = 0x%02x,\n", info.external_rev); in amdgpu_dump_dev_info()
176 printf(" .pci_rev = 0x%02x,\n", info.pci_rev); in amdgpu_dump_dev_info()
178 printf(" .family = %s,\n", family_name); in amdgpu_dump_dev_info()
180 printf(" .num_shader_engines = %u,\n", info.num_shader_engines); in amdgpu_dump_dev_info()
181 printf(" .num_shader_arrays_per_engine = %u,\n", info.num_shader_arrays_per_engine); in amdgpu_dump_dev_info()
182 printf(" .gpu_counter_freq = %u,\n", info.gpu_counter_freq); in amdgpu_dump_dev_info()
183 printf(" .max_engine_clock = UINT64_C(%"PRIu64"),\n", (uint64_t)info.max_engine_clock); in amdgpu_dump_dev_info()
184 printf(" .max_memory_clock = UINT64_C(%"PRIu64"),\n", (uint64_t)info.max_memory_clock); in amdgpu_dump_dev_info()
185 printf(" .cu_active_number = %u,\n", info.cu_active_number); in amdgpu_dump_dev_info()
186 printf(" .cu_ao_mask = 0x%x,\n", info.cu_ao_mask); in amdgpu_dump_dev_info()
188 printf(" .cu_bitmap = {\n"); in amdgpu_dump_dev_info()
190 printf(" {"); in amdgpu_dump_dev_info()
192 printf(" 0x%x,", info.cu_bitmap[i][j]); in amdgpu_dump_dev_info()
193 printf(" },\n"); in amdgpu_dump_dev_info()
195 printf(" },\n"); in amdgpu_dump_dev_info()
197 printf(" .enabled_rb_pipes_mask = 0x%x,\n", info.enabled_rb_pipes_mask); in amdgpu_dump_dev_info()
198 printf(" .num_rb_pipes = %u,\n", info.num_rb_pipes); in amdgpu_dump_dev_info()
199 printf(" .num_hw_gfx_contexts = %u,\n", info.num_hw_gfx_contexts); in amdgpu_dump_dev_info()
200 printf(" .pcie_gen = %u,\n", info.pcie_gen); in amdgpu_dump_dev_info()
201 printf(" .ids_flags = UINT64_C(0x%"PRIx64"),\n", (uint64_t)info.ids_flags); in amdgpu_dump_dev_info()
202 printf(" .virtual_address_offset = UINT64_C(0x%"PRIx64"),\n", in amdgpu_dump_dev_info()
204 printf(" .virtual_address_max = UINT64_C(0x%"PRIx64"),\n", (uint64_t)info.virtual_address_max); in amdgpu_dump_dev_info()
205 printf(" .virtual_address_alignment = %u,\n", info.virtual_address_alignment); in amdgpu_dump_dev_info()
206 printf(" .pte_fragment_size = %u,\n", info.pte_fragment_size); in amdgpu_dump_dev_info()
207 printf(" .gart_page_size = %u,\n", info.gart_page_size); in amdgpu_dump_dev_info()
208 printf(" .ce_ram_size = %u,\n", info.ce_ram_size); in amdgpu_dump_dev_info()
209 printf(" .vram_type = %u,\n", info.vram_type); in amdgpu_dump_dev_info()
210 printf(" .vram_bit_width = %u,\n", info.vram_bit_width); in amdgpu_dump_dev_info()
211 printf(" .vce_harvest_config = %u,\n", info.vce_harvest_config); in amdgpu_dump_dev_info()
212 printf(" .gc_double_offchip_lds_buf = %u,\n", info.gc_double_offchip_lds_buf); in amdgpu_dump_dev_info()
213 printf(" .prim_buf_gpu_addr = UINT64_C(%"PRIu64"),\n", (uint64_t)info.prim_buf_gpu_addr); in amdgpu_dump_dev_info()
214 printf(" .pos_buf_gpu_addr = UINT64_C(%"PRIu64"),\n", (uint64_t)info.pos_buf_gpu_addr); in amdgpu_dump_dev_info()
215 printf(" .cntl_sb_buf_gpu_addr = UINT64_C(%"PRIu64"),\n", (uint64_t)info.cntl_sb_buf_gpu_addr); in amdgpu_dump_dev_info()
216 printf(" .param_buf_gpu_addr = UINT64_C(%"PRIu64"),\n", (uint64_t)info.param_buf_gpu_addr); in amdgpu_dump_dev_info()
217 printf(" .prim_buf_size = %u,\n", info.prim_buf_size); in amdgpu_dump_dev_info()
218 printf(" .pos_buf_size = %u,\n", info.pos_buf_size); in amdgpu_dump_dev_info()
219 printf(" .cntl_sb_buf_size = %u,\n", info.cntl_sb_buf_size); in amdgpu_dump_dev_info()
220 printf(" .param_buf_size = %u,\n", info.param_buf_size); in amdgpu_dump_dev_info()
221 printf(" .wave_front_size = %u,\n", info.wave_front_size); in amdgpu_dump_dev_info()
222 printf(" .num_shader_visible_vgprs = %u,\n", info.num_shader_visible_vgprs); in amdgpu_dump_dev_info()
223 printf(" .num_cu_per_sh = %u,\n", info.num_cu_per_sh); in amdgpu_dump_dev_info()
224 printf(" .num_tcc_blocks = %u,\n", info.num_tcc_blocks); in amdgpu_dump_dev_info()
225 printf(" .gs_vgt_table_depth = %u,\n", info.gs_vgt_table_depth); in amdgpu_dump_dev_info()
226 printf(" .gs_prim_buffer_depth = %u,\n", info.gs_prim_buffer_depth); in amdgpu_dump_dev_info()
227 printf(" .max_gs_waves_per_vgt = %u,\n", info.max_gs_waves_per_vgt); in amdgpu_dump_dev_info()
228 printf(" .pcie_num_lanes = %u,\n", info.pcie_num_lanes); in amdgpu_dump_dev_info()
230 printf(" .cu_ao_bitmap = {\n"); in amdgpu_dump_dev_info()
232 printf(" {"); in amdgpu_dump_dev_info()
234 printf(" 0x%x,", info.cu_ao_bitmap[i][j]); in amdgpu_dump_dev_info()
235 printf(" },\n"); in amdgpu_dump_dev_info()
237 printf(" },\n"); in amdgpu_dump_dev_info()
239 printf(" .high_va_offset = UINT64_C(0x%"PRIx64"),\n", (uint64_t)info.high_va_offset); in amdgpu_dump_dev_info()
240 printf(" .high_va_max = UINT64_C(0x%"PRIx64"),\n", (uint64_t)info.high_va_max); in amdgpu_dump_dev_info()
241 printf(" .pa_sc_tile_steering_override = %u,\n", info.pa_sc_tile_steering_override); in amdgpu_dump_dev_info()
242 printf(" .tcc_disabled_mask = UINT64_C(%"PRIu64"),\n", (uint64_t)info.tcc_disabled_mask); in amdgpu_dump_dev_info()
243 printf(" .min_engine_clock = UINT64_C(%"PRIu64"),\n", (uint64_t)info.min_engine_clock); in amdgpu_dump_dev_info()
244 printf(" .min_memory_clock = UINT64_C(%"PRIu64"),\n", (uint64_t)info.min_memory_clock); in amdgpu_dump_dev_info()
245 printf(" .tcp_cache_size = %u,\n", info.tcp_cache_size); in amdgpu_dump_dev_info()
246 printf(" .num_sqc_per_wgp = %u,\n", info.num_sqc_per_wgp); in amdgpu_dump_dev_info()
247 printf(" .sqc_data_cache_size = %u,\n", info.sqc_data_cache_size); in amdgpu_dump_dev_info()
248 printf(" .sqc_inst_cache_size = %u,\n", info.sqc_inst_cache_size); in amdgpu_dump_dev_info()
249 printf(" .gl1c_cache_size = %u,\n", info.gl1c_cache_size); in amdgpu_dump_dev_info()
250 printf(" .gl2c_cache_size = %u,\n", info.gl2c_cache_size); in amdgpu_dump_dev_info()
251 printf(" .mall_size = UINT64_C(%"PRIu64"),\n", (uint64_t)info.mall_size); in amdgpu_dump_dev_info()
252 printf(" .enabled_rb_pipes_mask_hi = %u,\n", info.enabled_rb_pipes_mask_hi); in amdgpu_dump_dev_info()
253 printf("},\n"); in amdgpu_dump_dev_info()
311 printf(".mmr_regs = {\n"); in amdgpu_dump_mmr_regs()
313 printf(" 0x%04x, 0x%08x, 0x%08x,\n", rec.regs[i], rec.instances[i], rec.vals[i]); in amdgpu_dump_mmr_regs()
314 printf("},\n"); in amdgpu_dump_mmr_regs()
315 printf(".mmr_reg_count = %d,\n", rec.count); in amdgpu_dump_mmr_regs()
344 printf(".fw_%s = {\n", fw_vers[i].name); in amdgpu_dump_fw_versions()
345 printf(" .ver = %u,\n", info.ver); in amdgpu_dump_fw_versions()
346 printf(" .feature = %u,\n", info.feature); in amdgpu_dump_fw_versions()
347 printf("},\n"); in amdgpu_dump_fw_versions()
373 printf(".hw_ip_%s = {\n", hw_ips[i].name); in amdgpu_dump_hw_ips()
374 printf(" .hw_ip_version_major = %u,\n", info.hw_ip_version_major); in amdgpu_dump_hw_ips()
375 printf(" .hw_ip_version_minor = %u,\n", info.hw_ip_version_minor); in amdgpu_dump_hw_ips()
376 printf(" .capabilities_flags = UINT64_C(%"PRIu64"),\n", (uint64_t)info.capabilities_flags); in amdgpu_dump_hw_ips()
377 printf(" .ib_start_alignment = %u,\n", info.ib_start_alignment); in amdgpu_dump_hw_ips()
378 printf(" .ib_size_alignment = %u,\n", info.ib_size_alignment); in amdgpu_dump_hw_ips()
379 printf(" .available_rings = 0x%x,\n", info.available_rings); in amdgpu_dump_hw_ips()
380 printf(" .ip_discovery_version = 0x%04x,\n", info.ip_discovery_version); in amdgpu_dump_hw_ips()
381 printf("},\n"); in amdgpu_dump_hw_ips()
392 printf(".drm = {\n"); in amdgpu_dump_version()
393 printf(" .version_major = %d,\n", ver->version_major); in amdgpu_dump_version()
394 printf(" .version_minor = %d,\n", ver->version_minor); in amdgpu_dump_version()
395 printf(" .version_patchlevel = %d,\n", ver->version_patchlevel); in amdgpu_dump_version()
396 printf(" .name = \"%s\",\n", ver->name); in amdgpu_dump_version()
397 printf("},\n"); in amdgpu_dump_version()
405 printf(".pci = {\n"); in amdgpu_dump_pci()
406 printf(" .vendor_id = 0x%04x,\n", dev->deviceinfo.pci->vendor_id); in amdgpu_dump_pci()
407 printf(" .device_id = 0x%04x,\n", dev->deviceinfo.pci->device_id); in amdgpu_dump_pci()
408 printf(" .subvendor_id = 0x%04x,\n", dev->deviceinfo.pci->subvendor_id); in amdgpu_dump_pci()
409 printf(" .subdevice_id = 0x%04x,\n", dev->deviceinfo.pci->subdevice_id); in amdgpu_dump_pci()
410 printf(" .revision_id = 0x%02x,\n", dev->deviceinfo.pci->revision_id); in amdgpu_dump_pci()
411 printf("},\n"); in amdgpu_dump_pci()