1 /* 2 * 3 * (C) COPYRIGHT 2020 ARM Limited. All rights reserved. 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation, and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, you can access it online at 17 * http://www.gnu.org/licenses/gpl-2.0.html. 18 * 19 * SPDX-License-Identifier: GPL-2.0 20 * 21 */ 22 #ifndef BASE_JM_KERNEL_H_ 23 #define BASE_JM_KERNEL_H_ 24 25 /* Memory allocation, access/hint flags. 26 * 27 * See base_mem_alloc_flags. 28 */ 29 #define BASE_MEM_FLAGS_NR_HI_BITS 32 30 #define BASE_MEM_FLAGS_MAX 0xFFFFFFFF 31 #define KBASE_INSTR_STATE_USE 24 32 #define KBASE_RENDERPASS_ID_SIZE 8 33 #define KBASE_BASE_MEM_PROTECTED 16 34 35 /* IN */ 36 /* Read access CPU side 37 */ 38 #define BASE_MEM_PROT_CPU_RD ((base_mem_alloc_flags)1 << 0) 39 40 /* Write access CPU side 41 */ 42 #define BASE_MEM_PROT_CPU_WR ((base_mem_alloc_flags)1 << 1) 43 44 /* Read access GPU side 45 */ 46 #define BASE_MEM_PROT_GPU_RD ((base_mem_alloc_flags)1 << 2) 47 48 /* Write access GPU side 49 */ 50 #define BASE_MEM_PROT_GPU_WR ((base_mem_alloc_flags)1 << 3) 51 52 /* Execute allowed on the GPU side 53 */ 54 #define BASE_MEM_PROT_GPU_EX ((base_mem_alloc_flags)1 << 4) 55 56 /* Will be permanently mapped in kernel space. 57 * Flag is only allowed on allocations originating from kbase. 58 */ 59 #define BASEP_MEM_PERMANENT_KERNEL_MAPPING ((base_mem_alloc_flags)1 << 5) 60 61 /* The allocation will completely reside within the same 4GB chunk in the GPU 62 * virtual space. 63 * Since this flag is primarily required only for the TLS memory which will 64 * not be used to contain executable code and also not used for Tiler heap, 65 * it can't be used along with BASE_MEM_PROT_GPU_EX and TILER_ALIGN_TOP flags. 66 */ 67 #define BASE_MEM_GPU_VA_SAME_4GB_PAGE ((base_mem_alloc_flags)1 << 6) 68 69 /* Userspace is not allowed to free this memory. 70 * Flag is only allowed on allocations originating from kbase. 71 */ 72 #define BASEP_MEM_NO_USER_FREE ((base_mem_alloc_flags)1 << 7) 73 74 #define BASE_MEM_RESERVED_BIT_8 ((base_mem_alloc_flags)1 << 8) 75 76 /* Grow backing store on GPU Page Fault 77 */ 78 #define BASE_MEM_GROW_ON_GPF ((base_mem_alloc_flags)1 << 9) 79 80 /* Page coherence Outer shareable, if available 81 */ 82 #define BASE_MEM_COHERENT_SYSTEM ((base_mem_alloc_flags)1 << 10) 83 84 /* Page coherence Inner shareable 85 */ 86 #define BASE_MEM_COHERENT_LOCAL ((base_mem_alloc_flags)1 << 11) 87 88 /* IN/OUT */ 89 /* Should be cached on the CPU, returned if actually cached 90 */ 91 #define BASE_MEM_CACHED_CPU ((base_mem_alloc_flags)1 << 12) 92 93 /* IN/OUT */ 94 /* Must have same VA on both the GPU and the CPU 95 */ 96 #define BASE_MEM_SAME_VA ((base_mem_alloc_flags)1 << 13) 97 98 /* OUT */ 99 /* Must call mmap to acquire a GPU address for the allocation 100 */ 101 #define BASE_MEM_NEED_MMAP ((base_mem_alloc_flags)1 << 14) 102 103 /* IN */ 104 /* Page coherence Outer shareable, required. 105 */ 106 #define BASE_MEM_COHERENT_SYSTEM_REQUIRED ((base_mem_alloc_flags)1 << 15) 107 108 /* Protected memory 109 */ 110 #define BASE_MEM_PROTECTED ((base_mem_alloc_flags)1 << 16) 111 112 /* Not needed physical memory 113 */ 114 #define BASE_MEM_DONT_NEED ((base_mem_alloc_flags)1 << 17) 115 116 /* Must use shared CPU/GPU zone (SAME_VA zone) but doesn't require the 117 * addresses to be the same 118 */ 119 #define BASE_MEM_IMPORT_SHARED ((base_mem_alloc_flags)1 << 18) 120 121 /** 122 * Bit 19 is reserved. 123 * 124 * Do not remove, use the next unreserved bit for new flags 125 */ 126 #define BASE_MEM_RESERVED_BIT_19 ((base_mem_alloc_flags)1 << 19) 127 128 /** 129 * Memory starting from the end of the initial commit is aligned to 'extent' 130 * pages, where 'extent' must be a power of 2 and no more than 131 * BASE_MEM_TILER_ALIGN_TOP_EXTENT_MAX_PAGES 132 */ 133 #define BASE_MEM_TILER_ALIGN_TOP ((base_mem_alloc_flags)1 << 20) 134 135 /* Should be uncached on the GPU, will work only for GPUs using AARCH64 mmu 136 * mode. Some components within the GPU might only be able to access memory 137 * that is GPU cacheable. Refer to the specific GPU implementation for more 138 * details. The 3 shareability flags will be ignored for GPU uncached memory. 139 * If used while importing USER_BUFFER type memory, then the import will fail 140 * if the memory is not aligned to GPU and CPU cache line width. 141 */ 142 #define BASE_MEM_UNCACHED_GPU ((base_mem_alloc_flags)1 << 21) 143 144 /* 145 * Bits [22:25] for group_id (0~15). 146 * 147 * base_mem_group_id_set() should be used to pack a memory group ID into a 148 * base_mem_alloc_flags value instead of accessing the bits directly. 149 * base_mem_group_id_get() should be used to extract the memory group ID from 150 * a base_mem_alloc_flags value. 151 */ 152 #define BASEP_MEM_GROUP_ID_SHIFT 22 153 #define BASE_MEM_GROUP_ID_MASK ((base_mem_alloc_flags)0xF << BASEP_MEM_GROUP_ID_SHIFT) 154 155 /* Must do CPU cache maintenance when imported memory is mapped/unmapped 156 * on GPU. Currently applicable to dma-buf type only. 157 */ 158 #define BASE_MEM_IMPORT_SYNC_ON_MAP_UNMAP ((base_mem_alloc_flags)1 << 26) 159 160 /* Use the GPU VA chosen by the kernel client */ 161 #define BASE_MEM_FLAG_MAP_FIXED ((base_mem_alloc_flags)1 << 27) 162 163 /* OUT */ 164 /* Kernel side cache sync ops required */ 165 #define BASE_MEM_KERNEL_SYNC ((base_mem_alloc_flags)1 << 28) 166 167 /* Force trimming of JIT allocations when creating a new allocation */ 168 #define BASEP_MEM_PERFORM_JIT_TRIM ((base_mem_alloc_flags)1 << 29) 169 170 /* Number of bits used as flags for base memory management 171 * 172 * Must be kept in sync with the base_mem_alloc_flags flags 173 */ 174 #define BASE_MEM_FLAGS_NR_BITS 30 175 176 /* A mask of all the flags which are only valid for allocations within kbase, 177 * and may not be passed from user space. 178 */ 179 #define BASEP_MEM_FLAGS_KERNEL_ONLY \ 180 (BASEP_MEM_PERMANENT_KERNEL_MAPPING | BASEP_MEM_NO_USER_FREE | BASE_MEM_FLAG_MAP_FIXED | BASEP_MEM_PERFORM_JIT_TRIM) 181 182 /* A mask for all output bits, excluding IN/OUT bits. 183 */ 184 #define BASE_MEM_FLAGS_OUTPUT_MASK BASE_MEM_NEED_MMAP 185 186 /* A mask for all input bits, including IN/OUT bits. 187 */ 188 #define BASE_MEM_FLAGS_INPUT_MASK (((1 << BASE_MEM_FLAGS_NR_BITS) - 1) & ~BASE_MEM_FLAGS_OUTPUT_MASK) 189 190 /* A mask of all currently reserved flags 191 */ 192 #define BASE_MEM_FLAGS_RESERVED (BASE_MEM_RESERVED_BIT_8 | BASE_MEM_RESERVED_BIT_19) 193 194 #define BASEP_MEM_INVALID_HANDLE (0ull << 12) 195 #define BASE_MEM_MMU_DUMP_HANDLE (1ull << 12) 196 #define BASE_MEM_TRACE_BUFFER_HANDLE (2ull << 12) 197 #define BASE_MEM_MAP_TRACKING_HANDLE (3ull << 12) 198 #define BASEP_MEM_WRITE_ALLOC_PAGES_HANDLE (4ull << 12) 199 /* reserved handles ..-47<<PAGE_SHIFT> for future special handles */ 200 #define BASE_MEM_COOKIE_BASE (64ul << 12) 201 #define BASE_MEM_FIRST_FREE_ADDRESS ((BITS_PER_LONG << 12) + BASE_MEM_COOKIE_BASE) 202 203 /* Similar to BASE_MEM_TILER_ALIGN_TOP, memory starting from the end of the 204 * initial commit is aligned to 'extent' pages, where 'extent' must be a power 205 * of 2 and no more than BASE_MEM_TILER_ALIGN_TOP_EXTENT_MAX_PAGES 206 */ 207 #define BASE_JIT_ALLOC_MEM_TILER_ALIGN_TOP (1 << 0) 208 209 /** 210 * If set, the heap info address points to a u32 holding the used size in bytes; 211 * otherwise it points to a u64 holding the lowest address of unused memory. 212 */ 213 #define BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE (1 << 1) 214 215 /** 216 * Valid set of just-in-time memory allocation flags 217 * 218 * Note: BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE cannot be set if heap_info_gpu_addr 219 * in %base_jit_alloc_info is 0 (atom with BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE set 220 * and heap_info_gpu_addr being 0 will be rejected). 221 */ 222 #define BASE_JIT_ALLOC_VALID_FLAGS (BASE_JIT_ALLOC_MEM_TILER_ALIGN_TOP | BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE) 223 224 /** 225 * typedef base_context_create_flags - Flags to pass to ::base_context_init. 226 * 227 * Flags can be ORed together to enable multiple things. 228 * 229 * These share the same space as BASEP_CONTEXT_FLAG_*, and so must 230 * not collide with them. 231 */ 232 typedef u32 base_context_create_flags; 233 234 /* No flags set */ 235 #define BASE_CONTEXT_CREATE_FLAG_NONE ((base_context_create_flags)0) 236 237 /* Base context is embedded in a cctx object (flag used for CINSTR 238 * software counter macros) 239 */ 240 #define BASE_CONTEXT_CCTX_EMBEDDED ((base_context_create_flags)1 << 0) 241 242 /* Base context is a 'System Monitor' context for Hardware counters. 243 * 244 * One important side effect of this is that job submission is disabled. 245 */ 246 #define BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED ((base_context_create_flags)1 << 1) 247 248 /* Bit-shift used to encode a memory group ID in base_context_create_flags 249 */ 250 #define BASEP_CONTEXT_MMU_GROUP_ID_SHIFT (3) 251 252 /* Bitmask used to encode a memory group ID in base_context_create_flags 253 */ 254 #define BASEP_CONTEXT_MMU_GROUP_ID_MASK ((base_context_create_flags)0xF << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT) 255 256 /* Bitpattern describing the base_context_create_flags that can be 257 * passed to the kernel 258 */ 259 #define BASEP_CONTEXT_CREATE_KERNEL_FLAGS \ 260 (BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED | BASEP_CONTEXT_MMU_GROUP_ID_MASK) 261 262 /* Bitpattern describing the ::base_context_create_flags that can be 263 * passed to base_context_init() 264 */ 265 #define BASEP_CONTEXT_CREATE_ALLOWED_FLAGS (BASE_CONTEXT_CCTX_EMBEDDED | BASEP_CONTEXT_CREATE_KERNEL_FLAGS) 266 267 /* 268 * Private flags used on the base context 269 * 270 * These start at bit 31, and run down to zero. 271 * 272 * They share the same space as base_context_create_flags, and so must 273 * not collide with them. 274 */ 275 276 /* Private flag tracking whether job descriptor dumping is disabled */ 277 #define BASEP_CONTEXT_FLAG_JOB_DUMP_DISABLED ((base_context_create_flags)(1 << 31)) 278 279 /* Enable additional tracepoints for latency measurements (TL_ATOM_READY, 280 * TL_ATOM_DONE, TL_ATOM_PRIO_CHANGE, TL_ATOM_EVENT_POST) 281 */ 282 #define BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS (1 << 0) 283 284 /* Indicate that job dumping is enabled. This could affect certain timers 285 * to account for the performance impact. 286 */ 287 #define BASE_TLSTREAM_JOB_DUMPING_ENABLED (1 << 1) 288 289 #define BASE_TLSTREAM_FLAGS_MASK (BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS | BASE_TLSTREAM_JOB_DUMPING_ENABLED) 290 /* 291 * Dependency stuff, keep it private for now. May want to expose it if 292 * we decide to make the number of semaphores a configurable 293 * option. 294 */ 295 #define BASE_JD_ATOM_COUNT 256 296 297 /* Maximum number of concurrent render passes. 298 */ 299 #define BASE_JD_RP_COUNT (256) 300 301 /* Set/reset values for a software event */ 302 #define BASE_JD_SOFT_EVENT_SET ((unsigned char)1) 303 #define BASE_JD_SOFT_EVENT_RESET ((unsigned char)0) 304 305 /** 306 * struct base_jd_udata - Per-job data 307 * 308 * This structure is used to store per-job data, and is completely unused 309 * by the Base driver. It can be used to store things such as callback 310 * function pointer, data to handle job completion. It is guaranteed to be 311 * untouched by the Base driver. 312 * 313 * @blob: per-job data array 314 */ 315 struct base_jd_udata { 316 u64 blob[2]; 317 }; 318 319 /** 320 * typedef base_jd_dep_type - Job dependency type. 321 * 322 * A flags field will be inserted into the atom structure to specify whether a 323 * dependency is a data or ordering dependency (by putting it before/after 324 * 'core_req' in the structure it should be possible to add without changing 325 * the structure size). 326 * When the flag is set for a particular dependency to signal that it is an 327 * ordering only dependency then errors will not be propagated. 328 */ 329 typedef u8 base_jd_dep_type; 330 331 #define BASE_JD_DEP_TYPE_INVALID (0) /**< Invalid dependency */ 332 #define BASE_JD_DEP_TYPE_DATA (1U << 0) /**< Data dependency */ 333 #define BASE_JD_DEP_TYPE_ORDER (1U << 1) /**< Order dependency */ 334 335 /** 336 * typedef base_jd_core_req - Job chain hardware requirements. 337 * 338 * A job chain must specify what GPU features it needs to allow the 339 * driver to schedule the job correctly. By not specifying the 340 * correct settings can/will cause an early job termination. Multiple 341 * values can be ORed together to specify multiple requirements. 342 * Special case is ::BASE_JD_REQ_DEP, which is used to express complex 343 * dependencies, and that doesn't execute anything on the hardware. 344 */ 345 typedef u32 base_jd_core_req; 346 347 /* Requirements that come from the HW */ 348 349 /* No requirement, dependency only 350 */ 351 #define BASE_JD_REQ_DEP ((base_jd_core_req)0) 352 353 /* Requires fragment shaders 354 */ 355 #define BASE_JD_REQ_FS ((base_jd_core_req)1 << 0) 356 357 /* Requires compute shaders 358 * 359 * This covers any of the following GPU job types: 360 * - Vertex Shader Job 361 * - Geometry Shader Job 362 * - An actual Compute Shader Job 363 * 364 * Compare this with BASE_JD_REQ_ONLY_COMPUTE, which specifies that the 365 * job is specifically just the "Compute Shader" job type, and not the "Vertex 366 * Shader" nor the "Geometry Shader" job type. 367 */ 368 #define BASE_JD_REQ_CS ((base_jd_core_req)1 << 1) 369 370 /* Requires tiling */ 371 #define BASE_JD_REQ_T ((base_jd_core_req)1 << 2) 372 373 /* Requires cache flushes */ 374 #define BASE_JD_REQ_CF ((base_jd_core_req)1 << 3) 375 376 /* Requires value writeback */ 377 #define BASE_JD_REQ_V ((base_jd_core_req)1 << 4) 378 379 /* SW-only requirements - the HW does not expose these as part of the job slot 380 * capabilities 381 */ 382 383 /* Requires fragment job with AFBC encoding */ 384 #define BASE_JD_REQ_FS_AFBC ((base_jd_core_req)1 << 13) 385 386 /* SW-only requirement: coalesce completion events. 387 * If this bit is set then completion of this atom will not cause an event to 388 * be sent to userspace, whether successful or not; completion events will be 389 * deferred until an atom completes which does not have this bit set. 390 * 391 * This bit may not be used in combination with BASE_JD_REQ_EXTERNAL_RESOURCES. 392 */ 393 #define BASE_JD_REQ_EVENT_COALESCE ((base_jd_core_req)1 << 5) 394 395 /* SW Only requirement: the job chain requires a coherent core group. We don't 396 * mind which coherent core group is used. 397 */ 398 #define BASE_JD_REQ_COHERENT_GROUP ((base_jd_core_req)1 << 6) 399 400 /* SW Only requirement: The performance counters should be enabled only when 401 * they are needed, to reduce power consumption. 402 */ 403 #define BASE_JD_REQ_PERMON ((base_jd_core_req)1 << 7) 404 405 /* SW Only requirement: External resources are referenced by this atom. 406 * 407 * This bit may not be used in combination with BASE_JD_REQ_EVENT_COALESCE and 408 * BASE_JD_REQ_SOFT_EVENT_WAIT. 409 */ 410 #define BASE_JD_REQ_EXTERNAL_RESOURCES ((base_jd_core_req)1 << 8) 411 412 /* SW Only requirement: Software defined job. Jobs with this bit set will not be 413 * submitted to the hardware but will cause some action to happen within the 414 * driver 415 */ 416 #define BASE_JD_REQ_SOFT_JOB ((base_jd_core_req)1 << 9) 417 418 #define BASE_JD_REQ_SOFT_DUMP_CPU_GPU_TIME (BASE_JD_REQ_SOFT_JOB | 0x1) 419 #define BASE_JD_REQ_SOFT_FENCE_TRIGGER (BASE_JD_REQ_SOFT_JOB | 0x2) 420 #define BASE_JD_REQ_SOFT_FENCE_WAIT (BASE_JD_REQ_SOFT_JOB | 0x3) 421 422 /* 0x4 RESERVED for now */ 423 424 /* SW only requirement: event wait/trigger job. 425 * 426 * - BASE_JD_REQ_SOFT_EVENT_WAIT: this job will block until the event is set. 427 * - BASE_JD_REQ_SOFT_EVENT_SET: this job sets the event, thus unblocks the 428 * other waiting jobs. It completes immediately. 429 * - BASE_JD_REQ_SOFT_EVENT_RESET: this job resets the event, making it 430 * possible for other jobs to wait upon. It completes immediately. 431 */ 432 #define BASE_JD_REQ_SOFT_EVENT_WAIT (BASE_JD_REQ_SOFT_JOB | 0x5) 433 #define BASE_JD_REQ_SOFT_EVENT_SET (BASE_JD_REQ_SOFT_JOB | 0x6) 434 #define BASE_JD_REQ_SOFT_EVENT_RESET (BASE_JD_REQ_SOFT_JOB | 0x7) 435 436 #define BASE_JD_REQ_SOFT_DEBUG_COPY (BASE_JD_REQ_SOFT_JOB | 0x8) 437 438 /* SW only requirement: Just In Time allocation 439 * 440 * This job requests a single or multiple just-in-time allocations through a 441 * list of base_jit_alloc_info structure which is passed via the jc element of 442 * the atom. The number of base_jit_alloc_info structures present in the 443 * list is passed via the nr_extres element of the atom 444 * 445 * It should be noted that the id entry in base_jit_alloc_info must not 446 * be reused until it has been released via BASE_JD_REQ_SOFT_JIT_FREE. 447 * 448 * Should this soft job fail it is expected that a BASE_JD_REQ_SOFT_JIT_FREE 449 * soft job to free the JIT allocation is still made. 450 * 451 * The job will complete immediately. 452 */ 453 #define BASE_JD_REQ_SOFT_JIT_ALLOC (BASE_JD_REQ_SOFT_JOB | 0x9) 454 455 /* SW only requirement: Just In Time free 456 * 457 * This job requests a single or multiple just-in-time allocations created by 458 * BASE_JD_REQ_SOFT_JIT_ALLOC to be freed. The ID list of the just-in-time 459 * allocations is passed via the jc element of the atom. 460 * 461 * The job will complete immediately. 462 */ 463 #define BASE_JD_REQ_SOFT_JIT_FREE (BASE_JD_REQ_SOFT_JOB | 0xa) 464 465 /* SW only requirement: Map external resource 466 * 467 * This job requests external resource(s) are mapped once the dependencies 468 * of the job have been satisfied. The list of external resources are 469 * passed via the jc element of the atom which is a pointer to a 470 * base_external_resource_list. 471 */ 472 #define BASE_JD_REQ_SOFT_EXT_RES_MAP (BASE_JD_REQ_SOFT_JOB | 0xb) 473 474 /* SW only requirement: Unmap external resource 475 * 476 * This job requests external resource(s) are unmapped once the dependencies 477 * of the job has been satisfied. The list of external resources are 478 * passed via the jc element of the atom which is a pointer to a 479 * base_external_resource_list. 480 */ 481 #define BASE_JD_REQ_SOFT_EXT_RES_UNMAP (BASE_JD_REQ_SOFT_JOB | 0xc) 482 483 /* HW Requirement: Requires Compute shaders (but not Vertex or Geometry Shaders) 484 * 485 * This indicates that the Job Chain contains GPU jobs of the 'Compute 486 * Shaders' type. 487 * 488 * In contrast to BASE_JD_REQ_CS, this does not indicate that the Job 489 * Chain contains 'Geometry Shader' or 'Vertex Shader' jobs. 490 */ 491 #define BASE_JD_REQ_ONLY_COMPUTE ((base_jd_core_req)1 << 10) 492 493 /* HW Requirement: Use the base_jd_atom::device_nr field to specify a 494 * particular core group 495 * 496 * If both BASE_JD_REQ_COHERENT_GROUP and this flag are set, this flag 497 * takes priority 498 * 499 * This is only guaranteed to work for BASE_JD_REQ_ONLY_COMPUTE atoms. 500 * 501 * If the core availability policy is keeping the required core group turned 502 * off, then the job will fail with a BASE_JD_EVENT_PM_EVENT error code. 503 */ 504 #define BASE_JD_REQ_SPECIFIC_COHERENT_GROUP ((base_jd_core_req)1 << 11) 505 506 /* SW Flag: If this bit is set then the successful completion of this atom 507 * will not cause an event to be sent to userspace 508 */ 509 #define BASE_JD_REQ_EVENT_ONLY_ON_FAILURE ((base_jd_core_req)1 << 12) 510 511 /* SW Flag: If this bit is set then completion of this atom will not cause an 512 * event to be sent to userspace, whether successful or not. 513 */ 514 #define BASEP_JD_REQ_EVENT_NEVER ((base_jd_core_req)1 << 14) 515 516 /* SW Flag: Skip GPU cache clean and invalidation before starting a GPU job. 517 * 518 * If this bit is set then the GPU's cache will not be cleaned and invalidated 519 * until a GPU job starts which does not have this bit set or a job completes 520 * which does not have the BASE_JD_REQ_SKIP_CACHE_END bit set. Do not use 521 * if the CPU may have written to memory addressed by the job since the last job 522 * without this bit set was submitted. 523 */ 524 #define BASE_JD_REQ_SKIP_CACHE_START ((base_jd_core_req)1 << 15) 525 526 /* SW Flag: Skip GPU cache clean and invalidation after a GPU job completes. 527 * 528 * If this bit is set then the GPU's cache will not be cleaned and invalidated 529 * until a GPU job completes which does not have this bit set or a job starts 530 * which does not have the BASE_JD_REQ_SKIP_CACHE_START bit set. Do not use 531 * if the CPU may read from or partially overwrite memory addressed by the job 532 * before the next job without this bit set completes. 533 */ 534 #define BASE_JD_REQ_SKIP_CACHE_END ((base_jd_core_req)1 << 16) 535 536 /* Request the atom be executed on a specific job slot. 537 * 538 * When this flag is specified, it takes precedence over any existing job slot 539 * selection logic. 540 */ 541 #define BASE_JD_REQ_JOB_SLOT ((base_jd_core_req)1 << 17) 542 543 /* SW-only requirement: The atom is the start of a renderpass. 544 * 545 * If this bit is set then the job chain will be soft-stopped if it causes the 546 * GPU to write beyond the end of the physical pages backing the tiler heap, and 547 * committing more memory to the heap would exceed an internal threshold. It may 548 * be resumed after running one of the job chains attached to an atom with 549 * BASE_JD_REQ_END_RENDERPASS set and the same renderpass ID. It may be 550 * resumed multiple times until it completes without memory usage exceeding the 551 * threshold. 552 * 553 * Usually used with BASE_JD_REQ_T. 554 */ 555 #define BASE_JD_REQ_START_RENDERPASS ((base_jd_core_req)1 << 18) 556 557 /* SW-only requirement: The atom is the end of a renderpass. 558 * 559 * If this bit is set then the atom incorporates the CPU address of a 560 * base_jd_fragment object instead of the GPU address of a job chain. 561 * 562 * Which job chain is run depends upon whether the atom with the same renderpass 563 * ID and the BASE_JD_REQ_START_RENDERPASS bit set completed normally or 564 * was soft-stopped when it exceeded an upper threshold for tiler heap memory 565 * usage. 566 * 567 * It also depends upon whether one of the job chains attached to the atom has 568 * already been run as part of the same renderpass (in which case it would have 569 * written unresolved multisampled and otherwise-discarded output to temporary 570 * buffers that need to be read back). The job chain for doing a forced read and 571 * forced write (from/to temporary buffers) is run as many times as necessary. 572 * 573 * Usually used with BASE_JD_REQ_FS. 574 */ 575 #define BASE_JD_REQ_END_RENDERPASS ((base_jd_core_req)1 << 19) 576 577 /* These requirement bits are currently unused in base_jd_core_req 578 */ 579 #define BASEP_JD_REQ_RESERVED \ 580 (~(BASE_JD_REQ_ATOM_TYPE | BASE_JD_REQ_EXTERNAL_RESOURCES | BASE_JD_REQ_EVENT_ONLY_ON_FAILURE | \ 581 BASEP_JD_REQ_EVENT_NEVER | BASE_JD_REQ_EVENT_COALESCE | BASE_JD_REQ_COHERENT_GROUP | \ 582 BASE_JD_REQ_SPECIFIC_COHERENT_GROUP | BASE_JD_REQ_FS_AFBC | BASE_JD_REQ_PERMON | BASE_JD_REQ_SKIP_CACHE_START | \ 583 BASE_JD_REQ_SKIP_CACHE_END | BASE_JD_REQ_JOB_SLOT | BASE_JD_REQ_START_RENDERPASS | BASE_JD_REQ_END_RENDERPASS)) 584 585 /* Mask of all bits in base_jd_core_req that control the type of the atom. 586 * 587 * This allows dependency only atoms to have flags set 588 */ 589 #define BASE_JD_REQ_ATOM_TYPE \ 590 (BASE_JD_REQ_FS | BASE_JD_REQ_CS | BASE_JD_REQ_T | BASE_JD_REQ_CF | BASE_JD_REQ_V | BASE_JD_REQ_SOFT_JOB | \ 591 BASE_JD_REQ_ONLY_COMPUTE) 592 593 /** 594 * Mask of all bits in base_jd_core_req that control the type of a soft job. 595 */ 596 #define BASE_JD_REQ_SOFT_JOB_TYPE (BASE_JD_REQ_SOFT_JOB | 0x1f) 597 598 /* Returns non-zero value if core requirements passed define a soft job or 599 * a dependency only job. 600 */ 601 #define BASE_JD_REQ_SOFT_JOB_OR_DEP(core_req) \ 602 (((core_req)&BASE_JD_REQ_SOFT_JOB) || ((core_req)&BASE_JD_REQ_ATOM_TYPE) == BASE_JD_REQ_DEP) 603 604 /** 605 * enum kbase_jd_atom_state 606 * 607 * @KBASE_JD_ATOM_STATE_UNUSED: Atom is not used. 608 * @KBASE_JD_ATOM_STATE_QUEUED: Atom is queued in JD. 609 * @KBASE_JD_ATOM_STATE_IN_JS: Atom has been given to JS (is runnable/running). 610 * @KBASE_JD_ATOM_STATE_HW_COMPLETED: Atom has been completed, but not yet 611 * handed back to job dispatcher for 612 * dependency resolution. 613 * @KBASE_JD_ATOM_STATE_COMPLETED: Atom has been completed, but not yet handed 614 * back to userspace. 615 */ 616 enum kbase_jd_atom_state { 617 KBASE_JD_ATOM_STATE_UNUSED, 618 KBASE_JD_ATOM_STATE_QUEUED, 619 KBASE_JD_ATOM_STATE_IN_JS, 620 KBASE_JD_ATOM_STATE_HW_COMPLETED, 621 KBASE_JD_ATOM_STATE_COMPLETED 622 }; 623 624 /** 625 * typedef base_atom_id - Type big enough to store an atom number in. 626 */ 627 typedef u8 base_atom_id; 628 629 /** 630 * struct base_dependency - 631 * 632 * @atom_id: An atom number 633 * @dependency_type: Dependency type 634 */ 635 struct base_dependency { 636 base_atom_id atom_id; 637 base_jd_dep_type dependency_type; 638 }; 639 640 /** 641 * struct base_jd_fragment - Set of GPU fragment job chains used for rendering. 642 * 643 * @norm_read_norm_write: Job chain for full rendering. 644 * GPU address of a fragment job chain to render in the 645 * circumstance where the tiler job chain did not exceed 646 * its memory usage threshold and no fragment job chain 647 * was previously run for the same renderpass. 648 * It is used no more than once per renderpass. 649 * @norm_read_forced_write: Job chain for starting incremental 650 * rendering. 651 * GPU address of a fragment job chain to render in 652 * the circumstance where the tiler job chain exceeded 653 * its memory usage threshold for the first time and 654 * no fragment job chain was previously run for the 655 * same renderpass. 656 * Writes unresolved multisampled and normally- 657 * discarded output to temporary buffers that must be 658 * read back by a subsequent forced_read job chain 659 * before the renderpass is complete. 660 * It is used no more than once per renderpass. 661 * @forced_read_forced_write: Job chain for continuing incremental 662 * rendering. 663 * GPU address of a fragment job chain to render in 664 * the circumstance where the tiler job chain 665 * exceeded its memory usage threshold again 666 * and a fragment job chain was previously run for 667 * the same renderpass. 668 * Reads unresolved multisampled and 669 * normally-discarded output from temporary buffers 670 * written by a previous forced_write job chain and 671 * writes the same to temporary buffers again. 672 * It is used as many times as required until 673 * rendering completes. 674 * @forced_read_norm_write: Job chain for ending incremental rendering. 675 * GPU address of a fragment job chain to render in the 676 * circumstance where the tiler job chain did not 677 * exceed its memory usage threshold this time and a 678 * fragment job chain was previously run for the same 679 * renderpass. 680 * Reads unresolved multisampled and normally-discarded 681 * output from temporary buffers written by a previous 682 * forced_write job chain in order to complete a 683 * renderpass. 684 * It is used no more than once per renderpass. 685 * 686 * This structure is referenced by the main atom structure if 687 * BASE_JD_REQ_END_RENDERPASS is set in the base_jd_core_req. 688 */ 689 struct base_jd_fragment { 690 u64 norm_read_norm_write; 691 u64 norm_read_forced_write; 692 u64 forced_read_forced_write; 693 u64 forced_read_norm_write; 694 }; 695 696 /** 697 * typedef base_jd_prio - Base Atom priority. 698 * 699 * Only certain priority levels are actually implemented, as specified by the 700 * BASE_JD_PRIO_<...> definitions below. It is undefined to use a priority 701 * level that is not one of those defined below. 702 * 703 * Priority levels only affect scheduling after the atoms have had dependencies 704 * resolved. For example, a low priority atom that has had its dependencies 705 * resolved might run before a higher priority atom that has not had its 706 * dependencies resolved. 707 * 708 * In general, fragment atoms do not affect non-fragment atoms with 709 * lower priorities, and vice versa. One exception is that there is only one 710 * priority value for each context. So a high-priority (e.g.) fragment atom 711 * could increase its context priority, causing its non-fragment atoms to also 712 * be scheduled sooner. 713 * 714 * The atoms are scheduled as follows with respect to their priorities: 715 * * Let atoms 'X' and 'Y' be for the same job slot who have dependencies 716 * resolved, and atom 'X' has a higher priority than atom 'Y' 717 * * If atom 'Y' is currently running on the HW, then it is interrupted to 718 * allow atom 'X' to run soon after 719 * * If instead neither atom 'Y' nor atom 'X' are running, then when choosing 720 * the next atom to run, atom 'X' will always be chosen instead of atom 'Y' 721 * * Any two atoms that have the same priority could run in any order with 722 * respect to each other. That is, there is no ordering constraint between 723 * atoms of the same priority. 724 * 725 * The sysfs file 'js_ctx_scheduling_mode' is used to control how atoms are 726 * scheduled between contexts. The default value, 0, will cause higher-priority 727 * atoms to be scheduled first, regardless of their context. The value 1 will 728 * use a round-robin algorithm when deciding which context's atoms to schedule 729 * next, so higher-priority atoms can only preempt lower priority atoms within 730 * the same context. See KBASE_JS_SYSTEM_PRIORITY_MODE and 731 * KBASE_JS_PROCESS_LOCAL_PRIORITY_MODE for more details. 732 */ 733 typedef u8 base_jd_prio; 734 735 /* Medium atom priority. This is a priority higher than BASE_JD_PRIO_LOW */ 736 #define BASE_JD_PRIO_MEDIUM ((base_jd_prio)0) 737 /* High atom priority. This is a priority higher than BASE_JD_PRIO_MEDIUM and 738 * BASE_JD_PRIO_LOW 739 */ 740 #define BASE_JD_PRIO_HIGH ((base_jd_prio)1) 741 /* Low atom priority. */ 742 #define BASE_JD_PRIO_LOW ((base_jd_prio)2) 743 744 /* Count of the number of priority levels. This itself is not a valid 745 * base_jd_prio setting 746 */ 747 #define BASE_JD_NR_PRIO_LEVELS 3 748 749 /** 750 * struct base_jd_atom_v2 - Node of a dependency graph used to submit a 751 * GPU job chain or soft-job to the kernel driver. 752 * 753 * @jc: GPU address of a job chain or (if BASE_JD_REQ_END_RENDERPASS 754 * is set in the base_jd_core_req) the CPU address of a 755 * base_jd_fragment object. 756 * @udata: User data. 757 * @extres_list: List of external resources. 758 * @nr_extres: Number of external resources or JIT allocations. 759 * @jit_id: Zero-terminated array of IDs of just-in-time memory 760 * allocations written to by the atom. When the atom 761 * completes, the value stored at the 762 * &struct_base_jit_alloc_info.heap_info_gpu_addr of 763 * each allocation is read in order to enforce an 764 * overall physical memory usage limit. 765 * @pre_dep: Pre-dependencies. One need to use SETTER function to assign 766 * this field; this is done in order to reduce possibility of 767 * improper assignment of a dependency field. 768 * @atom_number: Unique number to identify the atom. 769 * @prio: Atom priority. Refer to base_jd_prio for more details. 770 * @device_nr: Core group when BASE_JD_REQ_SPECIFIC_COHERENT_GROUP 771 * specified. 772 * @jobslot: Job slot to use when BASE_JD_REQ_JOB_SLOT is specified. 773 * @core_req: Core requirements. 774 * @renderpass_id: Renderpass identifier used to associate an atom that has 775 * BASE_JD_REQ_START_RENDERPASS set in its core requirements 776 * with an atom that has BASE_JD_REQ_END_RENDERPASS set. 777 * @padding: Unused. Must be zero. 778 * 779 * This structure has changed since UK 10.2 for which base_jd_core_req was a 780 * u16 value. 781 * 782 * In UK 10.3 a core_req field of a u32 type was added to the end of the 783 * structure, and the place in the structure previously occupied by u16 784 * core_req was kept but renamed to compat_core_req. 785 * 786 * From UK 11.20 - compat_core_req is now occupied by u8 jit_id[2]. 787 * Compatibility with UK 10.x from UK 11.y is not handled because 788 * the major version increase prevents this. 789 * 790 * For UK 11.20 jit_id[2] must be initialized to zero. 791 */ 792 struct base_jd_atom_v2 { 793 u64 jc; 794 struct base_jd_udata udata; 795 u64 extres_list; 796 u16 nr_extres; 797 u8 jit_id[2]; 798 struct base_dependency pre_dep[2]; 799 base_atom_id atom_number; 800 base_jd_prio prio; 801 u8 device_nr; 802 u8 jobslot; 803 base_jd_core_req core_req; 804 u8 renderpass_id; 805 u8 padding[7]; 806 }; 807 808 /** 809 * struct base_jd_atom - Same as base_jd_atom_v2, but has an extra seq_nr 810 * at the beginning. 811 * 812 * @seq_nr: Sequence number of logical grouping of atoms. 813 * @jc: GPU address of a job chain or (if BASE_JD_REQ_END_RENDERPASS 814 * is set in the base_jd_core_req) the CPU address of a 815 * base_jd_fragment object. 816 * @udata: User data. 817 * @extres_list: List of external resources. 818 * @nr_extres: Number of external resources or JIT allocations. 819 * @jit_id: Zero-terminated array of IDs of just-in-time memory 820 * allocations written to by the atom. When the atom 821 * completes, the value stored at the 822 * &struct_base_jit_alloc_info.heap_info_gpu_addr of 823 * each allocation is read in order to enforce an 824 * overall physical memory usage limit. 825 * @pre_dep: Pre-dependencies. One need to use SETTER function to assign 826 * this field; this is done in order to reduce possibility of 827 * improper assignment of a dependency field. 828 * @atom_number: Unique number to identify the atom. 829 * @prio: Atom priority. Refer to base_jd_prio for more details. 830 * @device_nr: Core group when BASE_JD_REQ_SPECIFIC_COHERENT_GROUP 831 * specified. 832 * @jobslot: Job slot to use when BASE_JD_REQ_JOB_SLOT is specified. 833 * @core_req: Core requirements. 834 * @renderpass_id: Renderpass identifier used to associate an atom that has 835 * BASE_JD_REQ_START_RENDERPASS set in its core requirements 836 * with an atom that has BASE_JD_REQ_END_RENDERPASS set. 837 * @padding: Unused. Must be zero. 838 */ 839 typedef struct base_jd_atom { 840 u64 seq_nr; 841 u64 jc; 842 struct base_jd_udata udata; 843 u64 extres_list; 844 u16 nr_extres; 845 u8 jit_id[2]; 846 struct base_dependency pre_dep[2]; 847 base_atom_id atom_number; 848 base_jd_prio prio; 849 u8 device_nr; 850 u8 jobslot; 851 base_jd_core_req core_req; 852 u8 renderpass_id; 853 u8 padding[7]; 854 } base_jd_atom; 855 856 /* Job chain event code bits 857 * Defines the bits used to create ::base_jd_event_code 858 */ 859 enum { 860 BASE_JD_SW_EVENT_KERNEL = (1u << 15), /* Kernel side event */ 861 BASE_JD_SW_EVENT = (1u << 14), /* SW defined event */ 862 /* Event indicates success (SW events only) */ 863 BASE_JD_SW_EVENT_SUCCESS = (1u << 13), 864 BASE_JD_SW_EVENT_JOB = (0u << 11), /* Job related event */ 865 BASE_JD_SW_EVENT_BAG = (1u << 11), /* Bag related event */ 866 BASE_JD_SW_EVENT_INFO = (2u << 11), /* Misc/info event */ 867 BASE_JD_SW_EVENT_RESERVED = (3u << 11), /* Reserved event type */ 868 /* Mask to extract the type from an event code */ 869 BASE_JD_SW_EVENT_TYPE_MASK = (3u << 11) 870 }; 871 872 /** 873 * enum base_jd_event_code - Job chain event codes 874 * 875 * @BASE_JD_EVENT_RANGE_HW_NONFAULT_START: Start of hardware non-fault status 876 * codes. 877 * Obscurely, BASE_JD_EVENT_TERMINATED 878 * indicates a real fault, because the 879 * job was hard-stopped. 880 * @BASE_JD_EVENT_NOT_STARTED: Can't be seen by userspace, treated as 881 * 'previous job done'. 882 * @BASE_JD_EVENT_STOPPED: Can't be seen by userspace, becomes 883 * TERMINATED, DONE or JOB_CANCELLED. 884 * @BASE_JD_EVENT_TERMINATED: This is actually a fault status code - the job 885 * was hard stopped. 886 * @BASE_JD_EVENT_ACTIVE: Can't be seen by userspace, jobs only returned on 887 * complete/fail/cancel. 888 * @BASE_JD_EVENT_RANGE_HW_NONFAULT_END: End of hardware non-fault status codes. 889 * Obscurely, BASE_JD_EVENT_TERMINATED 890 * indicates a real fault, 891 * because the job was hard-stopped. 892 * @BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_START: Start of hardware fault and 893 * software error status codes. 894 * @BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_END: End of hardware fault and 895 * software error status codes. 896 * @BASE_JD_EVENT_RANGE_SW_SUCCESS_START: Start of software success status 897 * codes. 898 * @BASE_JD_EVENT_RANGE_SW_SUCCESS_END: End of software success status codes. 899 * @BASE_JD_EVENT_RANGE_KERNEL_ONLY_START: Start of kernel-only status codes. 900 * Such codes are never returned to 901 * user-space. 902 * @BASE_JD_EVENT_RANGE_KERNEL_ONLY_END: End of kernel-only status codes. 903 * 904 * HW and low-level SW events are represented by event codes. 905 * The status of jobs which succeeded are also represented by 906 * an event code (see @BASE_JD_EVENT_DONE). 907 * Events are usually reported as part of a &struct base_jd_event. 908 * 909 * The event codes are encoded in the following way: 910 * * 10:0 - subtype 911 * * 12:11 - type 912 * * 13 - SW success (only valid if the SW bit is set) 913 * * 14 - SW event (HW event if not set) 914 * * 15 - Kernel event (should never be seen in userspace) 915 * 916 * Events are split up into ranges as follows: 917 * * BASE_JD_EVENT_RANGE_<description>_START 918 * * BASE_JD_EVENT_RANGE_<description>_END 919 * 920 * code is in <description>'s range when: 921 * BASE_JD_EVENT_RANGE_<description>_START <= code < 922 * BASE_JD_EVENT_RANGE_<description>_END 923 * 924 * Ranges can be asserted for adjacency by testing that the END of the previous 925 * is equal to the START of the next. This is useful for optimizing some tests 926 * for range. 927 * 928 * A limitation is that the last member of this enum must explicitly be handled 929 * (with an assert-unreachable statement) in switch statements that use 930 * variables of this type. Otherwise, the compiler warns that we have not 931 * handled that enum value. 932 */ 933 enum base_jd_event_code { 934 /* HW defined exceptions */ 935 BASE_JD_EVENT_RANGE_HW_NONFAULT_START = 0, 936 937 /* non-fatal exceptions */ 938 BASE_JD_EVENT_NOT_STARTED = 0x00, 939 BASE_JD_EVENT_DONE = 0x01, 940 BASE_JD_EVENT_STOPPED = 0x03, 941 BASE_JD_EVENT_TERMINATED = 0x04, 942 BASE_JD_EVENT_ACTIVE = 0x08, 943 944 BASE_JD_EVENT_RANGE_HW_NONFAULT_END = 0x40, 945 BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_START = 0x40, 946 947 /* job exceptions */ 948 BASE_JD_EVENT_JOB_CONFIG_FAULT = 0x40, 949 BASE_JD_EVENT_JOB_POWER_FAULT = 0x41, 950 BASE_JD_EVENT_JOB_READ_FAULT = 0x42, 951 BASE_JD_EVENT_JOB_WRITE_FAULT = 0x43, 952 BASE_JD_EVENT_JOB_AFFINITY_FAULT = 0x44, 953 BASE_JD_EVENT_JOB_BUS_FAULT = 0x48, 954 BASE_JD_EVENT_INSTR_INVALID_PC = 0x50, 955 BASE_JD_EVENT_INSTR_INVALID_ENC = 0x51, 956 BASE_JD_EVENT_INSTR_TYPE_MISMATCH = 0x52, 957 BASE_JD_EVENT_INSTR_OPERAND_FAULT = 0x53, 958 BASE_JD_EVENT_INSTR_TLS_FAULT = 0x54, 959 BASE_JD_EVENT_INSTR_BARRIER_FAULT = 0x55, 960 BASE_JD_EVENT_INSTR_ALIGN_FAULT = 0x56, 961 BASE_JD_EVENT_DATA_INVALID_FAULT = 0x58, 962 BASE_JD_EVENT_TILE_RANGE_FAULT = 0x59, 963 BASE_JD_EVENT_STATE_FAULT = 0x5A, 964 BASE_JD_EVENT_OUT_OF_MEMORY = 0x60, 965 BASE_JD_EVENT_UNKNOWN = 0x7F, 966 967 /* GPU exceptions */ 968 BASE_JD_EVENT_DELAYED_BUS_FAULT = 0x80, 969 BASE_JD_EVENT_SHAREABILITY_FAULT = 0x88, 970 971 /* MMU exceptions */ 972 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL1 = 0xC1, 973 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL2 = 0xC2, 974 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL3 = 0xC3, 975 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL4 = 0xC4, 976 BASE_JD_EVENT_PERMISSION_FAULT = 0xC8, 977 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL1 = 0xD1, 978 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL2 = 0xD2, 979 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL3 = 0xD3, 980 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL4 = 0xD4, 981 BASE_JD_EVENT_ACCESS_FLAG = 0xD8, 982 983 /* SW defined exceptions */ 984 BASE_JD_EVENT_MEM_GROWTH_FAILED = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x000, 985 BASE_JD_EVENT_TIMED_OUT = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x001, 986 BASE_JD_EVENT_JOB_CANCELLED = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x002, 987 BASE_JD_EVENT_JOB_INVALID = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x003, 988 BASE_JD_EVENT_PM_EVENT = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x004, 989 990 BASE_JD_EVENT_BAG_INVALID = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_BAG | 0x003, 991 992 BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_END = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_RESERVED | 0x3FF, 993 994 BASE_JD_EVENT_RANGE_SW_SUCCESS_START = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_SUCCESS | 0x000, 995 996 BASE_JD_EVENT_PROGRESS_REPORT = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_JOB | 0x000, 997 BASE_JD_EVENT_BAG_DONE = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_BAG | 0x000, 998 BASE_JD_EVENT_DRV_TERMINATED = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_INFO | 0x000, 999 1000 BASE_JD_EVENT_RANGE_SW_SUCCESS_END = 1001 BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_RESERVED | 0x3FF, 1002 1003 BASE_JD_EVENT_RANGE_KERNEL_ONLY_START = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_KERNEL | 0x000, 1004 BASE_JD_EVENT_REMOVED_FROM_NEXT = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_JOB | 0x000, 1005 BASE_JD_EVENT_END_RP_DONE = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_JOB | 0x001, 1006 1007 BASE_JD_EVENT_RANGE_KERNEL_ONLY_END = BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_RESERVED | 0x3FF 1008 }; 1009 1010 /** 1011 * struct base_jd_event_v2 - Event reporting structure 1012 * 1013 * @event_code: event code. 1014 * @atom_number: the atom number that has completed. 1015 * @udata: user data. 1016 * 1017 * This structure is used by the kernel driver to report information 1018 * about GPU events. They can either be HW-specific events or low-level 1019 * SW events, such as job-chain completion. 1020 * 1021 * The event code contains an event type field which can be extracted 1022 * by ANDing with BASE_JD_SW_EVENT_TYPE_MASK. 1023 */ 1024 struct base_jd_event_v2 { 1025 enum base_jd_event_code event_code; 1026 base_atom_id atom_number; 1027 struct base_jd_udata udata; 1028 }; 1029 1030 /** 1031 * struct base_dump_cpu_gpu_counters - Structure for 1032 * BASE_JD_REQ_SOFT_DUMP_CPU_GPU_COUNTERS 1033 * jobs. 1034 * 1035 * This structure is stored into the memory pointed to by the @jc field 1036 * of &struct base_jd_atom. 1037 * 1038 * It must not occupy the same CPU cache line(s) as any neighboring data. 1039 * This is to avoid cases where access to pages containing the structure 1040 * is shared between cached and un-cached memory regions, which would 1041 * cause memory corruption. 1042 */ 1043 1044 struct base_dump_cpu_gpu_counters { 1045 u64 system_time; 1046 u64 cycle_counter; 1047 u64 sec; 1048 u32 usec; 1049 u8 padding[36]; 1050 }; 1051 1052 #endif /* _BASE_JM_KERNEL_H_ */ 1053