1 /* 2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 */ 18 #ifndef __HDMI_HAL_CTRL_H__ 19 #define __HDMI_HAL_CTRL_H__ 20 21 #include "hi_type.h" 22 #include "hdmi_hal_machine.h" 23 #include "drv_hdmi_common.h" 24 25 #define HDMI_INFOFRMAE_MAX_SIZE 31 26 27 typedef enum { 28 HDMI_COLORMETRY_BT709, 29 HDMI_COLORMETRY_BT601, 30 HDMI_COLORMETRY_BT2020, 31 HDMI_COLORMETRY_BT2020_CONST, 32 HDMI_COLORMETRY_BUTT 33 } hdmi_hal_colorimetry; 34 35 typedef struct { 36 hi_bool h_pol_inver; 37 hi_bool v_pol_inver; 38 hi_bool de_inver; 39 } hdmi_sync_pol_type; 40 41 typedef struct { 42 hdmi_video_timing timing; 43 hi_u32 in_pixel_clk; /* in Khz */ 44 hi_u32 out_tmds_clk; /* in Khz */ 45 hdmi_colorspace in_color_space; 46 hdmi_colorspace out_color_space; 47 hdmi_hal_colorimetry in_colormetry; 48 hdmi_hal_colorimetry out_colormetry; 49 hdmi_deep_color in_deep_color; 50 hdmi_deep_color out_deep_color; 51 hdmi_sync_pol_type out_hv_sync_pol; 52 hdmi_quantization_range in_quantization; 53 hdmi_quantization_range out_quantization; 54 } hdmi_video_path; 55 56 typedef struct { 57 hi_bool sync_sw_enable; 58 hi_bool vsync_polarity; /* when sync_sw_enable==0, indicates hw; or, indicates sw */ 59 hi_bool hsync_polarity; /* when sync_sw_enable==0, indicates hw; or, indicates sw */ 60 hi_bool progressive; 61 hi_u32 hsync_total; 62 hi_u32 hactive_cnt; 63 hi_u32 vsync_total; 64 hi_u32 vactive_cnt; 65 } ctrl_timming_detect; 66 67 typedef struct { 68 hi_u32 out_tmds_clk; /* in khz */ 69 hdmi_colorspace in_color_space; 70 hdmi_colorspace out_color_space; 71 hdmi_hal_colorimetry in_colormetry; 72 hdmi_hal_colorimetry out_colormetry; 73 hdmi_deep_color in_deep_color; 74 hdmi_deep_color out_deep_color; 75 hdmi_sync_pol_type out_hv_sync_pol; 76 hdmi_quantization_range in_quantization; 77 hdmi_quantization_range out_quantization; 78 hi_bool csc_enable; 79 hi_bool y422_enable; 80 hi_bool y420_enable; 81 hi_bool dwsm_hori_enable; 82 hi_bool dwsm_vert_enable; 83 hdmi_video_dither dither_mode; 84 ctrl_timming_detect timing; 85 } ctrl_video_status; 86 87 typedef struct { 88 hdmi_audio_interface sound_intf; 89 hdmi_sample_rate sample_rate; 90 hdmi_audio_ch channel_num; 91 hdmi_audio_bit_depth sample_bit; 92 hi_u32 pixel_clk; /* it is used to config N value */ 93 } hdmi_audio_path; 94 95 typedef struct { 96 hi_bool enable_audio; 97 hi_bool audio_mute; 98 hdmi_audio_interface sound_intf; 99 hdmi_sample_rate sample_rate; 100 hdmi_audio_ch channel_num; 101 hdmi_audio_bit_depth sample_bit; 102 hi_u32 pixel_clk; /* it is used to config N value */ 103 hi_u32 ref_n; 104 hi_u32 reg_n; 105 hi_u32 ref_cts; 106 hi_u32 reg_cts; 107 } ctrl_audio_status; 108 109 typedef struct { 110 hi_bool hpd_on; 111 hi_bool rsen_on; 112 } hdmi_hpd_rsen; 113 114 typedef struct { 115 hi_bool enable; // extern thread cfg 116 hdmi_timer_type timer_type; // extern thread cfg 117 hi_u64 time_length; // extern thread cfg, in ms 118 hi_u64 start_time; // extern thread cfg, in ms 119 } ctrl_hdr_timer; 120 121 typedef struct { 122 hi_bool init; 123 hi_u32 mach_id; 124 hdmi_tmds_mode tmds_mode; 125 hi_bool avmute; 126 hi_bool audio_mute; 127 hi_bool video_mute; 128 hi_bool if_enable[HDMI_INFOFRAME_TYPE_BUTT - HDMI_INFOFRAME_TYPE_VENDOR]; 129 hi_bool if_data[HDMI_INFOFRAME_TYPE_BUTT - HDMI_INFOFRAME_TYPE_VENDOR][HDMI_INFOFRMAE_MAX_SIZE]; 130 hdmi_audio_path audio_path; 131 hdmi_video_path video_path; 132 hi_void *event_data; 133 hdmi_callback event_callback; 134 #ifdef HDMI_HDR_SUPPORT 135 ctrl_hdr_timer hdr_timer[HDMI_TIMER_TYPE_BUTT]; 136 #endif 137 mach_callback *hpd_callback; 138 hi_bool hpd; 139 hi_bool rsen; 140 } hdmi_ctrl_info; 141 142 typedef struct { 143 hi_bool init; 144 hdmi_tmds_mode tmds_mode; 145 hi_bool avmute; 146 hi_bool audio_mute; 147 hi_bool video_mute; 148 hi_bool if_enable[HDMI_INFOFRAME_TYPE_BUTT - HDMI_INFOFRAME_TYPE_VENDOR]; 149 hi_bool if_data[HDMI_INFOFRAME_TYPE_BUTT - HDMI_INFOFRAME_TYPE_VENDOR][HDMI_INFOFRMAE_MAX_SIZE]; 150 hdmi_audio_path audio_path; 151 hdmi_video_path video_path; 152 hdmi_hpd_rsen hpd_rsen; 153 } hdmi_ctrl_status; 154 155 hi_s32 hal_hdmi_ctrl_init(hdmi_device_id hdmi, const hdmi_hal_init *hal_init); 156 157 hi_s32 hal_hdmi_ctrl_deinit(hdmi_device_id hdmi); 158 159 hi_s32 hal_hdmi_ctrl_avmute_set(hdmi_device_id hdmi, const hdmi_avmute_cfg *avmute_cfg); 160 161 hi_s32 hal_hdmi_ctrl_avmute_get(hdmi_device_id hdmi, hi_bool *enable); 162 163 hi_s32 hal_hdmi_ctrl_audio_mute_set(hdmi_device_id hdmi, hi_bool enable); 164 165 hi_s32 hal_hdmi_ctrl_audio_path_enable_set(hdmi_device_id hdmi, hi_bool enable); 166 167 hi_s32 hal_hdmi_ctrl_audio_path_set(hdmi_device_id hdmi, const hdmi_audio_path *audio_path); 168 169 hi_s32 hal_hdmi_ctrl_audio_path_get(hdmi_device_id hdmi, ctrl_audio_status *audio_path); 170 171 hi_s32 hal_hdmi_ctrl_video_mute_set(hdmi_device_id hdmi, hi_bool enable); 172 173 hi_s32 hal_hdmi_ctrl_video_mute_get(hdmi_device_id hdmi, hi_bool *enable); 174 175 hi_s32 hal_hdmi_ctrl_video_path_set(hdmi_device_id hdmi, hdmi_video_path *video_path); 176 177 hi_void hal_hdmi_ctrl_video_path_get(hdmi_device_id hdmi, ctrl_video_status *video_stat); 178 179 hi_s32 hal_hdmi_ctrl_tmds_mode_set(hdmi_device_id hdmi, hdmi_tmds_mode tmds_mode); 180 181 hi_s32 hal_hdmi_ctrl_tmds_mode_get(hdmi_device_id hdmi, hdmi_tmds_mode *tmds_mode); 182 183 hi_s32 hal_hdmi_ctrl_infoframe_en_set(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool enable); 184 185 hi_s32 hal_hdmi_ctrl_infoframe_en_get(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool *enable); 186 187 hi_s32 hal_hdmi_ctrl_infoframe_data_set(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, 188 const hi_u8 *if_data, hi_u32 data_len); 189 190 hi_s32 hal_hdmi_ctrl_infoframe_data_get(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_u8 *if_data); 191 192 hi_s32 hal_hdmi_ctrl_hpd_rsen_get(hdmi_device_id hdmi, hdmi_hpd_rsen *hpd_rsen); 193 194 hi_s32 hal_hdmi_ctrl_hdr_timer_set(hdmi_device_id hdmi, const hdmi_timer_config *hdr_timer_cfg); 195 196 hi_void hal_hdmi_ctrl_dither_dbg_set(hdmi_device_id hdmi, hdmi_video_dither dither_mode); 197 198 hi_s32 hal_hdmi_ctrl_csc_set(hdmi_device_id hdmi, const hdmi_video_config *video_cfg); 199 200 hi_s32 hal_hdmi_ctrl_data_reset(hdmi_device_id hdmi, hi_bool debug_mode, hi_u32 delay_ms); 201 202 hi_s32 hal_hdmi_ctrl_tmds_stable_get(hdmi_device_id hdmi, hi_bool *stable); 203 204 #endif /* __HDMI_HAL_CTRL_H__ */ 205 206