Searched defs:dig_encoder_link_setup_parameters_v1_5 (Results 1 – 2 of 2) sorted by relevance
3471 struct dig_encoder_link_setup_parameters_v1_5 struct3473 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid3474 uint8_t action; // = ATOM_ENOCODER_CMD_LINK_SETUP 3475 uint8_t digmode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI3476 uint8_t lanenum; // Lane number 3477 uint8_t symclk_10khz; // Symbol Clock in 10Khz3478 uint8_t hpd_sel;3479 uint8_t digfe_sel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable, 3480 uint8_t reserved[2];
4274 struct dig_encoder_link_setup_parameters_v1_5 struct4276 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid4277 uint8_t action; // = ATOM_ENOCODER_CMD_LINK_SETUP 4278 uint8_t digmode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI4279 uint8_t lanenum; // Lane number 4280 uint8_t symclk_10khz; // Symbol Clock in 10Khz4281 uint8_t hpd_sel;4282 uint8_t digfe_sel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable, 4283 uint8_t reserved[2];