Home
last modified time | relevance | path

Searched defs:div2 (Results 1 – 25 of 69) sorted by relevance

123

/kernel/linux/linux-6.6/drivers/clk/uniphier/
Dclk-uniphier.h114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument
/kernel/linux/linux-5.10/arch/microblaze/lib/
Dumodsi3.S59 div2: label
Dudivsi3.S57 div2: label
Dmodsi3.S43 div2: label
Ddivsi3.S43 div2: label
/kernel/linux/linux-6.6/arch/microblaze/lib/
Dumodsi3.S59 div2: label
Dmodsi3.S43 div2: label
Dudivsi3.S57 div2: label
Ddivsi3.S43 div2: label
/kernel/linux/linux-5.10/drivers/clk/
Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
504 int div1, div2; in wm8850_find_pll_bits() local
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
601 u32 filter, mul, div1, div2; in vtwm_pll_round_rate() local
/kernel/linux/linux-6.6/drivers/clk/
Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
504 int div1, div2; in wm8850_find_pll_bits() local
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
601 u32 filter, mul, div1, div2; in vtwm_pll_round_rate() local
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dga102.c88 u32 div2 = 0; in ga102_sor_clock() local
/kernel/linux/linux-5.10/drivers/clk/uniphier/
Dclk-uniphier.h114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dclock-sh7757.c48 static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6, variable
Dclock-shx3.c47 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
Dclock-sh7785.c51 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4a/
Dclock-sh7757.c48 static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6, variable
Dclock-shx3.c47 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
Dclock-sh7785.c51 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c63 static int div2[] = { 1, 2, 3, 4, 6, 8, 12 }; variable
Dclock-sh7269.c91 static int div2[] = { 1, 2, 0, 4 }; variable
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c63 static int div2[] = { 1, 2, 3, 4, 6, 8, 12 }; variable
Dclock-sh7269.c91 static int div2[] = { 1, 2, 0, 4 }; variable
/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-tegra-super-cclk.c54 unsigned int div2; in cclk_super_recalc_rate() local
/kernel/linux/linux-6.6/drivers/media/tuners/
Dmt2131.c89 u32 div1, num1, div2, num2; in mt2131_set_params() local

123