1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 /* 23 * Backend-specific Power Manager definitions 24 */ 25 26 #ifndef _KBASE_PM_HWACCESS_DEFS_H_ 27 #define _KBASE_PM_HWACCESS_DEFS_H_ 28 29 #include "mali_kbase_pm_always_on.h" 30 #include "mali_kbase_pm_coarse_demand.h" 31 32 #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM) 33 #define KBASE_PM_RUNTIME 1 34 #endif 35 36 /* Forward definition - see mali_kbase.h */ 37 struct kbase_device; 38 struct kbase_jd_atom; 39 40 /** 41 * enum kbase_pm_core_type - The types of core in a GPU. 42 * 43 * @KBASE_PM_CORE_L2: The L2 cache 44 * @KBASE_PM_CORE_SHADER: Shader cores 45 * @KBASE_PM_CORE_TILER: Tiler cores 46 * @KBASE_PM_CORE_STACK: Core stacks 47 * 48 * These enumerated values are used in calls to 49 * - kbase_pm_get_present_cores() 50 * - kbase_pm_get_active_cores() 51 * - kbase_pm_get_trans_cores() 52 * - kbase_pm_get_ready_cores(). 53 * 54 * They specify which type of core should be acted on. These values are set in 55 * a manner that allows core_type_to_reg() function to be simpler and more 56 * efficient. 57 */ 58 enum kbase_pm_core_type { 59 KBASE_PM_CORE_L2 = L2_PRESENT_LO, 60 KBASE_PM_CORE_SHADER = SHADER_PRESENT_LO, 61 KBASE_PM_CORE_TILER = TILER_PRESENT_LO, 62 KBASE_PM_CORE_STACK = STACK_PRESENT_LO 63 }; 64 65 /* 66 * enum kbase_l2_core_state - The states used for the L2 cache & tiler power 67 * state machine. 68 */ 69 enum kbase_l2_core_state { 70 #define KBASEP_L2_STATE(n) KBASE_L2_ ## n, 71 #include "mali_kbase_pm_l2_states.h" 72 #undef KBASEP_L2_STATE 73 }; 74 75 #if MALI_USE_CSF 76 /* 77 * enum kbase_mcu_state - The states used for the MCU state machine. 78 */ 79 enum kbase_mcu_state { 80 #define KBASEP_MCU_STATE(n) KBASE_MCU_ ## n, 81 #include "mali_kbase_pm_mcu_states.h" 82 #undef KBASEP_MCU_STATE 83 }; 84 #endif 85 86 /* 87 * enum kbase_shader_core_state - The states used for the shaders' state machine. 88 */ 89 enum kbase_shader_core_state { 90 #define KBASEP_SHADER_STATE(n) KBASE_SHADERS_ ## n, 91 #include "mali_kbase_pm_shader_states.h" 92 #undef KBASEP_SHADER_STATE 93 }; 94 95 /** 96 * struct kbasep_pm_metrics - Metrics data collected for use by the power 97 * management framework. 98 * 99 * @time_busy: the amount of time the GPU was busy executing jobs since the 100 * @time_period_start timestamp, in units of 256ns. This also includes 101 * time_in_protm, the time spent in protected mode, since it's assumed 102 * the GPU was busy 100% during this period. 103 * @time_idle: the amount of time the GPU was not executing jobs since the 104 * time_period_start timestamp, measured in units of 256ns. 105 * @time_in_protm: The amount of time the GPU has spent in protected mode since 106 * the time_period_start timestamp, measured in units of 256ns. 107 * @busy_cl: the amount of time the GPU was busy executing CL jobs. Note that 108 * if two CL jobs were active for 256ns, this value would be updated 109 * with 2 (2x256ns). 110 * @busy_gl: the amount of time the GPU was busy executing GL jobs. Note that 111 * if two GL jobs were active for 256ns, this value would be updated 112 * with 2 (2x256ns). 113 */ 114 struct kbasep_pm_metrics { 115 u32 time_busy; 116 u32 time_idle; 117 #if MALI_USE_CSF 118 u32 time_in_protm; 119 #else 120 u32 busy_cl[2]; 121 u32 busy_gl; 122 #endif 123 }; 124 125 /** 126 * struct kbasep_pm_metrics_state - State required to collect the metrics in 127 * struct kbasep_pm_metrics 128 * @time_period_start: time at which busy/idle measurements started 129 * @ipa_control_client: Handle returned on registering DVFS as a 130 * kbase_ipa_control client 131 * @skip_gpu_active_sanity_check: Decide whether to skip GPU_ACTIVE sanity 132 * check in DVFS utilisation calculation 133 * @gpu_active: true when the GPU is executing jobs. false when 134 * not. Updated when the job scheduler informs us a job in submitted 135 * or removed from a GPU slot. 136 * @active_cl_ctx: number of CL jobs active on the GPU. Array is per-device. 137 * @active_gl_ctx: number of GL jobs active on the GPU. Array is per-slot. 138 * @lock: spinlock protecting the kbasep_pm_metrics_data structure 139 * @platform_data: pointer to data controlled by platform specific code 140 * @kbdev: pointer to kbase device for which metrics are collected 141 * @values: The current values of the power management metrics. The 142 * kbase_pm_get_dvfs_metrics() function is used to compare these 143 * current values with the saved values from a previous invocation. 144 * @initialized: tracks whether metrics_state has been initialized or not. 145 * @timer: timer to regularly make DVFS decisions based on the power 146 * management metrics. 147 * @timer_active: boolean indicating @timer is running 148 * @dvfs_last: values of the PM metrics from the last DVFS tick 149 * @dvfs_diff: different between the current and previous PM metrics. 150 */ 151 struct kbasep_pm_metrics_state { 152 ktime_t time_period_start; 153 #if MALI_USE_CSF 154 void *ipa_control_client; 155 bool skip_gpu_active_sanity_check; 156 #else 157 bool gpu_active; 158 u32 active_cl_ctx[2]; 159 u32 active_gl_ctx[3]; 160 #endif 161 spinlock_t lock; 162 163 void *platform_data; 164 struct kbase_device *kbdev; 165 166 struct kbasep_pm_metrics values; 167 168 #ifdef CONFIG_MALI_BIFROST_DVFS 169 bool initialized; 170 struct hrtimer timer; 171 bool timer_active; 172 struct kbasep_pm_metrics dvfs_last; 173 struct kbasep_pm_metrics dvfs_diff; 174 #endif 175 }; 176 177 /** 178 * struct kbasep_pm_tick_timer_state - State for the shader hysteresis timer 179 * @wq: Work queue to wait for the timer to stopped 180 * @work: Work item which cancels the timer 181 * @timer: Timer for powering off the shader cores 182 * @configured_interval: Period of GPU poweroff timer 183 * @default_ticks: User-configured number of ticks to wait after the shader 184 * power down request is received before turning off the cores 185 * @configured_ticks: Power-policy configured number of ticks to wait after the 186 * shader power down request is received before turning off 187 * the cores. For simple power policies, this is equivalent 188 * to @default_ticks. 189 * @remaining_ticks: Number of remaining timer ticks until shaders are powered off 190 * @cancel_queued: True if the cancellation work item has been queued. This is 191 * required to ensure that it is not queued twice, e.g. after 192 * a reset, which could cause the timer to be incorrectly 193 * cancelled later by a delayed workitem. 194 * @needed: Whether the timer should restart itself 195 */ 196 struct kbasep_pm_tick_timer_state { 197 struct workqueue_struct *wq; 198 struct work_struct work; 199 struct hrtimer timer; 200 201 ktime_t configured_interval; 202 unsigned int default_ticks; 203 unsigned int configured_ticks; 204 unsigned int remaining_ticks; 205 206 bool cancel_queued; 207 bool needed; 208 }; 209 210 union kbase_pm_policy_data { 211 struct kbasep_pm_policy_always_on always_on; 212 struct kbasep_pm_policy_coarse_demand coarse_demand; 213 }; 214 215 /** 216 * struct kbase_pm_backend_data - Data stored per device for power management. 217 * 218 * @pm_current_policy: The policy that is currently actively controlling the 219 * power state. 220 * @pm_policy_data: Private data for current PM policy. This is automatically 221 * zeroed when a policy change occurs. 222 * @reset_done: Flag when a reset is complete 223 * @reset_done_wait: Wait queue to wait for changes to @reset_done 224 * @gpu_cycle_counter_requests: The reference count of active gpu cycle counter 225 * users 226 * @gpu_cycle_counter_requests_lock: Lock to protect @gpu_cycle_counter_requests 227 * @gpu_in_desired_state_wait: Wait queue set when the GPU is in the desired 228 * state according to the L2 and shader power state 229 * machines 230 * @gpu_powered: Set to true when the GPU is powered and register 231 * accesses are possible, false otherwise. Access to this 232 * variable should be protected by: both the hwaccess_lock 233 * spinlock and the pm.lock mutex for writes; or at least 234 * one of either lock for reads. 235 * @gpu_ready: Indicates whether the GPU is in a state in which it is 236 * safe to perform PM changes. When false, the PM state 237 * machine needs to wait before making changes to the GPU 238 * power policy, DevFreq or core_mask, so as to avoid these 239 * changing while implicit GPU resets are ongoing. 240 * @pm_shaders_core_mask: Shader PM state synchronised shaders core mask. It 241 * holds the cores enabled in a hardware counters dump, 242 * and may differ from @shaders_avail when under different 243 * states and transitions. 244 * @cg1_disabled: Set if the policy wants to keep the second core group 245 * powered off 246 * @driver_ready_for_irqs: Debug state indicating whether sufficient 247 * initialization of the driver has occurred to handle 248 * IRQs 249 * @metrics: Structure to hold metrics for the GPU 250 * @shader_tick_timer: Structure to hold the shader poweroff tick timer state 251 * @poweroff_wait_in_progress: true if a wait for GPU power off is in progress. 252 * hwaccess_lock must be held when accessing 253 * @invoke_poweroff_wait_wq_when_l2_off: flag indicating that the L2 power state 254 * machine should invoke the poweroff 255 * worker after the L2 has turned off. 256 * @poweron_required: true if a GPU power on is required. Should only be set 257 * when poweroff_wait_in_progress is true, and therefore the 258 * GPU can not immediately be powered on. pm.lock must be 259 * held when accessing 260 * @gpu_poweroff_wait_wq: workqueue for waiting for GPU to power off 261 * @gpu_poweroff_wait_work: work item for use with @gpu_poweroff_wait_wq 262 * @poweroff_wait: waitqueue for waiting for @gpu_poweroff_wait_work to complete 263 * @callback_power_on: Callback when the GPU needs to be turned on. See 264 * &struct kbase_pm_callback_conf 265 * @callback_power_off: Callback when the GPU may be turned off. See 266 * &struct kbase_pm_callback_conf 267 * @callback_power_suspend: Callback when a suspend occurs and the GPU needs to 268 * be turned off. See &struct kbase_pm_callback_conf 269 * @callback_power_resume: Callback when a resume occurs and the GPU needs to 270 * be turned on. See &struct kbase_pm_callback_conf 271 * @callback_power_runtime_on: Callback when the GPU needs to be turned on. See 272 * &struct kbase_pm_callback_conf 273 * @callback_power_runtime_off: Callback when the GPU may be turned off. See 274 * &struct kbase_pm_callback_conf 275 * @callback_power_runtime_idle: Optional callback invoked by runtime PM core 276 * when the GPU may be idle. See 277 * &struct kbase_pm_callback_conf 278 * @callback_soft_reset: Optional callback to software reset the GPU. See 279 * &struct kbase_pm_callback_conf 280 * @callback_power_runtime_gpu_idle: Callback invoked by Kbase when GPU has 281 * become idle. 282 * See &struct kbase_pm_callback_conf. 283 * @callback_power_runtime_gpu_active: Callback when GPU has become active and 284 * @callback_power_runtime_gpu_idle was 285 * called previously. 286 * See &struct kbase_pm_callback_conf. 287 * @ca_cores_enabled: Cores that are currently available 288 * @mcu_state: The current state of the micro-control unit, only applicable 289 * to GPUs that have such a component 290 * @l2_state: The current state of the L2 cache state machine. See 291 * &enum kbase_l2_core_state 292 * @l2_desired: True if the L2 cache should be powered on by the L2 cache state 293 * machine 294 * @l2_always_on: If true, disable powering down of l2 cache. 295 * @shaders_state: The current state of the shader state machine. 296 * @shaders_avail: This is updated by the state machine when it is in a state 297 * where it can write to the SHADER_PWRON or PWROFF registers 298 * to have the same set of available cores as specified by 299 * @shaders_desired_mask. So would precisely indicate the cores 300 * that are currently available. This is internal to shader 301 * state machine of JM GPUs and should *not* be modified 302 * elsewhere. 303 * @shaders_desired_mask: This is updated by the state machine when it is in 304 * a state where it can handle changes to the core 305 * availability (either by DVFS or sysfs). This is 306 * internal to the shader state machine and should 307 * *not* be modified elsewhere. 308 * @shaders_desired: True if the PM active count or power policy requires the 309 * shader cores to be on. This is used as an input to the 310 * shader power state machine. The current state of the 311 * cores may be different, but there should be transitions in 312 * progress that will eventually achieve this state (assuming 313 * that the policy doesn't change its mind in the mean time). 314 * @mcu_desired: True if the micro-control unit should be powered on 315 * @policy_change_clamp_state_to_off: Signaling the backend is in PM policy 316 * change transition, needs the mcu/L2 to be brought back to the 317 * off state and remain in that state until the flag is cleared. 318 * @csf_pm_sched_flags: CSF Dynamic PM control flags in accordance to the 319 * current active PM policy. This field is updated whenever a 320 * new policy is activated. 321 * @policy_change_lock: Used to serialize the policy change calls. In CSF case, 322 * the change of policy may involve the scheduler to 323 * suspend running CSGs and then reconfigure the MCU. 324 * @core_idle_wq: Workqueue for executing the @core_idle_work. 325 * @core_idle_work: Work item used to wait for undesired cores to become inactive. 326 * The work item is enqueued when Host controls the power for 327 * shader cores and down scaling of cores is performed. 328 * @gpu_sleep_supported: Flag to indicate that if GPU sleep feature can be 329 * supported by the kernel driver or not. If this 330 * flag is not set, then HW state is directly saved 331 * when GPU idle notification is received. 332 * @gpu_sleep_mode_active: Flag to indicate that the GPU needs to be in sleep 333 * mode. It is set when the GPU idle notification is 334 * received and is cleared when HW state has been 335 * saved in the runtime suspend callback function or 336 * when the GPU power down is aborted if GPU became 337 * active whilst it was in sleep mode. The flag is 338 * guarded with hwaccess_lock spinlock. 339 * @exit_gpu_sleep_mode: Flag to indicate the GPU can now exit the sleep 340 * mode due to the submission of work from Userspace. 341 * The flag is guarded with hwaccess_lock spinlock. 342 * The @gpu_sleep_mode_active flag is not immediately 343 * reset when this flag is set, this is to ensure that 344 * MCU doesn't gets disabled undesirably without the 345 * suspend of CSGs. That could happen when 346 * scheduler_pm_active() and scheduler_pm_idle() gets 347 * called before the Scheduler gets reactivated. 348 * @gpu_idled: Flag to ensure that the gpu_idle & gpu_active callbacks are 349 * always called in pair. The flag is guarded with pm.lock mutex. 350 * @gpu_wakeup_override: Flag to force the power up of L2 cache & reactivation 351 * of MCU. This is set during the runtime suspend 352 * callback function, when GPU needs to exit the sleep 353 * mode for the saving the HW state before power down. 354 * @db_mirror_interrupt_enabled: Flag tracking if the Doorbell mirror interrupt 355 * is enabled or not. 356 * @in_reset: True if a GPU is resetting and normal power manager operation is 357 * suspended 358 * @partial_shaderoff: True if we want to partial power off shader cores, 359 * it indicates a partial shader core off case, 360 * do some special operation for such case like flush 361 * L2 cache because of GPU2017-861 362 * @protected_entry_transition_override : True if GPU reset is being used 363 * before entering the protected mode and so 364 * the reset handling behaviour is being 365 * overridden. 366 * @protected_transition_override : True if a protected mode transition is in 367 * progress and is overriding power manager 368 * behaviour. 369 * @protected_l2_override : Non-zero if the L2 cache is required during a 370 * protected mode transition. Has no effect if not 371 * transitioning. 372 * @hwcnt_desired: True if we want GPU hardware counters to be enabled. 373 * @hwcnt_disabled: True if GPU hardware counters are not enabled. 374 * @hwcnt_disable_work: Work item to disable GPU hardware counters, used if 375 * atomic disable is not possible. 376 * @gpu_clock_suspend_freq: 'opp-mali-errata-1485982' clock in opp table 377 * for safe L2 power cycle. 378 * If no opp-mali-errata-1485982 specified, 379 * the slowest clock will be taken. 380 * @gpu_clock_slow_down_wa: If true, slow down GPU clock during L2 power cycle. 381 * @gpu_clock_slow_down_desired: True if we want lower GPU clock 382 * for safe L2 power cycle. False if want GPU clock 383 * to back to normalized one. This is updated only 384 * in L2 state machine, kbase_pm_l2_update_state. 385 * @gpu_clock_slowed_down: During L2 power cycle, 386 * True if gpu clock is set at lower frequency 387 * for safe L2 power down, False if gpu clock gets 388 * restored to previous speed. This is updated only in 389 * work function, kbase_pm_gpu_clock_control_worker. 390 * @gpu_clock_control_work: work item to set GPU clock during L2 power cycle 391 * using gpu_clock_control 392 * 393 * This structure contains data for the power management framework. There is one 394 * instance of this structure per device in the system. 395 * 396 * Note: 397 * During an IRQ, @pm_current_policy can be NULL when the policy is being 398 * changed with kbase_pm_set_policy(). The change is protected under 399 * kbase_device.pm.pcower_change_lock. Direct access to this from IRQ context 400 * must therefore check for NULL. If NULL, then kbase_pm_set_policy() will 401 * re-issue the policy functions that would have been done under IRQ. 402 */ 403 struct kbase_pm_backend_data { 404 const struct kbase_pm_policy *pm_current_policy; 405 union kbase_pm_policy_data pm_policy_data; 406 bool reset_done; 407 wait_queue_head_t reset_done_wait; 408 int gpu_cycle_counter_requests; 409 spinlock_t gpu_cycle_counter_requests_lock; 410 411 wait_queue_head_t gpu_in_desired_state_wait; 412 413 bool gpu_powered; 414 bool gpu_ready; 415 416 u64 pm_shaders_core_mask; 417 418 bool cg1_disabled; 419 420 #ifdef CONFIG_MALI_BIFROST_DEBUG 421 bool driver_ready_for_irqs; 422 #endif /* CONFIG_MALI_BIFROST_DEBUG */ 423 424 struct kbasep_pm_metrics_state metrics; 425 426 struct kbasep_pm_tick_timer_state shader_tick_timer; 427 428 bool poweroff_wait_in_progress; 429 bool invoke_poweroff_wait_wq_when_l2_off; 430 bool poweron_required; 431 432 struct workqueue_struct *gpu_poweroff_wait_wq; 433 struct work_struct gpu_poweroff_wait_work; 434 435 wait_queue_head_t poweroff_wait; 436 437 int (*callback_power_on)(struct kbase_device *kbdev); 438 void (*callback_power_off)(struct kbase_device *kbdev); 439 void (*callback_power_suspend)(struct kbase_device *kbdev); 440 void (*callback_power_resume)(struct kbase_device *kbdev); 441 int (*callback_power_runtime_on)(struct kbase_device *kbdev); 442 void (*callback_power_runtime_off)(struct kbase_device *kbdev); 443 int (*callback_power_runtime_idle)(struct kbase_device *kbdev); 444 int (*callback_soft_reset)(struct kbase_device *kbdev); 445 void (*callback_power_runtime_gpu_idle)(struct kbase_device *kbdev); 446 void (*callback_power_runtime_gpu_active)(struct kbase_device *kbdev); 447 448 u64 ca_cores_enabled; 449 450 #if MALI_USE_CSF 451 enum kbase_mcu_state mcu_state; 452 #endif 453 enum kbase_l2_core_state l2_state; 454 enum kbase_shader_core_state shaders_state; 455 u64 shaders_avail; 456 u64 shaders_desired_mask; 457 #if MALI_USE_CSF 458 bool mcu_desired; 459 bool policy_change_clamp_state_to_off; 460 unsigned int csf_pm_sched_flags; 461 struct mutex policy_change_lock; 462 struct workqueue_struct *core_idle_wq; 463 struct work_struct core_idle_work; 464 465 #ifdef KBASE_PM_RUNTIME 466 bool gpu_sleep_supported; 467 bool gpu_sleep_mode_active; 468 bool exit_gpu_sleep_mode; 469 bool gpu_idled; 470 bool gpu_wakeup_override; 471 bool db_mirror_interrupt_enabled; 472 #endif 473 #endif 474 bool l2_desired; 475 bool l2_always_on; 476 bool shaders_desired; 477 478 bool in_reset; 479 480 #if !MALI_USE_CSF 481 bool partial_shaderoff; 482 483 bool protected_entry_transition_override; 484 bool protected_transition_override; 485 int protected_l2_override; 486 #endif 487 488 bool hwcnt_desired; 489 bool hwcnt_disabled; 490 struct work_struct hwcnt_disable_work; 491 492 u64 gpu_clock_suspend_freq; 493 bool gpu_clock_slow_down_wa; 494 bool gpu_clock_slow_down_desired; 495 bool gpu_clock_slowed_down; 496 struct work_struct gpu_clock_control_work; 497 }; 498 499 #if MALI_USE_CSF 500 /* CSF PM flag, signaling that the MCU CORE should be kept on */ 501 #define CSF_DYNAMIC_PM_CORE_KEEP_ON (1 << 0) 502 /* CSF PM flag, signaling no scheduler suspension on idle groups */ 503 #define CSF_DYNAMIC_PM_SCHED_IGNORE_IDLE (1 << 1) 504 /* CSF PM flag, signaling no scheduler suspension on no runnable groups */ 505 #define CSF_DYNAMIC_PM_SCHED_NO_SUSPEND (1 << 2) 506 507 /* The following flags corresponds to existing defined PM policies */ 508 #define ALWAYS_ON_PM_SCHED_FLAGS (CSF_DYNAMIC_PM_CORE_KEEP_ON | \ 509 CSF_DYNAMIC_PM_SCHED_IGNORE_IDLE | \ 510 CSF_DYNAMIC_PM_SCHED_NO_SUSPEND) 511 #define COARSE_ON_DEMAND_PM_SCHED_FLAGS (0) 512 #if !MALI_CUSTOMER_RELEASE 513 #define ALWAYS_ON_DEMAND_PM_SCHED_FLAGS (CSF_DYNAMIC_PM_SCHED_IGNORE_IDLE) 514 #endif 515 #endif 516 517 /* List of policy IDs */ 518 enum kbase_pm_policy_id { 519 KBASE_PM_POLICY_ID_COARSE_DEMAND, 520 #if !MALI_CUSTOMER_RELEASE 521 KBASE_PM_POLICY_ID_ALWAYS_ON_DEMAND, 522 #endif 523 KBASE_PM_POLICY_ID_ALWAYS_ON 524 }; 525 526 /** 527 * enum kbase_pm_policy_event - PM Policy event ID 528 */ 529 enum kbase_pm_policy_event { 530 /** 531 * @KBASE_PM_POLICY_EVENT_IDLE: Indicates that the GPU power state 532 * model has determined that the GPU has gone idle. 533 */ 534 KBASE_PM_POLICY_EVENT_IDLE, 535 /** 536 * @KBASE_PM_POLICY_EVENT_POWER_ON: Indicates that the GPU state model 537 * is preparing to power on the GPU. 538 */ 539 KBASE_PM_POLICY_EVENT_POWER_ON, 540 /** 541 * @KBASE_PM_POLICY_EVENT_TIMER_HIT: Indicates that the GPU became 542 * active while the Shader Tick Timer was holding the GPU in a powered 543 * on state. 544 */ 545 KBASE_PM_POLICY_EVENT_TIMER_HIT, 546 /** 547 * @KBASE_PM_POLICY_EVENT_TIMER_MISS: Indicates that the GPU did not 548 * become active before the Shader Tick Timer timeout occurred. 549 */ 550 KBASE_PM_POLICY_EVENT_TIMER_MISS, 551 }; 552 553 /** 554 * struct kbase_pm_policy - Power policy structure. 555 * 556 * @name: The name of this policy 557 * @init: Function called when the policy is selected 558 * @term: Function called when the policy is unselected 559 * @shaders_needed: Function called to find out if shader cores are needed 560 * @get_core_active: Function called to get the current overall GPU power 561 * state 562 * @handle_event: Function called when a PM policy event occurs. Should be 563 * set to NULL if the power policy doesn't require any 564 * event notifications. 565 * @id: Field indicating an ID for this policy. This is not 566 * necessarily the same as its index in the list returned 567 * by kbase_pm_list_policies(). 568 * It is used purely for debugging. 569 * @pm_sched_flags: Policy associated with CSF PM scheduling operational flags. 570 * Pre-defined required flags exist for each of the 571 * ARM released policies, such as 'always_on', 'coarse_demand' 572 * and etc. 573 * Each power policy exposes a (static) instance of this structure which 574 * contains function pointers to the policy's methods. 575 */ 576 struct kbase_pm_policy { 577 char *name; 578 579 /* 580 * Function called when the policy is selected 581 * 582 * This should initialize the kbdev->pm.pm_policy_data structure. It 583 * should not attempt to make any changes to hardware state. 584 * 585 * It is undefined what state the cores are in when the function is 586 * called. 587 * 588 * @kbdev: The kbase device structure for the device (must be a 589 * valid pointer) 590 */ 591 void (*init)(struct kbase_device *kbdev); 592 593 /* 594 * Function called when the policy is unselected. 595 * 596 * @kbdev: The kbase device structure for the device (must be a 597 * valid pointer) 598 */ 599 void (*term)(struct kbase_device *kbdev); 600 601 /* 602 * Function called to find out if shader cores are needed 603 * 604 * This needs to at least satisfy kbdev->pm.backend.shaders_desired, 605 * and so must never return false when shaders_desired is true. 606 * 607 * @kbdev: The kbase device structure for the device (must be a 608 * valid pointer) 609 * 610 * Return: true if shader cores are needed, false otherwise 611 */ 612 bool (*shaders_needed)(struct kbase_device *kbdev); 613 614 /* 615 * Function called to get the current overall GPU power state 616 * 617 * This function must meet or exceed the requirements for power 618 * indicated by kbase_pm_is_active(). 619 * 620 * @kbdev: The kbase device structure for the device (must be a 621 * valid pointer) 622 * 623 * Return: true if the GPU should be powered, false otherwise 624 */ 625 bool (*get_core_active)(struct kbase_device *kbdev); 626 627 /* 628 * Function called when a power event occurs 629 * 630 * @kbdev: The kbase device structure for the device (must be a 631 * valid pointer) 632 * @event: The id of the power event that has occurred 633 */ 634 void (*handle_event)(struct kbase_device *kbdev, 635 enum kbase_pm_policy_event event); 636 637 enum kbase_pm_policy_id id; 638 639 #if MALI_USE_CSF 640 /* Policy associated with CSF PM scheduling operational flags. 641 * There are pre-defined required flags exist for each of the 642 * ARM released policies, such as 'always_on', 'coarse_demand' 643 * and etc. 644 */ 645 unsigned int pm_sched_flags; 646 #endif 647 }; 648 649 #endif /* _KBASE_PM_HWACCESS_DEFS_H_ */ 650