1 /**
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 *
15 * Description: Provides efuse register operation api \n
16 *
17 * History: \n
18 * 2023-3-4， Create file. \n
19 */
20 #ifndef HAL_EFUSE_V151_REGS_OP_H
21 #define HAL_EFUSE_V151_REGS_OP_H
22
23 #include <stdint.h>
24 #include "hal_efuse_v151_reg_def.h"
25
26 #define EFUSE_REGION_INDEX0 0
27 #define EFUSE_REGION_INDEX1 1
28 #define EFUSE_REGION_INDEX2 2
29
30 #ifdef __cplusplus
31 #if __cplusplus
32 extern "C" {
33 #endif /* __cplusplus */
34 #endif /* __cplusplus */
35
36 /**
37 * @defgroup drivers_hal_efuse_regs_op Efuse Regs Operation
38 * @ingroup drivers_hal_efuse
39 * @{
40 */
41
42 extern efuse_regs_t *g_efuse_regs[CONFIG_EFUSE_REGION_NUM];
43 extern efuse_boot_done_regs_t *g_efuse_boot_done_regs;
44 #if defined(CONFIG_EFUSE_SWITCH_EN)
45 extern efuse_switch_en_regs_t *g_efuse_switch_en_regs;
46 #endif
47
48 /**
49 * @brief Init the efuse which will set the base address of registers.
50 * @param i efuse region
51 * @return 0 indicates the base address of registers has been configured success, -1 indicates failure.
52 */
53 int32_t hal_efuse_regs_init(int32_t i);
54
55 /**
56 * @brief Deinit the hal_efuse which will clear the base address of registers has been set
57 * by @ref hal_efuse_regs_init.
58 */
59 void hal_efuse_regs_deinit(void);
60
61
hal_efuse_sts_get(uint8_t region)62 static inline uint32_t hal_efuse_sts_get(uint8_t region)
63 {
64 efuse_sts_t efuse_sts;
65 efuse_sts.d32 = g_efuse_boot_done_regs->efuse_sts_data.d32;
66 if (region == 0) { return efuse_sts.b.efuse_boot0_done; }
67 #if CONFIG_EFUSE_REGION_NUM > EFUSE_REGION_INDEX1
68 if (region == EFUSE_REGION_INDEX1) { return efuse_sts.b.efuse_boot1_done; }
69 #endif
70 #if CONFIG_EFUSE_REGION_NUM > EFUSE_REGION_INDEX2
71 if (region == EFUSE_REGION_INDEX2) { return efuse_sts.b.efuse_boot2_done; }
72 #endif
73 return 0;
74 }
75
hal_efuse_ctl_set(uint8_t region,uint32_t val)76 static inline void hal_efuse_ctl_set(uint8_t region, uint32_t val)
77 {
78 efuse_ctl_t efuse_ctl;
79 efuse_ctl.d32 = g_efuse_regs[region]->efuse_ctl_data.d32;
80 efuse_ctl.b.efuse_wr_rd = val;
81 g_efuse_regs[region]->efuse_ctl_data.d32 = efuse_ctl.d32;
82 }
83
hal_efuse_clock_period_set(uint8_t region,uint32_t val)84 static inline void hal_efuse_clock_period_set(uint8_t region, uint32_t val)
85 {
86 clock_period_t clock_period;
87 clock_period.d32 = g_efuse_regs[region]->efuse_clk_period_data.d32;
88 clock_period.b.clock_period = val;
89 g_efuse_regs[region]->efuse_clk_period_data.d32 = clock_period.d32;
90 }
91
hal_efuse_avdd_ctl_set(uint8_t region,uint32_t val)92 static inline void hal_efuse_avdd_ctl_set(uint8_t region, uint32_t val)
93 {
94 efuse_avdd_ctl_t efuse_avdd_ctl;
95 efuse_avdd_ctl.d32 = g_efuse_regs[region]->efuse_avdd_ctl_data.d32;
96 efuse_avdd_ctl.b.efuse_avdd_sw = val;
97 g_efuse_regs[region]->efuse_avdd_ctl_data.d32 = efuse_avdd_ctl.d32;
98 }
99
100 #if defined(CONFIG_EFUSE_SWITCH_EN)
hal_efuse_switch_en_set(uint32_t val)101 static inline void hal_efuse_switch_en_set(uint32_t val)
102 {
103 efuse_switch_en_ctl_t efuse_switch_en;
104 efuse_switch_en.d32 = g_efuse_switch_en_regs->efuse_switch_en.d32;
105 efuse_switch_en.b.efuse_switch_enable = val;
106 g_efuse_switch_en_regs->efuse_switch_en.d32 = efuse_switch_en.d32;
107 }
108 #endif
109
110 /**
111 * @}
112 */
113
114 #ifdef __cplusplus
115 #if __cplusplus
116 }
117 #endif /* __cplusplus */
118 #endif /* __cplusplus */
119
120 #endif
121