1 /**
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 *
15 * Description: Provides V151 PWM register operation api \n
16 * Author: HiSilicon (Shanghai) Technologies Co., Ltd. \n
17 * History: \n
18 * 2022-12-9， Create file. \n
19 */
20
21 #ifndef HAL_PWM_V151_REGS_OP_H
22 #define HAL_PWM_V151_REGS_OP_H
23
24 #include <stdint.h>
25 #include "errcode.h"
26 #include "hal_pwm_v151_regs_def.h"
27 #include "pwm_porting.h"
28
29 #ifdef __cplusplus
30 #if __cplusplus
31 extern "C" {
32 #endif /* __cplusplus */
33 #endif /* __cplusplus */
34
35 /**
36 * @defgroup drivers_hal_pwm_v151_regs_op PWM V151 Regs Operation
37 * @ingroup drivers_hal_pwm
38 * @{
39 */
40
41 extern uintptr_t g_pwm_regs;
42
43 /**
44 * @brief Set the value of @ref pwm_sel_data_t.pwm_sel_i.
45 * @param [in] group The value of @ref pwm_v151_regs_t.pwm_v151_sel.
46 * @param [in] val The value of @ref pwm_sel_data_t.pwm_sel_i.
47 */
hal_pwm_sel_set_pwm_sel_i(pwm_v151_group_t group,uint16_t val)48 static inline void hal_pwm_sel_set_pwm_sel_i(pwm_v151_group_t group, uint16_t val)
49 {
50 pwm_sel_data_t sel;
51 sel.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_sel;
52 sel.b.pwm_sel_i = val;
53 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_sel = sel.d32;
54 }
55
56 /**
57 * @brief Get the value of @ref pwm_sel_data_t.pwm_sel_i.
58 * @param [in] group The value of @ref pwm_v151_regs_t.pwm_v151_sel.
59 * @return The value of @ref pwm_sel_data_t.pwm_sel_i.
60 */
hal_pwm_sel_get_pwm_sel_i(pwm_v151_group_t group)61 static inline uint16_t hal_pwm_sel_get_pwm_sel_i(pwm_v151_group_t group)
62 {
63 pwm_sel_data_t sel;
64 sel.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_sel;
65 return sel.b.pwm_sel_i;
66 }
67
68 /**
69 * @brief Set the value of @ref pwm_startclrcnt_en_data_t.pwm_startclrcnt_en_i.
70 * @param [in] group The value of @ref pwm_v151_regs_t.pwm_v151_sel.
71 * @param [in] val The value of @ref pwm_startclrcnt_en_data_t.pwm_startclrcnt_en_i.
72 */
hal_pwm_startclrcnt_en_set_pwm_startclrcnt_en_i(pwm_v151_group_t group,uint32_t val)73 static inline void hal_pwm_startclrcnt_en_set_pwm_startclrcnt_en_i(pwm_v151_group_t group, uint32_t val)
74 {
75 pwm_startclrcnt_en_data_t startclrcnt_en;
76 startclrcnt_en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_startclrcnt_en;
77 startclrcnt_en.b.pwm_startclrcnt_en_i = val;
78 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_startclrcnt_en = startclrcnt_en.d32;
79 }
80
81 /**
82 * @brief Get the value of @ref pwm_startclrcnt_en_data_t.pwm_startclrcnt_en_i.
83 * @param [in] group The value of @ref pwm_v151_regs_t.pwm_v151_sel.
84 * @return The value of @ref pwm_startclrcnt_en_data_t.pwm_startclrcnt_en_i.
85 */
hal_pwm_startclrcnt_en_get_pwm_startclrcnt_en_i(pwm_v151_group_t group)86 static inline uint32_t hal_pwm_startclrcnt_en_get_pwm_startclrcnt_en_i(pwm_v151_group_t group)
87 {
88 pwm_startclrcnt_en_data_t startclrcnt_en;
89 startclrcnt_en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_startclrcnt_en;
90 return startclrcnt_en.b.pwm_startclrcnt_en_i;
91 }
92
93 /**
94 * @brief Set the value of @ref pwm_start_data_t.pwm_start_i.
95 * @param [in] group The value of @ref pwm_v151_regs_t.pwm_v151_sel.
96 * @param [in] val The value of @ref pwm_start_data_t.pwm_start_i.
97 */
hal_pwm_start_set_pwm_start_i(pwm_v151_group_t group,uint32_t val)98 static inline void hal_pwm_start_set_pwm_start_i(pwm_v151_group_t group, uint32_t val)
99 {
100 pwm_start_data_t start;
101 start.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_start;
102 start.b.pwm_start_i = val;
103 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_v151_sel[group].pwm_start = start.d32;
104 }
105
106 /**
107 * @brief Set the value of @ref pwm_en_data_t.pwm_en_j.
108 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
109 * @param [in] val The value of @ref pwm_en_data_t.pwm_en_j.
110 */
hal_pwm_en_set_pwm_en_j(pwm_channel_t channel,uint32_t val)111 static inline void hal_pwm_en_set_pwm_en_j(pwm_channel_t channel, uint32_t val)
112 {
113 pwm_en_data_t en;
114 en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_en;
115 en.b.pwm_en_j = val;
116 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_en = en.d32;
117 }
118
119 /**
120 * @brief Get the value of @ref pwm_en_data_t.pwm_en_j.
121 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
122 * @return The value of @ref pwm_en_data_t.pwm_en_j.
123 */
hal_pwm_en_get_pwm_en_j(pwm_channel_t channel)124 static inline uint32_t hal_pwm_en_get_pwm_en_j(pwm_channel_t channel)
125 {
126 pwm_en_data_t en;
127 en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_en;
128 return en.b.pwm_en_j;
129 }
130
131 /**
132 * @brief Set the value of @ref pwm_portity_data_t.pwm_portity_j.
133 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
134 * @param [in] val The value of @ref pwm_portity_data_t.pwm_portity_j.
135 */
hal_pwm_portity_set_pwm_portity_j(pwm_channel_t channel,uint32_t val)136 static inline void hal_pwm_portity_set_pwm_portity_j(pwm_channel_t channel, uint32_t val)
137 {
138 pwm_portity_data_t portity;
139 portity.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_portity;
140 portity.b.pwm_portity_j = val;
141 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_portity = portity.d32;
142 }
143
144 /**
145 * @brief Get the value of @ref pwm_portity_data_t.pwm_portity_j.
146 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
147 * @return The value of @ref pwm_portity_data_t.pwm_portity_j.
148 */
hal_pwm_portity_get_pwm_portity_j(pwm_channel_t channel)149 static inline uint32_t hal_pwm_portity_get_pwm_portity_j(pwm_channel_t channel)
150 {
151 pwm_portity_data_t portity;
152 portity.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_portity;
153 return portity.b.pwm_portity_j;
154 }
155
156 /**
157 * @brief Set the value of @ref pwm_oen_cfg_data_t.pwm_oen_cfg_j.
158 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
159 * @param [in] val The value of @ref pwm_oen_cfg_data_t.pwm_oen_cfg_j.
160 */
hal_pwm_oen_cfg_set_pwm_oen_cfg_j(pwm_channel_t channel,uint32_t val)161 static inline void hal_pwm_oen_cfg_set_pwm_oen_cfg_j(pwm_channel_t channel, uint32_t val)
162 {
163 pwm_oen_cfg_data_t oen_cfg;
164 oen_cfg.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_oen_cfg;
165 oen_cfg.b.pwm_oen_cfg_j = val;
166 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_oen_cfg = oen_cfg.d32;
167 }
168
169 /**
170 * @brief Get the value of @ref pwm_oen_cfg_data_t.pwm_oen_cfg_j.
171 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
172 * @return The value of @ref pwm_oen_cfg_data_t.pwm_oen_cfg_j.
173 */
hal_pwm_oen_cfg_get_pwm_oen_cfg_j(pwm_channel_t channel)174 static inline uint32_t hal_pwm_oen_cfg_get_pwm_oen_cfg_j(pwm_channel_t channel)
175 {
176 pwm_oen_cfg_data_t oen_cfg;
177 oen_cfg.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_oen_cfg;
178 return oen_cfg.b.pwm_oen_cfg_j;
179 }
180
181 /**
182 * @brief Set the value of @ref pwm_offset_l_data_t.pwm_offset_l_j.
183 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
184 * @param [in] val The value of @ref pwm_offset_l_data_t.pwm_offset_l_j.
185 */
hal_pwm_offset_l_set_pwm_offset_l_j(pwm_channel_t channel,uint32_t val)186 static inline void hal_pwm_offset_l_set_pwm_offset_l_j(pwm_channel_t channel, uint32_t val)
187 {
188 pwm_offset_l_data_t offset_l;
189 offset_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_l;
190 offset_l.b.pwm_offset_l_j = val;
191 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_l = offset_l.d32;
192 }
193
194 /**
195 * @brief Get the value of @ref pwm_offset_l_data_t.pwm_offset_l_j.
196 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
197 * @return The value of @ref pwm_offset_l_data_t.pwm_offset_l_j.
198 */
hal_pwm_offset_l_get_pwm_offset_l_j(pwm_channel_t channel)199 static inline uint32_t hal_pwm_offset_l_get_pwm_offset_l_j(pwm_channel_t channel)
200 {
201 pwm_offset_l_data_t offset_l;
202 offset_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_l;
203 return offset_l.b.pwm_offset_l_j;
204 }
205
206 /**
207 * @brief Set the value of @ref pwm_offset_h_data_t.pwm_offset_h_j.
208 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
209 * @param [in] val The value of @ref pwm_offset_h_data_t.pwm_offset_h_j.
210 */
hal_pwm_offset_h_set_pwm_offset_h_j(pwm_channel_t channel,uint32_t val)211 static inline void hal_pwm_offset_h_set_pwm_offset_h_j(pwm_channel_t channel, uint32_t val)
212 {
213 pwm_offset_h_data_t offset_h;
214 offset_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_h;
215 offset_h.b.pwm_offset_h_j = val;
216 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_h = offset_h.d32;
217 }
218
219 /**
220 * @brief Get the value of @ref pwm_offset_h_data_t.pwm_offset_h_j.
221 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
222 * @return The value of @ref pwm_offset_h_data_t.pwm_offset_h_j.
223 */
hal_pwm_offset_h_get_pwm_offset_h_j(pwm_channel_t channel)224 static inline uint32_t hal_pwm_offset_h_get_pwm_offset_h_j(pwm_channel_t channel)
225 {
226 pwm_offset_h_data_t offset_h;
227 offset_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_offset_h;
228 return offset_h.b.pwm_offset_h_j;
229 }
230
231 /**
232 * @brief Set the value of @ref pwm_freq_l_data_t.pwm_freq_l_j.
233 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
234 * @param [in] val The value of @ref pwm_freq_l_data_t.pwm_freq_l_j.
235 */
hal_pwm_freq_l_set_pwm_freq_l_j(pwm_channel_t channel,uint32_t val)236 static inline void hal_pwm_freq_l_set_pwm_freq_l_j(pwm_channel_t channel, uint32_t val)
237 {
238 pwm_freq_l_data_t freq_l;
239 freq_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_l;
240 freq_l.b.pwm_freq_l_j = val;
241 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_l = freq_l.d32;
242 }
243
244 /**
245 * @brief Get the value of @ref pwm_freq_l_data_t.pwm_freq_l_j.
246 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
247 * @return The value of @ref pwm_freq_l_data_t.pwm_freq_l_j.
248 */
hal_pwm_freq_l_get_pwm_freq_l_j(pwm_channel_t channel)249 static inline uint32_t hal_pwm_freq_l_get_pwm_freq_l_j(pwm_channel_t channel)
250 {
251 pwm_freq_l_data_t freq_l;
252 freq_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_l;
253 return freq_l.b.pwm_freq_l_j;
254 }
255
256 /**
257 * @brief Set the value of @ref pwm_freq_h_data_t.pwm_freq_h_j.
258 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
259 * @param [in] val The value of @ref pwm_freq_h_data_t.pwm_freq_h_j.
260 */
hal_pwm_freq_h_set_pwm_freq_h_j(pwm_channel_t channel,uint32_t val)261 static inline void hal_pwm_freq_h_set_pwm_freq_h_j(pwm_channel_t channel, uint32_t val)
262 {
263 pwm_freq_h_data_t freq_h;
264 freq_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_h;
265 freq_h.b.pwm_freq_h_j = val;
266 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_h = freq_h.d32;
267 }
268
269 /**
270 * @brief Get the value of @ref pwm_freq_h_data_t.pwm_freq_h_j.
271 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
272 * @return The value of @ref pwm_freq_h_data_t.pwm_freq_h_j.
273 */
hal_pwm_freq_h_get_pwm_freq_h_j(pwm_channel_t channel)274 static inline uint32_t hal_pwm_freq_h_get_pwm_freq_h_j(pwm_channel_t channel)
275 {
276 pwm_freq_h_data_t freq_h;
277 freq_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_freq_h;
278 return freq_h.b.pwm_freq_h_j;
279 }
280
281 /**
282 * @brief Set the value of @ref pwm_duty_l_data_t.pwm_duty_l_j.
283 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
284 * @param [in] val The value of @ref pwm_duty_l_data_t.pwm_duty_l_j.
285 */
hal_pwm_duty_l_set_pwm_duty_l_j(pwm_channel_t channel,uint32_t val)286 static inline void hal_pwm_duty_l_set_pwm_duty_l_j(pwm_channel_t channel, uint32_t val)
287 {
288 pwm_duty_l_data_t duty_l;
289 duty_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_l;
290 duty_l.b.pwm_duty_l_j = val;
291 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_l = duty_l.d32;
292 }
293
294 /**
295 * @brief Get the value of @ref pwm_duty_l_data_t.pwm_duty_l_j.
296 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
297 * @return The value of @ref pwm_duty_l_data_t.pwm_duty_l_j.
298 */
hal_pwm_duty_l_get_pwm_duty_l_j(pwm_channel_t channel)299 static inline uint32_t hal_pwm_duty_l_get_pwm_duty_l_j(pwm_channel_t channel)
300 {
301 pwm_duty_l_data_t duty_l;
302 duty_l.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_l;
303 return duty_l.b.pwm_duty_l_j;
304 }
305
306 /**
307 * @brief Set the value of @ref pwm_duty_h_data_t.pwm_duty_h_j.
308 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
309 * @param [in] val The value of @ref pwm_duty_h_data_t.pwm_duty_h_j.
310 */
hal_pwm_duty_h_set_pwm_duty_h_j(pwm_channel_t channel,uint32_t val)311 static inline void hal_pwm_duty_h_set_pwm_duty_h_j(pwm_channel_t channel, uint32_t val)
312 {
313 pwm_duty_h_data_t duty_h;
314 duty_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_h;
315 duty_h.b.pwm_duty_h_j = val;
316 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_h = duty_h.d32;
317 }
318
319 /**
320 * @brief Get the value of @ref pwm_duty_h_data_t.pwm_duty_h_j.
321 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
322 * @return The value of @ref pwm_duty_h_data_t.pwm_duty_h_j.
323 */
hal_pwm_duty_h_get_pwm_duty_h_j(pwm_channel_t channel)324 static inline uint32_t hal_pwm_duty_h_get_pwm_duty_h_j(pwm_channel_t channel)
325 {
326 pwm_duty_h_data_t duty_h;
327 duty_h.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_duty_h;
328 return duty_h.b.pwm_duty_h_j;
329 }
330
331 /**
332 * @brief Get the value of @ref pwm_periodload_flag_data_t.pwm_periodload_flag_j.
333 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
334 * @return The value of @ref pwm_periodload_flag_data_t.pwm_periodload_flag_j.
335 */
hal_pwm_periodload_flag_get_pwm_periodload_flag_j(pwm_channel_t channel)336 static inline uint32_t hal_pwm_periodload_flag_get_pwm_periodload_flag_j(pwm_channel_t channel)
337 {
338 pwm_periodload_flag_data_t periodload_flag;
339 periodload_flag.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_periodload_flag;
340 return periodload_flag.b.pwm_periodload_flag_j;
341 }
342
343 /**
344 * @brief Set the value of @ref pwm_period_val_data_t.pwm_period_val_j.
345 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
346 * @param [in] val The value of @ref pwm_period_val_data_t.pwm_period_val_j.
347 */
hal_pwm_period_val_set_pwm_period_val_j(pwm_channel_t channel,uint16_t val)348 static inline void hal_pwm_period_val_set_pwm_period_val_j(pwm_channel_t channel, uint16_t val)
349 {
350 pwm_period_val_data_t period_val;
351 period_val.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_period_val;
352 period_val.b.pwm_period_val_j = val;
353 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_period_val = period_val.d32;
354 }
355
356 /**
357 * @brief Get the value of @ref pwm_period_val_data_t.pwm_period_val_j.
358 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
359 * @return The value of @ref pwm_period_val_data_t.pwm_period_val_j.
360 */
hal_pwm_period_val_get_pwm_period_val_j(pwm_channel_t channel)361 static inline uint32_t hal_pwm_period_val_get_pwm_period_val_j(pwm_channel_t channel)
362 {
363 pwm_period_val_data_t period_val;
364 period_val.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_period_val;
365 return period_val.b.pwm_period_val_j;
366 }
367
368 /**
369 * @brief Get the value of @ref pwm_periodcnt_data_t.pwm_periodcnt_j.
370 * @param [in] channel The value of @ref pwm_v151_regs_t.pwm_ip.
371 * @return The value of @ref pwm_periodcnt_data_t.pwm_periodcnt_j.
372 */
hal_pwm_periodcnt_get_pwm_periodcnt_j(pwm_channel_t channel)373 static inline uint32_t hal_pwm_periodcnt_get_pwm_periodcnt_j(pwm_channel_t channel)
374 {
375 pwm_periodcnt_data_t periodcnt;
376 periodcnt.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_ip[channel].pwm_periodcnt;
377 return periodcnt.b.pwm_periodcnt_j;
378 }
379
380 /**
381 * @brief Get the value of @ref pwm_abnor_state0_data_t.pwm_abnor_state0.
382 * @return The value of @ref pwm_abnor_state0_data_t.pwm_abnor_state0.
383 */
hal_pwm_abnor_state0_get_pwm_abnor_state0(void)384 static inline uint32_t hal_pwm_abnor_state0_get_pwm_abnor_state0(void)
385 {
386 pwm_abnor_state0_data_t abnor_state0;
387 abnor_state0.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state0;
388 return abnor_state0.b.pwm_abnor_state0;
389 }
390
391 /**
392 * @brief Get the value of @ref pwm_abnor_state1_data_t.pwm_abnor_state1.
393 * @return The value of @ref pwm_abnor_state1_data_t.pwm_abnor_state1.
394 */
hal_pwm_abnor_state1_get_pwm_abnor_state1(void)395 static inline uint32_t hal_pwm_abnor_state1_get_pwm_abnor_state1(void)
396 {
397 pwm_abnor_state1_data_t abnor_state1;
398 abnor_state1.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state1;
399 return abnor_state1.b.pwm_abnor_state1;
400 }
401
402 /**
403 * @brief Get the value of @ref pwm_abnor_state1_data_t.reserved16_31.
404 * @return The value of @ref pwm_abnor_state1_data_t.reserved16_31.
405 */
hal_pwm_abnor_state1_get_reserved(void)406 static inline uint32_t hal_pwm_abnor_state1_get_reserved(void)
407 {
408 pwm_abnor_state1_data_t abnor_state1;
409 abnor_state1.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state1;
410 return abnor_state1.b.reserved16_31;
411 }
412
413 /**
414 * @brief Set the value of @ref pwm_abnor_state_clr0_data_t.pwm_abnor_state_clr0.
415 * @param [in] val The value of @ref pwm_abnor_state_clr0_data_t.pwm_abnor_state_clr0.
416 */
hal_pwm_abnor_state_clr0_set_pwm_abnor_state_clr0(uint32_t val)417 static inline void hal_pwm_abnor_state_clr0_set_pwm_abnor_state_clr0(uint32_t val)
418 {
419 pwm_abnor_state_clr0_data_t abnor_state_clr0;
420 abnor_state_clr0.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr0;
421 abnor_state_clr0.b.pwm_abnor_state_clr0 = val;
422 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr0 = abnor_state_clr0.d32;
423 }
424
425 /**
426 * @brief Get the value of @ref pwm_abnor_state_clr0_data_t.reserved16_31.
427 * @return The value of @ref pwm_abnor_state_clr0_data_t.reserved16_31.
428 */
hal_pwm_abnor_state_clr0_get_reserved(void)429 static inline uint32_t hal_pwm_abnor_state_clr0_get_reserved(void)
430 {
431 pwm_abnor_state_clr0_data_t abnor_state_clr0;
432 abnor_state_clr0.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr0;
433 return abnor_state_clr0.b.reserved16_31;
434 }
435
436 /**
437 * @brief Set the value of @ref pwm_abnor_state_clr1_data_t.pwm_abnor_state_clr1.
438 * @param [in] val The value of @ref pwm_abnor_state_clr1_data_t.pwm_abnor_state_clr1.
439 */
hal_pwm_abnor_state_clr1_set_pwm_abnor_state_clr1(uint32_t val)440 static inline void hal_pwm_abnor_state_clr1_set_pwm_abnor_state_clr1(uint32_t val)
441 {
442 pwm_abnor_state_clr1_data_t abnor_state_clr1;
443 abnor_state_clr1.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr1;
444 abnor_state_clr1.b.pwm_abnor_state_clr1 = val;
445 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr1 = abnor_state_clr1.d32;
446 }
447
448 /**
449 * @brief Get the value of @ref pwm_abnor_state_clr1_data_t.reserved16_31.
450 * @return The value of @ref pwm_abnor_state_clr1_data_t.reserved16_31.
451 */
hal_pwm_abnor_state_clr1_get_reserved(void)452 static inline uint32_t hal_pwm_abnor_state_clr1_get_reserved(void)
453 {
454 pwm_abnor_state_clr1_data_t abnor_state_clr1;
455 abnor_state_clr1.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_abnor_state_clr1;
456 return abnor_state_clr1.b.reserved16_31;
457 }
458
459 /**
460 * @brief Set the value of @ref pwm_int_mask_data_t.pwm_int_mask.
461 * @param [in] val The value of @ref pwm_int_mask_data_t.pwm_int_mask.
462 */
hal_pwm_int_mask_set_pwm_int_mask(uint32_t val)463 static inline void hal_pwm_int_mask_set_pwm_int_mask(uint32_t val)
464 {
465 pwm_int_mask_data_t int_mask;
466 int_mask.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_int_mask;
467 int_mask.b.pwm_int_mask = val;
468 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_int_mask = int_mask.d32;
469 }
470
471 /**
472 * @brief Get the value of @ref pwm_int_mask_data_t.pwm_int_mask.
473 * @return The value of @ref pwm_int_mask_data_t.pwm_int_mask.
474 */
hal_pwm_int_mask_get_pwm_int_mask(void)475 static inline uint32_t hal_pwm_int_mask_get_pwm_int_mask(void)
476 {
477 pwm_int_mask_data_t int_mask;
478 int_mask.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_int_mask;
479 return int_mask.b.pwm_int_mask;
480 }
481
482 /**
483 * @brief Set the value of @ref pwm_dma_en_data_t.pwm_dma_en.
484 * @param [in] val The value of @ref pwm_dma_en_data_t.pwm_dma_en.
485 */
hal_pwm_dma_en_set_pwm_dma_en(uint32_t val)486 static inline void hal_pwm_dma_en_set_pwm_dma_en(uint32_t val)
487 {
488 pwm_dma_en_data_t dma_en;
489 dma_en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_dma_en;
490 dma_en.b.pwm_dma_en = val;
491 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_dma_en = dma_en.d32;
492 }
493
494 /**
495 * @brief Get the value of @ref pwm_dma_en_data_t.pwm_dma_en.
496 * @return The value of @ref pwm_dma_en_data_t.pwm_dma_en.
497 */
hal_pwm_dma_en_get_pwm_dma_en(void)498 static inline uint32_t hal_pwm_dma_en_get_pwm_dma_en(void)
499 {
500 pwm_dma_en_data_t dma_en;
501 dma_en.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_dma_en;
502 return dma_en.b.pwm_dma_en;
503 }
504
505 /**
506 * @brief Set the value of @ref pwm_cfg_int_clr0_data_t.pwm_cfg_int_clr0.
507 * @param [in] val The value of @ref pwm_cfg_int_clr0_data_t.pwm_cfg_int_clr0.
508 */
hal_pwm_cfg_int_clr0_set_pwm_cfg_int_clr0(uint32_t val)509 static inline void hal_pwm_cfg_int_clr0_set_pwm_cfg_int_clr0(uint32_t val)
510 {
511 pwm_cfg_int_clr0_data_t cfg_int_clr0;
512 cfg_int_clr0.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_cfg_int_clr0;
513 cfg_int_clr0.b.pwm_cfg_int_clr0 = val;
514 ((pwm_v151_regs_t *)g_pwm_regs)->pwm_cfg_int_clr0 = cfg_int_clr0.d32;
515 }
516
517 /**
518 * @brief Get the value of @ref pwm_cfg_int_clr0_data_t.reserved16_31.
519 * @return The value of @ref pwm_cfg_int_clr0_data_t.reserved16_31.
520 */
hal_pwm_cfg_int_clr0_get_reserved(void)521 static inline uint32_t hal_pwm_cfg_int_clr0_get_reserved(void)
522 {
523 pwm_cfg_int_clr0_data_t cfg_int_clr0;
524 cfg_int_clr0.d32 = ((pwm_v151_regs_t *)g_pwm_regs)->pwm_cfg_int_clr0;
525 return cfg_int_clr0.b.reserved16_31;
526 }
527
528
529 /**
530 * @}
531 */
532
533 #ifdef __cplusplus
534 #if __cplusplus
535 }
536 #endif /* __cplusplus */
537 #endif /* __cplusplus */
538
539 #endif