1 /* 2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 */ 18 19 #ifndef __TDE_HAL_H__ 20 #define __TDE_HAL_H__ 21 22 #include "drv_tde_type.h" 23 #include "tde_adp.h" 24 #include "tde_define.h" 25 #include "tde_osictl_k.h" 26 27 #ifdef __cplusplus 28 #if __cplusplus 29 extern "C" { 30 #endif /* __cplusplus */ 31 #endif /* __cplusplus */ 32 33 /* TDE pixel format, accord with register, value cannot modified freely */ 34 typedef enum { 35 TDE_DRV_COLOR_FMT_ARGB8888 = 0x0, 36 TDE_DRV_COLOR_FMT_KRGB8888 = 0x1, 37 TDE_DRV_COLOR_FMT_ARGB4444 = 0x2, 38 TDE_DRV_COLOR_FMT_ARGB1555 = 0x3, 39 TDE_DRV_COLOR_FMT_ARGB8565 = 0x4, 40 TDE_DRV_COLOR_FMT_RGB888 = 0x5, 41 TDE_DRV_COLOR_FMT_RGB444 = 0x6, 42 TDE_DRV_COLOR_FMT_RGB555 = 0x7, 43 TDE_DRV_COLOR_FMT_RGB565 = 0x8, 44 TDE_DRV_COLOR_FMT_A1 = 0x9, 45 TDE_DRV_COLOR_FMT_A8 = 0xa, 46 TDE_DRV_COLOR_FMT_YCBCR888 = 0xb, 47 TDE_DRV_COLOR_FMT_AYCBCR8888 = 0xc, 48 TDE_DRV_COLOR_FMT_A1B = 0xd, 49 TDE_DRV_COLOR_FMT_RABG8888 = 0xf, 50 TDE_DRV_COLOR_FMT_CLUT1 = 0x10, 51 TDE_DRV_COLOR_FMT_CLUT2 = 0x11, 52 TDE_DRV_COLOR_FMT_CLUT4 = 0x12, 53 TDE_DRV_COLOR_FMT_CLUT8 = 0x13, 54 TDE_DRV_COLOR_FMT_ACLUT44 = 0x14, 55 TDE_DRV_COLOR_FMT_ACLUT88 = 0x15, 56 TDE_DRV_COLOR_FMT_CLUT1B = 0x16, 57 TDE_DRV_COLOR_FMT_CLUT2B = 0x17, 58 TDE_DRV_COLOR_FMT_CLUT4B = 0x18, 59 TDE_DRV_COLOR_FMT_YCBCR422 = 0x21, 60 TDE_DRV_COLOR_FMT_HALFWORD = 0x22, 61 TDE_DRV_COLOR_FMT_PKGVYUY = 0x23, 62 TDE_DRV_COLOR_FMT_YCBCR400MBP = 0x30, 63 TDE_DRV_COLOR_FMT_YCBCR422MBH = 0x31, 64 TDE_DRV_COLOR_FMT_YCBCR422MBV = 0x32, 65 TDE_DRV_COLOR_FMT_YCBCR420MB = 0x33, 66 TDE_DRV_COLOR_FMT_YCBCR444MB = 0x34, 67 TDE_DRV_COLOR_FMT_BYTE = 0x100 + TDE_DRV_COLOR_FMT_CLUT8, 68 TDE_DRV_COLOR_FMT_MAX 69 } tde_color_fmt; 70 71 /* 72 * branch order 73 * support 24 orders in ARGB, TDE driver can only expose 4 usual orders; if needed, can be added 74 */ 75 typedef enum { 76 TDE_DRV_ORDER_ARGB = 0x0, 77 TDE_DRV_ORDER_ABGR = 0x5, 78 TDE_DRV_ORDER_RABG = 0x7, 79 TDE_DRV_ORDER_RGBA = 0x9, 80 TDE_DRV_ORDER_BGRA = 0x14, 81 TDE_DRV_ORDER_MAX 82 } tde_argb_order_mode; 83 84 /* TDE basic operate mode */ 85 typedef enum { 86 /* Quick fill */ 87 TDE_QUIKE_FILL, 88 89 /* Quick copy */ 90 TDE_QUIKE_COPY, 91 92 /* Normal fill in single source */ 93 TDE_NORM_FILL_1OPT, 94 95 /* Normal bilit in single source */ 96 TDE_NORM_BLIT_1OPT, 97 98 /* Fill and Rop */ 99 TDE_NORM_FILL_2OPT, 100 101 /* Normal bilit in double source */ 102 TDE_NORM_BLIT_2OPT, 103 104 /* MB operation */ 105 TDE_MB_C_OPT, /* MB chroma zoom */ 106 TDE_MB_Y_OPT, /* MB brightness zoom */ 107 TDE_MB_2OPT, /* MB combine operation */ 108 109 /* Fill operate in single source mode */ 110 TDE_SINGLE_SRC_PATTERN_FILL_OPT, 111 112 /* Fill operate in double source mode */ 113 TDE_DOUBLE_SRC_PATTERN_FILL_OPT 114 } tde_base_opt_mode; 115 116 /* Type definition in interrupted state */ 117 typedef enum { 118 TDE_DRV_LINK_COMPLD_STATS = 0x1, 119 TDE_DRV_NODE_COMPLD_STATS = 0x2, 120 TDE_DRV_LINE_SUSP_STATS = 0x4, 121 TDE_DRV_RDY_START_STATS = 0x8, 122 TDE_DRV_SQ_UPDATE_STATS = 0x10, 123 TDE_DRV_INT_ALL_STATS = 0x800F001F 124 } tde_int_status_mode; 125 126 /* ColorKey mode is needed by hardware */ 127 typedef enum { 128 TDE_DRV_COLORKEY_BACKGROUND = 0, /* color key in bkground bitmap */ 129 TDE_DRV_COLORKEY_FOREGROUND_BEFORE_CLUT = 2, /* color key in foreground bitmap,before CLUT */ 130 TDE_DRV_COLORKEY_FOREGROUND_AFTER_CLUT = 3 /* color key in bkground bitmap, after CLUT */ 131 } tde_color_key_mode; 132 133 /* color key setting arguments */ 134 typedef struct { 135 tde_color_key_mode color_key_mode; /* color key mode */ 136 hi_tde_color_key color_key_value; /* color key value */ 137 } tde_color_key_cmd; 138 139 /* Deficker filting mode */ 140 typedef enum { 141 TDE_DRV_FIXED_COEF0 = 0, /* Deficker by fixed coefficient: 0 */ 142 TDE_DRV_AUTO_FILTER, /* Deficker by auto filter */ 143 TDE_DRV_TEST_FILTER /* Deficker by test filter */ 144 } tde_flicker_mode; 145 146 /* Block type, equipped register note in numerical value reference */ 147 typedef enum { 148 TDE_NO_BLOCK_SLICE_TYPE = 0, /* No block */ 149 TDE_FIRST_BLOCK_SLICE_TYPE = 0x3, /* First block */ 150 TDE_LAST_BLOCK_SLICE_TYPE = 0x5, /* Last block */ 151 TDE_MID_BLOCK_SLICE_TYPE = 0x1 /* Middle block */ 152 } tde_slice_type; 153 154 /* vertical/horizontal filt mode: available for zoom */ 155 typedef enum { 156 TDE_DRV_FILTER_NONE = 0, /* none filt */ 157 TDE_DRV_FILTER_ALL /* filt on Alpha and color value */ 158 } tde_filter_type; 159 160 typedef enum { 161 TDE_ZME_FMT_YUV422 = 0, /* none filt */ 162 TDE_ZME_FMT_YUV420, /* filt on color parameter */ 163 TDE_ZME_FMT_YUV444, /* filt on Alpha value */ 164 TDE_ZME_FMT_ARGB /* filt on Alpha and color value */ 165 } tde_zme_fmt_mode; 166 167 /* Deflicker operate setting */ 168 typedef struct { 169 tde_flicker_mode dfe_mode; 170 tde_filter_type filter_v; 171 hi_u8 coef0_last_line; 172 hi_u8 coef0_cur_line; 173 hi_u8 coef0_next_line; 174 hi_u8 coef1_last_line; 175 hi_u8 coef1_cur_line; 176 hi_u8 coef1_next_line; 177 hi_u8 coef2_last_line; 178 hi_u8 coef2_cur_line; 179 hi_u8 coef2_next_line; 180 hi_u8 coef3_last_line; 181 hi_u8 coef3_cur_line; 182 hi_u8 coef3_next_line; 183 hi_u8 threshold0; 184 hi_u8 threshold1; 185 hi_u8 threshold2; 186 hi_tde_deflicker_mode deflicker_mode; 187 } tde_flicker_cmd; 188 189 typedef struct { 190 hi_u32 hratio : 24; /* 24 is length[23..0] */ 191 hi_u32 hfir_order : 1; /* [24] */ 192 hi_u32 hchfir_en : 1; /* [25] */ 193 hi_u32 hlfir_en : 1; /* [26] */ 194 hi_u32 hafir_en : 1; /* [27] */ 195 hi_u32 hchmid_en : 1; /* [28] */ 196 hi_u32 hlmid_en : 1; /* [29] */ 197 hi_u32 hchmsc_en : 1; /* [30] */ 198 hi_u32 hlmsc_en : 1; /* [31] */ 199 } tde_hsp_info; 200 201 /* Zoom operate settings */ 202 typedef struct { 203 hi_u32 offset_x; 204 hi_u32 offset_y; 205 hi_u32 step_h; 206 hi_u32 step_v; 207 hi_bool coef_sym; 208 hi_bool vf_ring; 209 hi_bool hf_ring; 210 tde_filter_type filter_v; 211 tde_filter_type filter_h; 212 hi_bool first_line_out; 213 hi_bool last_line_out; 214 } tde_resize_cmd; 215 216 /* Clip Setting */ 217 typedef struct { 218 hi_u16 clip_start_x; 219 hi_u16 clip_start_y; 220 hi_u16 clip_end_x; 221 hi_u16 clip_end_y; 222 hi_bool inside_clip; 223 } tde_clip_cmd; 224 225 /* clut mode */ 226 typedef enum { 227 /* color expand */ 228 TDE_COLOR_EXP_CLUT_MODE = 0, 229 230 /* color correct */ 231 TDE_COLOR_CORRCT_CLUT_MODE 232 } tde_clut_mode; 233 234 /* clut setting */ 235 typedef struct { 236 tde_clut_mode clut_mode; 237 hi_u64 phy_clut_addr; 238 } tde_clut_cmd; 239 240 /* MB Setting */ 241 typedef enum { 242 TDE_MB_Y_FILTER = 0, /* brightness filt */ 243 TDE_MB_CBCR_FILTER = 2, /* 2 chroma filt */ 244 TDE_MB_UPSAMP_CONCA = 4, /* 4 first upsample then contact in chroma and brightness */ 245 TDE_MB_CONCA_FILTER = 6, /* 6 first contact in chroma and brightness and then filt */ 246 } tde_mb_opt_mode; 247 248 /* MB Command Setting */ 249 typedef struct { 250 tde_mb_opt_mode mb_mode; /* MB Operate Mode */ 251 } tde_mb_cmd; 252 253 /* plane mask command setting */ 254 typedef struct { 255 hi_u32 mask; 256 } tde_mask_cmd; 257 258 /* Color zone convert setting */ 259 typedef struct { 260 /* Enable or unable conversion on importing color zone */ 261 hi_u8 in_conv; 262 263 /* Enable or unable conversion on exporting color zone */ 264 hi_u8 out_conv; 265 hi_u8 in_src1_conv; 266 267 /* import color conversion direction */ 268 hi_u8 in_rgb2_yc; 269 } tde_conv_mode_cmd; 270 271 /* vertical scanning direction */ 272 typedef enum { 273 TDE_SCAN_UP_DOWN = 0, /* form up to down */ 274 TDE_SCAN_DOWN_UP = 1 /* form down to up */ 275 } tde_vscan_mode; 276 277 /* horizontal scanning direction */ 278 typedef enum { 279 TDE_SCAN_LEFT_RIGHT = 0, /* form left to right */ 280 TDE_SCAN_RIGHT_LEFT = 1 /* form right to left */ 281 } tde_hscan_mode; 282 283 /* Definition on scanning direction */ 284 typedef struct { 285 /* vertical scanning direction */ 286 tde_vscan_mode v_scan; 287 288 /* horizontal scanning direction */ 289 tde_hscan_mode h_scan; 290 } tde_scandirection_mode; 291 292 /* 293 * Between bitmap info struct set by driver , by user and hardware info is not all 294 * the same. eg, bitmap info can be divided into two bitmap info: src1 and src2, 295 * which is hardware needs, when user set for MB. 296 * In MB mode(refer to TDE_INS register), pu8PhyCbCr is not used in driver, but divided into 297 * head addr of src1 and src2. 298 * TDEV240 version: 299 * 1. In nonMB mod, you can support MB. Because adding two membet variables:u32CbCrphy_addr、u32CbCrPitch, 300 * which for Src1 and Src2 add one assistant channel by each. 301 * 2.Support component order in ARGB/RGB format(24 kinds in toal) 302 * ,add component order register and member variables:enRgbOrder. 303 */ 304 typedef struct { 305 /* Bitmap head addr */ 306 hi_u64 phy_addr; 307 308 /* color format */ 309 tde_color_fmt color_fmt; 310 311 /* ARGB component order */ 312 tde_argb_order_mode rgb_order; 313 314 /* Position X at first */ 315 hi_u32 xpos; 316 317 /* Position Y at first */ 318 hi_u32 ypos; 319 320 /* Bitmap Height */ 321 hi_u32 height; 322 323 /* Bitmap Width */ 324 hi_u32 width; 325 326 /* Bitmap Pitch */ 327 hi_u32 pitch; 328 329 /* CbCr component addr */ 330 hi_u64 cbcr_phy_addr; 331 332 /* CbCr pitch */ 333 hi_u32 cb_cr_pitch; 334 335 /* alpha max value is 255?or 128? */ 336 hi_bool alpha_max_is_255; 337 338 /* Vertical scanning direction */ 339 tde_vscan_mode v_scan; 340 341 /* Horizontal scanning direction */ 342 tde_hscan_mode h_scan; 343 hi_bool cma; 344 } tde_surface_msg; 345 346 /* ALU mode */ 347 typedef enum { 348 TDE_SRC1_BYPASS = 0, 349 TDE_ALU_NONE, /* register has no setting, used in flag */ 350 TDE_ALU_ROP, 351 TDE_SRC2_BYPASS, 352 TDE_ALU_MASK_ROP1, 353 TDE_ALU_MASK_ROP2, 354 TDE_ALU_MASK_BLEND, 355 TDE_ALU_BLEND, 356 TDE_ALU_BLEND_SRC2, 357 TDE_ALU_CONCA, 358 TDE_CLIP, 359 TDE_BUTT 360 } tde_alu_mode; 361 362 /* Zoom mode in subnode */ 363 typedef enum { 364 TDE_CHILD_SCALE_NORM = 0, 365 TDE_CHILD_SCALE_MBY, 366 TDE_CHILD_SCALE_MBC, 367 TDE_CHILD_SCALE_MB_CONCA_H, 368 TDE_CHILD_SCALE_MB_CONCA_M, 369 TDE_CHILD_SCALE_MB_CONCA_L, 370 TDE_CHILD_SCALE_MB_CONCA_CUS, 371 } tde_child_scale_mode; 372 373 /* Info needed in MB format when Y/CbCr change */ 374 typedef struct { 375 hi_u32 start_in_x; /* Start X,Y imported after MB adjust */ 376 hi_u32 start_in_y; 377 hi_u32 start_out_x; /* Start X,Y exported after MB adjust */ 378 hi_u32 start_out_y; 379 tde_color_fmt fmt; /* color format, MB use it to renew position of Y and CbCr */ 380 tde_child_scale_mode scale_mode; 381 } tde_mb_start_adj_info; 382 383 /* Adjusting info when double source dispart */ 384 typedef struct { 385 hi_bool double_source; 386 hi_s32 diff_x; /* differences between S1x and Tx */ 387 hi_s32 diff_y; /* differences between S1y and Ty */ 388 } tde_double_src_adj_info; 389 390 /* 391 * Configure info when set child node 392 * u64Update : 393 * _________________________________________ 394 * | | | | | | | | | 395 * | ...| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 396 * |____|____|____|____|____|____|____|____| 397 * | | | | | 398 * \/ \/ \/ \/ \/ 399 * u32Wo u32Xo HOfst u32Wi u32Xi 400 * u32Ho u32Yo VOfst u32Hi u32Yi 401 */ 402 typedef struct { 403 hi_u32 slice_width; 404 hi_u32 slice_wi; 405 hi_s32 slice_c_ofst; 406 407 hi_s32 slice_l_ofst; 408 hi_u32 slice_hoffset; 409 hi_u32 slice_wo; 410 hi_u32 slice_w_hpzme; 411 hi_u32 xi; 412 hi_u32 yi; 413 hi_u32 wi; 414 hi_u32 hi; 415 hi_u32 h_ofst; 416 hi_u32 v_ofst; 417 hi_u32 xo; 418 hi_u32 yo; 419 hi_u32 wo; 420 hi_u32 ho; 421 hi_u32 slice_dst_width; 422 hi_u32 slice_dst_height; 423 hi_u32 slice_dst_hoffset; 424 hi_u64 update; 425 tde_mb_start_adj_info adj_info; 426 tde_double_src_adj_info ds_adj_info; 427 tde_slice_type slice_type; 428 hi_u32 des_crop_en; 429 hi_u32 des_crop_start_x; 430 hi_u32 des_crop_end_x; 431 } tde_child_info; 432 433 typedef struct { 434 tde_color_fmt drv_color_fmt; 435 hi_u32 fill_data; 436 } tde_color_fill; 437 438 typedef enum { 439 TDE_DRV_SRC_NONE = 0, 440 TDE_DRV_SRC_S1 = 0x1, 441 TDE_DRV_SRC_S2 = 0x2, 442 TDE_DRV_SRC_T = 0x4, 443 } tde_src_mode; 444 445 #define TDE_AQ_COMP_NODE_MASK_EN 4 /* 0100：Enable to interrupt when complete current node in AQ */ 446 #define TDE_AQ_COMP_LIST_MASK_EN 8 /* 1000：Enable to interrupt in complete AQ */ 447 448 /* 449 * Handle responded with node 450 * Add 4 byte pointer in physical buffer header,to save software node; 451 * For need to consult current executing software node,but register can only 452 * give the physical addr of it. 453 */ 454 #define TDE_NODE_HEAD_BYTE 16 455 456 /* Next node addr、update info、occupied bytes */ 457 #define TDE_NODE_TAIL_BYTE 12 458 459 /* 460 * Function: tde_hal_init 461 * Description: main used in mapping TDE basic addr 462 * Input: base_addr:Register basic addr 463 * Return: Success/Failure 464 */ 465 hi_s32 tde_hal_init(hi_u32 base_addr); 466 467 hi_s32 tde_hal_open(hi_void); 468 hi_s32 tde_hal_close(hi_void); 469 470 /* 471 * Function: tde_hal_release 472 * Description: main used in release TDE basic addr by mapping 473 * Return: Success/Failure 474 */ 475 hi_void tde_hal_release(hi_void); 476 477 /* 478 * Function: tde_hal_ctl_is_idle 479 * Description: Query if TDE is in IDLE state or not 480 * Return: True: Idle/False: Busy 481 */ 482 hi_bool tde_hal_ctl_is_idle(hi_void); 483 484 /* 485 * Function: tde_hal_ctl_is_idle_safely 486 * Description: cycle many times, to make sure TDE is in IDLE state 487 * Return: True: Idle/False: Busy 488 */ 489 hi_bool tde_hal_ctl_is_idle_safely(hi_void); 490 491 hi_u32 tde_hal_ctl_int_status(hi_void); 492 493 hi_void tde_hal_ctl_reset(hi_void); 494 495 hi_void tde_hal_ctl_int_clear(hi_u32 stats); 496 497 hi_s32 tde_hal_node_init_nd(tde_hw_node **hw_node); 498 499 hi_void tde_hal_free_node_buf(tde_hw_node *hw_node); 500 #if ((HICHIP != HI3516C_V500) && (HICHIP != HI3519A_V100)) 501 hi_void tde_hal_calc_src1_filter_opt(tde_hw_node *node, hi_tde_color_fmt in_fmt, 502 hi_tde_rect *in_rect, hi_tde_rect *out_rect, hi_tde_deflicker_mode filter_mode); 503 #endif 504 hi_s32 tde_hal_calc_src2_filter_opt(tde_hw_node *node, tde_rect_opt *rect_opt, hi_bool defilicker, 505 hi_tde_deflicker_mode filter_mode); 506 507 /* 508 * Function: tde_hal_node_enable_complete_int 509 * Description: Complete interrupt by using node's operate 510 * Input: buf: Buffer need node be operated 511 */ 512 hi_void tde_hal_node_enable_complete_int(hi_void *buf); 513 514 hi_void tde_hal_next_node_addr(hi_void *buf, hi_u64 phy_addr); 515 516 /* 517 * Function: tde_hal_node_set_src1 518 * Description: Set Src1 bitmap info 519 * Input: hw_node: Node struct pointer used in cache by software 520 * drv_surface: bitmap info used in setting 521 */ 522 hi_void tde_hal_node_set_src1(tde_hw_node *hw_node, tde_surface_msg *drv_surface); 523 524 /* 525 * Function: tde_hal_node_set_src2 526 * Description: Set Src2 bitmap info 527 * Input: hw_node: Node struct pointer used in cache by software 528 * drv_surface: bitmap info used in setting 529 */ 530 hi_void tde_hal_node_set_src2(tde_hw_node *hw_node, tde_surface_msg *drv_surface); 531 532 hi_void tde_hal_node_enable_sync(hi_void *buf); 533 534 hi_void tde_hal_node_set_src_to_decompress(tde_hw_node *hw_node, tde_surface_msg *drv_surface); 535 536 hi_void tde_hal_node_set_compress(tde_hw_node *hw_node); 537 538 hi_void tde_hal_node_set_compress_tqt(tde_hw_node *hw_node, tde_surface_msg *drv_surface, 539 hi_tde_out_alpha_from alpha_from); 540 541 hi_void tde_hal_node_set_rotate(tde_hw_node *hw_node, hi_tde_rotate_angle rotate_angle); 542 543 /* 544 * Function: tde_hal_node_set_tqt 545 * Description: Set target bitmap information 546 * Input: hw_node: Node struct pointer used in cache by software 547 * drv_surface: bitmap information used in setting 548 */ 549 hi_void tde_hal_node_set_tqt(tde_hw_node *hw_node, tde_surface_msg *drv_surface, hi_tde_out_alpha_from alpha_from); 550 551 /* 552 * Function: tde_hal_node_set_base_operate 553 * Description: Set basic operate type 554 * Input: hw_node: Node struct pointer used in cache by software 555 * mode: basic operate mode 556 * alu: ALU mode 557 * color_fill: if basic mode have fill operate ,read this value 558 */ 559 hi_s32 tde_hal_node_set_base_operate(tde_hw_node *hw_node, tde_base_opt_mode mode, tde_alu_mode alu, 560 tde_color_fill *color_fill); 561 562 /* 563 * Function: tde_hal_node_set_global_alpha 564 * Description: Set Alpha mixed arguments 565 * Input: hw_node: Node struct pointer used in cache by software 566 * alpha: Alpha mixed setting value 567 * enable: Enable to use global alpha 568 */ 569 hi_void tde_hal_node_set_global_alpha(tde_hw_node *hw_node, hi_u8 alpha, hi_bool enable); 570 571 hi_void tde_hal_node_set_src1_alpha(tde_hw_node *hw_node); 572 573 hi_void tde_hal_node_set_src2_alpha(tde_hw_node *hw_node); 574 575 /* 576 * Function: tde_hal_node_set_exp_alpha 577 * Description: When expand Alpha in RGB5551. to alpha0 and alpha1 578 * Input: hw_node: Node struct pointer used in cache by software 579 * alpha: Alpha mixed setting value 580 */ 581 hi_void tde_hal_node_set_exp_alpha(tde_hw_node *hw_node, tde_src_mode src, hi_u8 alpha0, hi_u8 alpha1); 582 583 /* 584 * Function: tde_hal_node_set_rop 585 * Description: Set ROP arguments 586 * Input: hw_node: Node struct pointer used in cache by software 587 * rgb_rop: ROP operator 588 */ 589 hi_s32 tde_hal_node_set_rop(tde_hw_node *hw_node, hi_tde_rop_mode rgb_rop, hi_tde_rop_mode alpha_rop); 590 591 /* 592 * Function: tde_hal_node_set_blend 593 * Description: Set blend operate arguments 594 * Input: hw_node: Node struct pointer used in cache by software 595 * blend_opt:blend operate option 596 */ 597 hi_s32 tde_hal_node_set_blend(tde_hw_node *hw_node, hi_tde_blend_opt *blend_opt); 598 599 /* 600 * Function: tde_hal_node_set_colorize 601 * Description: Set blend operate arguments 602 * Input: hw_node: Node struct pointer used in cache by software 603 * color_resize:Co 604 */ 605 hi_s32 tde_hal_node_set_colorize(tde_hw_node *hw_node, hi_u32 colorize); 606 607 /* 608 * Function: tde_hal_node_enable_alpha_rop 609 * Description: Enable to blend Rop operate 610 * Input: hw_node: Node struct pointer used in cache by software 611 */ 612 hi_void tde_hal_node_enable_alpha_rop(tde_hw_node *hw_node); 613 614 /* 615 * Function: tde_hal_node_set_clut_opt 616 * Description: Set color expand or adjust argument 617 * Input: hw_node: Node struct pointer used in cache by software 618 * clut_cmd: Clut operate atguments 619 */ 620 hi_s32 tde_hal_node_set_clut_opt(tde_hw_node *hw_node, tde_clut_cmd *clut_cmd, hi_bool reload); 621 622 /* 623 * Function: tde_hal_node_set_colorkey 624 * Description: Set arguments needed by color key,according current color format 625 * Input: hw_node: Node struct pointer used in cache by software 626 * fmt_cat: color format 627 * color_key: color key pointer 628 */ 629 hi_s32 tde_hal_node_set_colorkey(tde_hw_node *hw_node, tde_colorfmt_category fmt_cat, 630 tde_color_key_cmd *color_key); 631 632 /* 633 * Function: tde_hal_node_set_clipping 634 * Description: Set rectangle's clip operated arguments 635 * Input: hw_node: Node struct pointer used in cache by software 636 * clip: Clip rectangle range 637 */ 638 hi_s32 tde_hal_node_set_clipping(tde_hw_node *hw_node, tde_clip_cmd *clip); 639 640 hi_s32 tde_hal_node_set_color_convert(tde_hw_node *hw_node, tde_conv_mode_cmd *conv); 641 642 /* 643 * Function: tde_set_node_csc 644 * Description: Set CSC's first optional argument 645 * Input: hw_node:Node struct pointer used in cache by software 646 csc_opt:CSC first optional argument 647 */ 648 hi_s32 tde_set_node_csc(tde_hw_node *hw_node, hi_tde_csc_opt csc_opt); 649 650 hi_s32 tde_hal_set_deflicer_level(hi_tde_deflicker_level deflicker_level); 651 652 hi_s32 tde_hal_get_deflicer_level(hi_tde_deflicker_level *deflicer_level); 653 654 hi_s32 tde_hal_set_alpha_threshold(hi_u8 threshold_value); 655 656 hi_s32 tde_hal_get_alpha_threshold(hi_u8 *threshold_value); 657 658 /* 659 * Function: tde_hal_get_alpha_threshold_state 660 * Description: Set alpha threshold to judge if open or close 661 * Input: alpha_threshold_en:alpha switch status 662 * Return: Success / Fail 663 */ 664 hi_s32 tde_hal_set_alpha_threshold_state(hi_bool alpha_threshold_en); 665 666 /* 667 * Function: tde_hal_get_alpha_threshold_state 668 * Description: Get alpha threshold to judge if open or close 669 * Output: en_alpha_threshold:alpha switch status 670 * Return: Success / Fail 671 */ 672 hi_s32 tde_hal_get_alpha_threshold_state(hi_bool *alpha_threshold_en); 673 674 /* 675 * Function: tde_hal_node_execute 676 * Description: Start TDE list 677 * Input: 678 * nodephy_addr: list first node address 679 * update: first node updating flag 680 * aq_use_buff: if use temporary buffer 681 * Return: Success / Fail 682 */ 683 hi_s32 tde_hal_node_execute(hi_u64 nodephy_addr, hi_u64 update, hi_bool aq_use_buff); 684 685 hi_u64 tde_hal_cur_node(hi_void); 686 /* 687 * Function: tde_hal_resume_init 688 * Description: Resume the hardware by software ,initialize the TDE device 689 */ 690 hi_void tde_hal_resume_init(hi_void); 691 692 hi_void tde_hal_suspend(hi_void); 693 694 hi_void tde_hal_set_clock(hi_bool enable); 695 696 #ifdef CONFIG_GFX_MMU_SUPPORT 697 hi_void tde_hal_free_tmp_buf(tde_hw_node *hw_node); 698 #endif 699 700 osal_proc_entry_t *tde_hal_node_print_info(osal_proc_entry_t *p, hi_u32 *cur_node); 701 702 #ifdef __cplusplus 703 #if __cplusplus 704 } 705 #endif /* __cplusplus */ 706 #endif /* __cplusplus */ 707 708 #endif /* _TDE_HAL_H_ */ 709