1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3 *
4 * (C) COPYRIGHT 2018-2021 ARM Limited. All rights reserved.
5 *
6 * This program is free software and is provided to you under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation, and any use by you of this program is subject to the terms
9 * of such GNU license.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you can access it online at
18 * http://www.gnu.org/licenses/gpl-2.0.html.
19 *
20 */
21
22 #ifndef _KBASE_CSF_FIRMWARE_H_
23 #define _KBASE_CSF_FIRMWARE_H_
24
25 #include "device/mali_kbase_device.h"
26 #include <uapi/gpu/arm/bifrost/csf/mali_gpu_csf_registers.h>
27
28 /*
29 * PAGE_KERNEL_RO was only defined on 32bit ARM in 4.19 in:
30 * Commit a3266bd49c721e2e0a71f352d83713fbd60caadb
31 * Author: Luis R. Rodriguez <mcgrof@kernel.org>
32 * Date: Fri Aug 17 15:46:29 2018 -0700
33 *
34 * mm: provide a fallback for PAGE_KERNEL_RO for architectures
35 *
36 * Some architectures do not define certain PAGE_KERNEL_* flags, this is
37 * either because:
38 *
39 * a) The way to implement some of these flags is *not yet ported*, or
40 * b) The architecture *has no way* to describe them
41 *
42 * [snip]
43 *
44 * This can be removed once support of 32bit ARM kernels predating 4.19 is no
45 * longer required.
46 */
47 #ifndef PAGE_KERNEL_RO
48 #define PAGE_KERNEL_RO PAGE_KERNEL
49 #endif
50
51 /* Address space number to claim for the firmware. */
52 #define MCU_AS_NR 0
53 #define MCU_AS_BITMASK (1 << MCU_AS_NR)
54
55 /* Number of available Doorbells */
56 #define CSF_NUM_DOORBELL ((u8)24)
57
58 /* Offset to the first HW doorbell page */
59 #define CSF_HW_DOORBELL_PAGE_OFFSET ((u32)0x80000)
60
61 /* Size of HW Doorbell page, used to calculate the offset to subsequent pages */
62 #define CSF_HW_DOORBELL_PAGE_SIZE ((u32)0x10000)
63
64 /* Doorbell 0 is used by the driver. */
65 #define CSF_KERNEL_DOORBELL_NR ((u32)0)
66
67 /* Offset of name inside a trace buffer entry in the firmware image */
68 #define TRACE_BUFFER_ENTRY_NAME_OFFSET (0x1C)
69
70 /* All implementations of the host interface with major version 0 must comply
71 * with these restrictions:
72 */
73 /* GLB_GROUP_NUM: At least 3 CSGs, but no more than 31 */
74 #define MIN_SUPPORTED_CSGS 3
75 #define MAX_SUPPORTED_CSGS 31
76 /* GROUP_STREAM_NUM: At least 8 CSs per CSG, but no more than 32 */
77 #define MIN_SUPPORTED_STREAMS_PER_GROUP 8
78 /* Maximum CSs per csg. */
79 #define MAX_SUPPORTED_STREAMS_PER_GROUP 32
80
81 struct kbase_device;
82
83
84 /**
85 * struct kbase_csf_mapping - Memory mapping for CSF memory.
86 * @phys: Physical memory allocation used by the mapping.
87 * @cpu_addr: Starting CPU address for the mapping.
88 * @va_reg: GPU virtual address region for the mapping.
89 * @num_pages: Size of the mapping, in memory pages.
90 */
91 struct kbase_csf_mapping {
92 struct tagged_addr *phys;
93 void *cpu_addr;
94 struct kbase_va_region *va_reg;
95 unsigned int num_pages;
96 };
97
98 /**
99 * struct kbase_csf_trace_buffers - List and state of firmware trace buffers.
100 * @list: List of trace buffers descriptors.
101 * @mcu_rw: Metadata for the MCU shared memory mapping used for
102 * GPU-readable,writable/CPU-writable variables.
103 * @mcu_write: Metadata for the MCU shared memory mapping used for
104 * GPU-writable/CPU-readable variables.
105 */
106 struct kbase_csf_trace_buffers {
107 struct list_head list;
108 struct kbase_csf_mapping mcu_rw;
109 struct kbase_csf_mapping mcu_write;
110 };
111
112 /**
113 * struct kbase_csf_cmd_stream_info - CSI provided by the firmware.
114 *
115 * @kbdev: Address of the instance of a GPU platform device that implements
116 * this interface.
117 * @features: Bit field of CS features (e.g. which types of jobs
118 * are supported). Bits 7:0 specify the number of work registers(-1).
119 * Bits 11:8 specify the number of scoreboard entries(-1).
120 * @input: Address of CSI input page.
121 * @output: Address of CSI output page.
122 */
123 struct kbase_csf_cmd_stream_info {
124 struct kbase_device *kbdev;
125 u32 features;
126 void *input;
127 void *output;
128 };
129
130 /**
131 * kbase_csf_firmware_cs_input() - Set a word in a CS's input page
132 *
133 * @info: CSI provided by the firmware.
134 * @offset: Offset of the word to be written, in bytes.
135 * @value: Value to be written.
136 */
137 void kbase_csf_firmware_cs_input(
138 const struct kbase_csf_cmd_stream_info *info, u32 offset, u32 value);
139
140 /**
141 * kbase_csf_firmware_cs_input_read() - Read a word in a CS's input page
142 *
143 * Return: Value of the word read from the CS's input page.
144 *
145 * @info: CSI provided by the firmware.
146 * @offset: Offset of the word to be read, in bytes.
147 */
148 u32 kbase_csf_firmware_cs_input_read(
149 const struct kbase_csf_cmd_stream_info *const info, const u32 offset);
150
151 /**
152 * kbase_csf_firmware_cs_input_mask() - Set part of a word in a CS's input page
153 *
154 * @info: CSI provided by the firmware.
155 * @offset: Offset of the word to be modified, in bytes.
156 * @value: Value to be written.
157 * @mask: Bitmask with the bits to be modified set.
158 */
159 void kbase_csf_firmware_cs_input_mask(
160 const struct kbase_csf_cmd_stream_info *info, u32 offset,
161 u32 value, u32 mask);
162
163 /**
164 * kbase_csf_firmware_cs_output() - Read a word in a CS's output page
165 *
166 * Return: Value of the word read from the CS's output page.
167 *
168 * @info: CSI provided by the firmware.
169 * @offset: Offset of the word to be read, in bytes.
170 */
171 u32 kbase_csf_firmware_cs_output(
172 const struct kbase_csf_cmd_stream_info *info, u32 offset);
173 /**
174 * struct kbase_csf_cmd_stream_group_info - CSG interface provided by the
175 * firmware.
176 *
177 * @kbdev: Address of the instance of a GPU platform device that implements
178 * this interface.
179 * @features: Bit mask of features. Reserved bits should be 0, and should
180 * be ignored.
181 * @input: Address of global interface input page.
182 * @output: Address of global interface output page.
183 * @suspend_size: Size in bytes for normal suspend buffer for the CSG
184 * @protm_suspend_size: Size in bytes for protected mode suspend buffer
185 * for the CSG.
186 * @stream_num: Number of CSs in the CSG.
187 * @stream_stride: Stride in bytes in JASID0 virtual address between
188 * CS capability structures.
189 * @streams: Address of an array of CS capability structures.
190 */
191 struct kbase_csf_cmd_stream_group_info {
192 struct kbase_device *kbdev;
193 u32 features;
194 void *input;
195 void *output;
196 u32 suspend_size;
197 u32 protm_suspend_size;
198 u32 stream_num;
199 u32 stream_stride;
200 struct kbase_csf_cmd_stream_info *streams;
201 };
202
203 /**
204 * kbase_csf_firmware_csg_input() - Set a word in a CSG's input page
205 *
206 * @info: CSG interface provided by the firmware.
207 * @offset: Offset of the word to be written, in bytes.
208 * @value: Value to be written.
209 */
210 void kbase_csf_firmware_csg_input(
211 const struct kbase_csf_cmd_stream_group_info *info, u32 offset,
212 u32 value);
213
214 /**
215 * kbase_csf_firmware_csg_input_read() - Read a word in a CSG's input page
216 *
217 * Return: Value of the word read from the CSG's input page.
218 *
219 * @info: CSG interface provided by the firmware.
220 * @offset: Offset of the word to be read, in bytes.
221 */
222 u32 kbase_csf_firmware_csg_input_read(
223 const struct kbase_csf_cmd_stream_group_info *info, u32 offset);
224
225 /**
226 * kbase_csf_firmware_csg_input_mask() - Set part of a word in a CSG's
227 * input page
228 *
229 * @info: CSG interface provided by the firmware.
230 * @offset: Offset of the word to be modified, in bytes.
231 * @value: Value to be written.
232 * @mask: Bitmask with the bits to be modified set.
233 */
234 void kbase_csf_firmware_csg_input_mask(
235 const struct kbase_csf_cmd_stream_group_info *info, u32 offset,
236 u32 value, u32 mask);
237
238 /**
239 * kbase_csf_firmware_csg_output()- Read a word in a CSG's output page
240 *
241 * Return: Value of the word read from the CSG's output page.
242 *
243 * @info: CSG interface provided by the firmware.
244 * @offset: Offset of the word to be read, in bytes.
245 */
246 u32 kbase_csf_firmware_csg_output(
247 const struct kbase_csf_cmd_stream_group_info *info, u32 offset);
248
249 /**
250 * struct kbase_csf_global_iface - Global CSF interface
251 * provided by the firmware.
252 *
253 * @kbdev: Address of the instance of a GPU platform device that implements
254 * this interface.
255 * @version: Bits 31:16 hold the major version number and 15:0 hold the minor
256 * version number. A higher minor version is backwards-compatible
257 * with a lower minor version for the same major version.
258 * @features: Bit mask of features (e.g. whether certain types of job can
259 * be suspended). Reserved bits should be 0, and should be ignored.
260 * @input: Address of global interface input page.
261 * @output: Address of global interface output page.
262 * @group_num: Number of CSGs supported.
263 * @group_stride: Stride in bytes in JASID0 virtual address between
264 * CSG capability structures.
265 * @prfcnt_size: Performance counters size.
266 * @instr_features: Instrumentation features. (csf >= 1.1.0)
267 * @groups: Address of an array of CSG capability structures.
268 */
269 struct kbase_csf_global_iface {
270 struct kbase_device *kbdev;
271 u32 version;
272 u32 features;
273 void *input;
274 void *output;
275 u32 group_num;
276 u32 group_stride;
277 u32 prfcnt_size;
278 u32 instr_features;
279 struct kbase_csf_cmd_stream_group_info *groups;
280 };
281
282 /**
283 * kbase_csf_firmware_global_input() - Set a word in the global input page
284 *
285 * @iface: CSF interface provided by the firmware.
286 * @offset: Offset of the word to be written, in bytes.
287 * @value: Value to be written.
288 */
289 void kbase_csf_firmware_global_input(
290 const struct kbase_csf_global_iface *iface, u32 offset, u32 value);
291
292 /**
293 * kbase_csf_firmware_global_input_mask() - Set part of a word in the global
294 * input page
295 *
296 * @iface: CSF interface provided by the firmware.
297 * @offset: Offset of the word to be modified, in bytes.
298 * @value: Value to be written.
299 * @mask: Bitmask with the bits to be modified set.
300 */
301 void kbase_csf_firmware_global_input_mask(
302 const struct kbase_csf_global_iface *iface, u32 offset,
303 u32 value, u32 mask);
304
305 /**
306 * kbase_csf_firmware_global_input_read() - Read a word in a global input page
307 *
308 * Return: Value of the word read from the global input page.
309 *
310 * @info: CSG interface provided by the firmware.
311 * @offset: Offset of the word to be read, in bytes.
312 */
313 u32 kbase_csf_firmware_global_input_read(
314 const struct kbase_csf_global_iface *info, u32 offset);
315
316 /**
317 * kbase_csf_firmware_global_output() - Read a word in the global output page
318 *
319 * Return: Value of the word read from the global output page.
320 *
321 * @iface: CSF interface provided by the firmware.
322 * @offset: Offset of the word to be read, in bytes.
323 */
324 u32 kbase_csf_firmware_global_output(
325 const struct kbase_csf_global_iface *iface, u32 offset);
326
327 /* Calculate the offset to the Hw doorbell page corresponding to the
328 * doorbell number.
329 */
csf_doorbell_offset(int doorbell_nr)330 static u32 csf_doorbell_offset(int doorbell_nr)
331 {
332 WARN_ON(doorbell_nr >= CSF_NUM_DOORBELL);
333
334 return CSF_HW_DOORBELL_PAGE_OFFSET +
335 (doorbell_nr * CSF_HW_DOORBELL_PAGE_SIZE);
336 }
337
kbase_csf_ring_doorbell(struct kbase_device * kbdev,int doorbell_nr)338 static inline void kbase_csf_ring_doorbell(struct kbase_device *kbdev,
339 int doorbell_nr)
340 {
341 WARN_ON(doorbell_nr >= CSF_NUM_DOORBELL);
342
343 kbase_reg_write(kbdev, csf_doorbell_offset(doorbell_nr), (u32)1);
344 }
345
346 /**
347 * kbase_csf_read_firmware_memory - Read a value in a GPU address
348 *
349 * @kbdev: Device pointer
350 * @gpu_addr: GPU address to read
351 * @value: output pointer to which the read value will be written.
352 *
353 * This function read a value in a GPU address that belongs to
354 * a private firmware memory region. The function assumes that the location
355 * is not permanently mapped on the CPU address space, therefore it maps it
356 * and then unmaps it to access it independently.
357 */
358 void kbase_csf_read_firmware_memory(struct kbase_device *kbdev,
359 u32 gpu_addr, u32 *value);
360
361 /**
362 * kbase_csf_update_firmware_memory - Write a value in a GPU address
363 *
364 * @kbdev: Device pointer
365 * @gpu_addr: GPU address to write
366 * @value: Value to write
367 *
368 * This function writes a given value in a GPU address that belongs to
369 * a private firmware memory region. The function assumes that the destination
370 * is not permanently mapped on the CPU address space, therefore it maps it
371 * and then unmaps it to access it independently.
372 */
373 void kbase_csf_update_firmware_memory(struct kbase_device *kbdev,
374 u32 gpu_addr, u32 value);
375
376 /**
377 * kbase_csf_firmware_early_init() - Early initializatin for the firmware.
378 * @kbdev: Kbase device
379 *
380 * Initialize resources related to the firmware. Must be called at kbase probe.
381 *
382 * Return: 0 if successful, negative error code on failure
383 */
384 int kbase_csf_firmware_early_init(struct kbase_device *kbdev);
385
386 /**
387 * kbase_csf_firmware_init() - Load the firmware for the CSF MCU
388 * @kbdev: Kbase device
389 *
390 * Request the firmware from user space and load it into memory.
391 *
392 * Return: 0 if successful, negative error code on failure
393 */
394 int kbase_csf_firmware_init(struct kbase_device *kbdev);
395
396 /**
397 * kbase_csf_firmware_term() - Unload the firmware
398 * @kbdev: Kbase device
399 *
400 * Frees the memory allocated by kbase_csf_firmware_init()
401 */
402 void kbase_csf_firmware_term(struct kbase_device *kbdev);
403
404 /**
405 * kbase_csf_firmware_ping - Send the ping request to firmware.
406 *
407 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
408 *
409 * The function sends the ping request to firmware.
410 */
411 void kbase_csf_firmware_ping(struct kbase_device *kbdev);
412
413 /**
414 * kbase_csf_firmware_ping_wait - Send the ping request to firmware and waits.
415 *
416 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
417 *
418 * The function sends the ping request to firmware and waits to confirm it is
419 * alive.
420 *
421 * Return: 0 on success, or negative on failure.
422 */
423 int kbase_csf_firmware_ping_wait(struct kbase_device *kbdev);
424
425 /**
426 * kbase_csf_firmware_set_timeout - Set a hardware endpoint progress timeout.
427 *
428 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
429 * @timeout: The maximum number of GPU cycles that is allowed to elapse
430 * without forward progress before the driver terminates a GPU
431 * command queue group.
432 *
433 * Configures the progress timeout value used by the firmware to decide
434 * when to report that a task is not making progress on an endpoint.
435 *
436 * Return: 0 on success, or negative on failure.
437 */
438 int kbase_csf_firmware_set_timeout(struct kbase_device *kbdev, u64 timeout);
439
440 /**
441 * kbase_csf_enter_protected_mode - Send the Global request to firmware to
442 * enter protected mode.
443 *
444 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
445 *
446 * The function must be called with kbdev->csf.scheduler.interrupt_lock held
447 * and it does not wait for the protected mode entry to complete.
448 */
449 void kbase_csf_enter_protected_mode(struct kbase_device *kbdev);
450
451 /**
452 * kbase_csf_wait_protected_mode_enter - Wait for the completion of PROTM_ENTER
453 * Global request sent to firmware.
454 *
455 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
456 *
457 * This function needs to be called after kbase_csf_wait_protected_mode_enter()
458 * to wait for the protected mode entry to complete. GPU reset is triggered if
459 * the wait is unsuccessful.
460 */
461 void kbase_csf_wait_protected_mode_enter(struct kbase_device *kbdev);
462
kbase_csf_firmware_mcu_halted(struct kbase_device * kbdev)463 static inline bool kbase_csf_firmware_mcu_halted(struct kbase_device *kbdev)
464 {
465 #if IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI)
466 return true;
467 #else
468 return (kbase_reg_read(kbdev, GPU_CONTROL_REG(MCU_STATUS)) ==
469 MCU_STATUS_HALTED);
470 #endif /* CONFIG_MALI_BIFROST_NO_MALI */
471 }
472
473 /**
474 * kbase_csf_firmware_trigger_mcu_halt - Send the Global request to firmware to
475 * halt its operation and bring itself
476 * into a known internal state for warm
477 * boot later.
478 *
479 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
480 */
481 void kbase_csf_firmware_trigger_mcu_halt(struct kbase_device *kbdev);
482
483 /**
484 * kbase_csf_firmware_enable_mcu - Send the command to enable MCU
485 *
486 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
487 */
488 void kbase_csf_firmware_enable_mcu(struct kbase_device *kbdev);
489
490 /**
491 * kbase_csf_firmware_disable_mcu - Send the command to disable MCU
492 *
493 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
494 */
495 void kbase_csf_firmware_disable_mcu(struct kbase_device *kbdev);
496
497 /**
498 * kbase_csf_firmware_disable_mcu_wait - Wait for the MCU to reach disabled
499 * status.
500 *
501 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
502 */
503 void kbase_csf_firmware_disable_mcu_wait(struct kbase_device *kbdev);
504
505 #ifdef KBASE_PM_RUNTIME
506 /**
507 * kbase_csf_firmware_trigger_mcu_sleep - Send the command to put MCU in sleep
508 * state.
509 *
510 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
511 */
512 void kbase_csf_firmware_trigger_mcu_sleep(struct kbase_device *kbdev);
513
514 /**
515 * kbase_csf_firmware_is_mcu_in_sleep - Check if sleep request has completed
516 * and MCU has halted.
517 *
518 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
519 *
520 * Return: true if sleep request has completed, otherwise false.
521 */
522 bool kbase_csf_firmware_is_mcu_in_sleep(struct kbase_device *kbdev);
523 #endif
524
525 /**
526 * kbase_trigger_firmware_reload - Trigger the reboot of MCU firmware, for the
527 * cold boot case firmware image would be
528 * reloaded from filesystem into memory.
529 *
530 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
531 */
532 void kbase_csf_firmware_trigger_reload(struct kbase_device *kbdev);
533
534 /**
535 * kbase_csf_firmware_reload_completed - The reboot of MCU firmware has
536 * completed.
537 *
538 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
539 */
540 void kbase_csf_firmware_reload_completed(struct kbase_device *kbdev);
541
542 /**
543 * kbase_csf_firmware_global_reinit - Send the Global configuration requests
544 * after the reboot of MCU firmware.
545 *
546 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
547 * @core_mask: Mask of the enabled shader cores.
548 */
549 void kbase_csf_firmware_global_reinit(struct kbase_device *kbdev,
550 u64 core_mask);
551
552 /**
553 * kbase_csf_firmware_global_reinit_complete - Check the Global configuration
554 * requests, sent after the reboot of MCU firmware, have
555 * completed or not.
556 *
557 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
558 *
559 * Return: true if the Global configuration requests completed otherwise false.
560 */
561 bool kbase_csf_firmware_global_reinit_complete(struct kbase_device *kbdev);
562
563 /**
564 * kbase_csf_firmware_update_core_attr - Send the Global configuration request
565 * to update the requested core attribute
566 * changes.
567 *
568 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
569 * @update_core_pwroff_timer: If true, signal the firmware needs to update
570 * the MCU power-off timer value.
571 * @update_core_mask: If true, need to do the core_mask update with
572 * the supplied core_mask value.
573 * @core_mask: New core mask value if update_core_mask is true,
574 * otherwise unused.
575 */
576 void kbase_csf_firmware_update_core_attr(struct kbase_device *kbdev,
577 bool update_core_pwroff_timer, bool update_core_mask, u64 core_mask);
578
579 /**
580 * kbase_csf_firmware_core_attr_updated - Check the Global configuration
581 * request has completed or not, that was sent to update
582 * the core attributes.
583 *
584 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
585 *
586 * Return: true if the Global configuration request to update the core
587 * attributes has completed, otherwise false.
588 */
589 bool kbase_csf_firmware_core_attr_updated(struct kbase_device *kbdev);
590
591 /**
592 * kbase_csf_firmware_get_glb_iface - Request the global control block of CSF
593 * interface capabilities
594 *
595 * @kbdev: Kbase device.
596 * @group_data: Pointer where to store all the group data
597 * (sequentially).
598 * @max_group_num: The maximum number of groups to be read.
599 * Can be 0, in which case group_data is unused.
600 * @stream_data: Pointer where to store all the CS data
601 * (sequentially).
602 * @max_total_stream_num: The maximum number of CSs to be read.
603 * Can be 0, in which case stream_data is unused.
604 * @glb_version: Where to store the global interface version.
605 * @features: Where to store a bit mask of features (e.g.
606 * whether certain types of job can be suspended).
607 * @group_num: Where to store the number of CSGs
608 * supported.
609 * @prfcnt_size: Where to store the size of CSF performance counters,
610 * in bytes. Bits 31:16 hold the size of firmware
611 * performance counter data and 15:0 hold the size of
612 * hardware performance counter data.
613 * @instr_features: Instrumentation features. Bits 7:4 hold the max size
614 * of events. Bits 3:0 hold the offset update rate.
615 * (csf >= 1,1,0)
616 *
617 * Return: Total number of CSs, summed across all groups.
618 */
619 u32 kbase_csf_firmware_get_glb_iface(
620 struct kbase_device *kbdev, struct basep_cs_group_control *group_data,
621 u32 max_group_num, struct basep_cs_stream_control *stream_data,
622 u32 max_total_stream_num, u32 *glb_version, u32 *features,
623 u32 *group_num, u32 *prfcnt_size, u32 *instr_features);
624
625 /**
626 * kbase_csf_firmware_get_timeline_metadata - Get CSF firmware header timeline
627 * metadata content
628 *
629 * @kbdev: Kbase device.
630 * @name: Name of the metadata which metadata content to be returned.
631 * @size: Metadata size if specified metadata found.
632 *
633 * Return: The firmware timeline metadata content which match @p name.
634 */
635 const char *kbase_csf_firmware_get_timeline_metadata(struct kbase_device *kbdev,
636 const char *name, size_t *size);
637
638 /**
639 * kbase_csf_firmware_mcu_shared_mapping_init - Allocate and map MCU shared memory.
640 *
641 * @kbdev: Kbase device the memory mapping shall belong to.
642 * @num_pages: Number of memory pages to map.
643 * @cpu_map_properties: Either PROT_READ or PROT_WRITE.
644 * @gpu_map_properties: Either KBASE_REG_GPU_RD or KBASE_REG_GPU_WR.
645 * @csf_mapping: Object where to write metadata for the memory mapping.
646 *
647 * This helper function allocates memory and maps it on both the CPU
648 * and the GPU address spaces. Most of the properties of the mapping
649 * are implicit and will be automatically determined by the function,
650 * e.g. whether memory is cacheable.
651 *
652 * The client is only expected to specify whether the mapping is readable
653 * or writable in the CPU and the GPU address spaces; any other flag
654 * will be ignored by the function.
655 *
656 * Return: 0 if success, or an error code on failure.
657 */
658 int kbase_csf_firmware_mcu_shared_mapping_init(
659 struct kbase_device *kbdev,
660 unsigned int num_pages,
661 unsigned long cpu_map_properties,
662 unsigned long gpu_map_properties,
663 struct kbase_csf_mapping *csf_mapping);
664
665 /**
666 * kbase_csf_firmware_mcu_shared_mapping_term - Unmap and free MCU shared memory.
667 *
668 * @kbdev: Device pointer.
669 * @csf_mapping: Metadata of the memory mapping to terminate.
670 */
671 void kbase_csf_firmware_mcu_shared_mapping_term(
672 struct kbase_device *kbdev, struct kbase_csf_mapping *csf_mapping);
673
674 #ifdef CONFIG_MALI_BIFROST_DEBUG
675 extern bool fw_debug;
676 #endif
677
kbase_csf_timeout_in_jiffies(const unsigned int msecs)678 static inline long kbase_csf_timeout_in_jiffies(const unsigned int msecs)
679 {
680 #ifdef CONFIG_MALI_BIFROST_DEBUG
681 return (fw_debug ? MAX_SCHEDULE_TIMEOUT : msecs_to_jiffies(msecs));
682 #else
683 return msecs_to_jiffies(msecs);
684 #endif
685 }
686
687 /**
688 * kbase_csf_firmware_enable_gpu_idle_timer() - Activate the idle hysteresis
689 * monitoring operation
690 *
691 * @kbdev: Kbase device structure
692 *
693 * Program the firmware interface with its configured hysteresis count value
694 * and enable the firmware to act on it. The Caller is
695 * assumed to hold the kbdev->csf.scheduler.interrupt_lock.
696 */
697 void kbase_csf_firmware_enable_gpu_idle_timer(struct kbase_device *kbdev);
698
699 /**
700 * kbase_csf_firmware_disable_gpu_idle_timer() - Disable the idle time
701 * hysteresis monitoring operation
702 *
703 * @kbdev: Kbase device structure
704 *
705 * Program the firmware interface to disable the idle hysteresis timer. The
706 * Caller is assumed to hold the kbdev->csf.scheduler.interrupt_lock.
707 */
708 void kbase_csf_firmware_disable_gpu_idle_timer(struct kbase_device *kbdev);
709
710 /**
711 * kbase_csf_firmware_get_gpu_idle_hysteresis_time - Get the firmware GPU idle
712 * detection hysteresis duration
713 *
714 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
715 *
716 * Return: the internally recorded hysteresis (nominal) value.
717 */
718 u32 kbase_csf_firmware_get_gpu_idle_hysteresis_time(struct kbase_device *kbdev);
719
720 /**
721 * kbase_csf_firmware_set_gpu_idle_hysteresis_time - Set the firmware GPU idle
722 * detection hysteresis duration
723 *
724 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
725 * @dur: The duration value (unit: milliseconds) for the configuring
726 * hysteresis field for GPU idle detection
727 *
728 * The supplied value will be recorded internally without any change. But the
729 * actual field value will be subject to hysteresis source frequency scaling
730 * and maximum value limiting. The default source will be SYSTEM_TIMESTAMP
731 * counter. But in case the platform is not able to supply it, the GPU
732 * CYCLE_COUNTER source will be used as an alternative. Bit-31 on the
733 * returned value is the source configuration flag, and it is set to '1'
734 * when CYCLE_COUNTER alternative source is used.
735 *
736 * Return: the actual internally configured hysteresis field value.
737 */
738 u32 kbase_csf_firmware_set_gpu_idle_hysteresis_time(struct kbase_device *kbdev, u32 dur);
739
740 /**
741 * kbase_csf_firmware_get_mcu_core_pwroff_time - Get the MCU core power-off
742 * time value
743 *
744 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
745 *
746 * Return: the internally recorded MCU core power-off (nominal) value. The unit
747 * of the value is in micro-seconds.
748 */
749 u32 kbase_csf_firmware_get_mcu_core_pwroff_time(struct kbase_device *kbdev);
750
751 /**
752 * kbase_csf_firmware_set_mcu_core_pwroff_time - Set the MCU core power-off
753 * time value
754 *
755 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
756 * @dur: The duration value (unit: micro-seconds) for configuring MCU
757 * core power-off timer, when the shader cores' power
758 * transitions are delegated to the MCU (normal operational
759 * mode)
760 *
761 * The supplied value will be recorded internally without any change. But the
762 * actual field value will be subject to core power-off timer source frequency
763 * scaling and maximum value limiting. The default source will be
764 * SYSTEM_TIMESTAMP counter. But in case the platform is not able to supply it,
765 * the GPU CYCLE_COUNTER source will be used as an alternative. Bit-31 on the
766 * returned value is the source configuration flag, and it is set to '1'
767 * when CYCLE_COUNTER alternative source is used.
768 *
769 * The configured MCU core power-off timer will only have effect when the host
770 * driver has delegated the shader cores' power management to MCU.
771 *
772 * Return: the actual internal core power-off timer value in register defined
773 * format.
774 */
775 u32 kbase_csf_firmware_set_mcu_core_pwroff_time(struct kbase_device *kbdev, u32 dur);
776
777 /**
778 * kbase_csf_interface_version - Helper function to build the full firmware
779 * interface version in a format compatible with
780 * with GLB_VERSION register
781 *
782 * @major: major version of csf interface
783 * @minor: minor version of csf interface
784 * @patch: patch version of csf interface
785 *
786 * Return: firmware interface version
787 */
kbase_csf_interface_version(u32 major,u32 minor,u32 patch)788 static inline u32 kbase_csf_interface_version(u32 major, u32 minor, u32 patch)
789 {
790 return ((major << GLB_VERSION_MAJOR_SHIFT) |
791 (minor << GLB_VERSION_MINOR_SHIFT) |
792 (patch << GLB_VERSION_PATCH_SHIFT));
793 }
794
795 /**
796 * kbase_csf_trigger_firmware_config_update - Send a firmware config update.
797 *
798 * @kbdev: Instance of a GPU platform device that implements a CSF interface.
799 *
800 * Any changes done to firmware configuration entry or tracebuffer entry
801 * requires a GPU silent reset to reflect the configuration changes
802 * requested, but if Firmware.header.entry.bit(30) is set then we can request a
803 * FIRMWARE_CONFIG_UPDATE rather than doing a silent reset.
804 *
805 * Return: 0 if success, or negative error code on failure.
806 */
807 int kbase_csf_trigger_firmware_config_update(struct kbase_device *kbdev);
808 #endif
809