1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */
3
4 #include <linux/pci.h>
5 #include <linux/vmalloc.h>
6
7 #include "core.h"
8
9 static BLOCKING_NOTIFIER_HEAD(pds_notify_chain);
10
pdsc_register_notify(struct notifier_block * nb)11 int pdsc_register_notify(struct notifier_block *nb)
12 {
13 return blocking_notifier_chain_register(&pds_notify_chain, nb);
14 }
15 EXPORT_SYMBOL_GPL(pdsc_register_notify);
16
pdsc_unregister_notify(struct notifier_block * nb)17 void pdsc_unregister_notify(struct notifier_block *nb)
18 {
19 blocking_notifier_chain_unregister(&pds_notify_chain, nb);
20 }
21 EXPORT_SYMBOL_GPL(pdsc_unregister_notify);
22
pdsc_notify(unsigned long event,void * data)23 void pdsc_notify(unsigned long event, void *data)
24 {
25 blocking_notifier_call_chain(&pds_notify_chain, event, data);
26 }
27
pdsc_intr_free(struct pdsc * pdsc,int index)28 void pdsc_intr_free(struct pdsc *pdsc, int index)
29 {
30 struct pdsc_intr_info *intr_info;
31
32 if (index >= pdsc->nintrs || index < 0) {
33 WARN(true, "bad intr index %d\n", index);
34 return;
35 }
36
37 intr_info = &pdsc->intr_info[index];
38 if (!intr_info->vector)
39 return;
40 dev_dbg(pdsc->dev, "%s: idx %d vec %d name %s\n",
41 __func__, index, intr_info->vector, intr_info->name);
42
43 pds_core_intr_mask(&pdsc->intr_ctrl[index], PDS_CORE_INTR_MASK_SET);
44 pds_core_intr_clean(&pdsc->intr_ctrl[index]);
45
46 free_irq(intr_info->vector, intr_info->data);
47
48 memset(intr_info, 0, sizeof(*intr_info));
49 }
50
pdsc_intr_alloc(struct pdsc * pdsc,char * name,irq_handler_t handler,void * data)51 int pdsc_intr_alloc(struct pdsc *pdsc, char *name,
52 irq_handler_t handler, void *data)
53 {
54 struct pdsc_intr_info *intr_info;
55 unsigned int index;
56 int err;
57
58 /* Find the first available interrupt */
59 for (index = 0; index < pdsc->nintrs; index++)
60 if (!pdsc->intr_info[index].vector)
61 break;
62 if (index >= pdsc->nintrs) {
63 dev_warn(pdsc->dev, "%s: no intr, index=%d nintrs=%d\n",
64 __func__, index, pdsc->nintrs);
65 return -ENOSPC;
66 }
67
68 pds_core_intr_clean_flags(&pdsc->intr_ctrl[index],
69 PDS_CORE_INTR_CRED_RESET_COALESCE);
70
71 intr_info = &pdsc->intr_info[index];
72
73 intr_info->index = index;
74 intr_info->data = data;
75 strscpy(intr_info->name, name, sizeof(intr_info->name));
76
77 /* Get the OS vector number for the interrupt */
78 err = pci_irq_vector(pdsc->pdev, index);
79 if (err < 0) {
80 dev_err(pdsc->dev, "failed to get intr vector index %d: %pe\n",
81 index, ERR_PTR(err));
82 goto err_out_free_intr;
83 }
84 intr_info->vector = err;
85
86 /* Init the device's intr mask */
87 pds_core_intr_clean(&pdsc->intr_ctrl[index]);
88 pds_core_intr_mask_assert(&pdsc->intr_ctrl[index], 1);
89 pds_core_intr_mask(&pdsc->intr_ctrl[index], PDS_CORE_INTR_MASK_SET);
90
91 /* Register the isr with a name */
92 err = request_irq(intr_info->vector, handler, 0, intr_info->name, data);
93 if (err) {
94 dev_err(pdsc->dev, "failed to get intr irq vector %d: %pe\n",
95 intr_info->vector, ERR_PTR(err));
96 goto err_out_free_intr;
97 }
98
99 return index;
100
101 err_out_free_intr:
102 pdsc_intr_free(pdsc, index);
103 return err;
104 }
105
pdsc_qcq_intr_free(struct pdsc * pdsc,struct pdsc_qcq * qcq)106 static void pdsc_qcq_intr_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)
107 {
108 if (!(qcq->flags & PDS_CORE_QCQ_F_INTR) ||
109 qcq->intx == PDS_CORE_INTR_INDEX_NOT_ASSIGNED)
110 return;
111
112 pdsc_intr_free(pdsc, qcq->intx);
113 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;
114 }
115
pdsc_qcq_intr_alloc(struct pdsc * pdsc,struct pdsc_qcq * qcq)116 static int pdsc_qcq_intr_alloc(struct pdsc *pdsc, struct pdsc_qcq *qcq)
117 {
118 char name[PDSC_INTR_NAME_MAX_SZ];
119 int index;
120
121 if (!(qcq->flags & PDS_CORE_QCQ_F_INTR)) {
122 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;
123 return 0;
124 }
125
126 snprintf(name, sizeof(name), "%s-%d-%s",
127 PDS_CORE_DRV_NAME, pdsc->pdev->bus->number, qcq->q.name);
128 index = pdsc_intr_alloc(pdsc, name, pdsc_adminq_isr, pdsc);
129 if (index < 0)
130 return index;
131 qcq->intx = index;
132
133 return 0;
134 }
135
pdsc_qcq_free(struct pdsc * pdsc,struct pdsc_qcq * qcq)136 void pdsc_qcq_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)
137 {
138 struct device *dev = pdsc->dev;
139
140 if (!(qcq && qcq->pdsc))
141 return;
142
143 pdsc_debugfs_del_qcq(qcq);
144
145 pdsc_qcq_intr_free(pdsc, qcq);
146
147 if (qcq->q_base)
148 dma_free_coherent(dev, qcq->q_size,
149 qcq->q_base, qcq->q_base_pa);
150
151 if (qcq->cq_base)
152 dma_free_coherent(dev, qcq->cq_size,
153 qcq->cq_base, qcq->cq_base_pa);
154
155 if (qcq->cq.info)
156 vfree(qcq->cq.info);
157
158 if (qcq->q.info)
159 vfree(qcq->q.info);
160
161 memset(qcq, 0, sizeof(*qcq));
162 }
163
pdsc_q_map(struct pdsc_queue * q,void * base,dma_addr_t base_pa)164 static void pdsc_q_map(struct pdsc_queue *q, void *base, dma_addr_t base_pa)
165 {
166 struct pdsc_q_info *cur;
167 unsigned int i;
168
169 q->base = base;
170 q->base_pa = base_pa;
171
172 for (i = 0, cur = q->info; i < q->num_descs; i++, cur++) {
173 cur->desc = base + (i * q->desc_size);
174 init_completion(&cur->completion);
175 }
176 }
177
pdsc_cq_map(struct pdsc_cq * cq,void * base,dma_addr_t base_pa)178 static void pdsc_cq_map(struct pdsc_cq *cq, void *base, dma_addr_t base_pa)
179 {
180 struct pdsc_cq_info *cur;
181 unsigned int i;
182
183 cq->base = base;
184 cq->base_pa = base_pa;
185
186 for (i = 0, cur = cq->info; i < cq->num_descs; i++, cur++)
187 cur->comp = base + (i * cq->desc_size);
188 }
189
pdsc_qcq_alloc(struct pdsc * pdsc,unsigned int type,unsigned int index,const char * name,unsigned int flags,unsigned int num_descs,unsigned int desc_size,unsigned int cq_desc_size,unsigned int pid,struct pdsc_qcq * qcq)190 int pdsc_qcq_alloc(struct pdsc *pdsc, unsigned int type, unsigned int index,
191 const char *name, unsigned int flags, unsigned int num_descs,
192 unsigned int desc_size, unsigned int cq_desc_size,
193 unsigned int pid, struct pdsc_qcq *qcq)
194 {
195 struct device *dev = pdsc->dev;
196 void *q_base, *cq_base;
197 dma_addr_t cq_base_pa;
198 dma_addr_t q_base_pa;
199 int err;
200
201 qcq->q.info = vcalloc(num_descs, sizeof(*qcq->q.info));
202 if (!qcq->q.info) {
203 err = -ENOMEM;
204 goto err_out;
205 }
206
207 qcq->pdsc = pdsc;
208 qcq->flags = flags;
209 INIT_WORK(&qcq->work, pdsc_work_thread);
210
211 qcq->q.type = type;
212 qcq->q.index = index;
213 qcq->q.num_descs = num_descs;
214 qcq->q.desc_size = desc_size;
215 qcq->q.tail_idx = 0;
216 qcq->q.head_idx = 0;
217 qcq->q.pid = pid;
218 snprintf(qcq->q.name, sizeof(qcq->q.name), "%s%u", name, index);
219
220 err = pdsc_qcq_intr_alloc(pdsc, qcq);
221 if (err)
222 goto err_out_free_q_info;
223
224 qcq->cq.info = vcalloc(num_descs, sizeof(*qcq->cq.info));
225 if (!qcq->cq.info) {
226 err = -ENOMEM;
227 goto err_out_free_irq;
228 }
229
230 qcq->cq.bound_intr = &pdsc->intr_info[qcq->intx];
231 qcq->cq.num_descs = num_descs;
232 qcq->cq.desc_size = cq_desc_size;
233 qcq->cq.tail_idx = 0;
234 qcq->cq.done_color = 1;
235
236 if (flags & PDS_CORE_QCQ_F_NOTIFYQ) {
237 /* q & cq need to be contiguous in case of notifyq */
238 qcq->q_size = PDS_PAGE_SIZE +
239 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE) +
240 ALIGN(num_descs * cq_desc_size, PDS_PAGE_SIZE);
241 qcq->q_base = dma_alloc_coherent(dev,
242 qcq->q_size + qcq->cq_size,
243 &qcq->q_base_pa,
244 GFP_KERNEL);
245 if (!qcq->q_base) {
246 err = -ENOMEM;
247 goto err_out_free_cq_info;
248 }
249 q_base = PTR_ALIGN(qcq->q_base, PDS_PAGE_SIZE);
250 q_base_pa = ALIGN(qcq->q_base_pa, PDS_PAGE_SIZE);
251 pdsc_q_map(&qcq->q, q_base, q_base_pa);
252
253 cq_base = PTR_ALIGN(q_base +
254 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),
255 PDS_PAGE_SIZE);
256 cq_base_pa = ALIGN(qcq->q_base_pa +
257 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),
258 PDS_PAGE_SIZE);
259
260 } else {
261 /* q DMA descriptors */
262 qcq->q_size = PDS_PAGE_SIZE + (num_descs * desc_size);
263 qcq->q_base = dma_alloc_coherent(dev, qcq->q_size,
264 &qcq->q_base_pa,
265 GFP_KERNEL);
266 if (!qcq->q_base) {
267 err = -ENOMEM;
268 goto err_out_free_cq_info;
269 }
270 q_base = PTR_ALIGN(qcq->q_base, PDS_PAGE_SIZE);
271 q_base_pa = ALIGN(qcq->q_base_pa, PDS_PAGE_SIZE);
272 pdsc_q_map(&qcq->q, q_base, q_base_pa);
273
274 /* cq DMA descriptors */
275 qcq->cq_size = PDS_PAGE_SIZE + (num_descs * cq_desc_size);
276 qcq->cq_base = dma_alloc_coherent(dev, qcq->cq_size,
277 &qcq->cq_base_pa,
278 GFP_KERNEL);
279 if (!qcq->cq_base) {
280 err = -ENOMEM;
281 goto err_out_free_q;
282 }
283 cq_base = PTR_ALIGN(qcq->cq_base, PDS_PAGE_SIZE);
284 cq_base_pa = ALIGN(qcq->cq_base_pa, PDS_PAGE_SIZE);
285 }
286
287 pdsc_cq_map(&qcq->cq, cq_base, cq_base_pa);
288 qcq->cq.bound_q = &qcq->q;
289
290 pdsc_debugfs_add_qcq(pdsc, qcq);
291
292 return 0;
293
294 err_out_free_q:
295 dma_free_coherent(dev, qcq->q_size, qcq->q_base, qcq->q_base_pa);
296 err_out_free_cq_info:
297 vfree(qcq->cq.info);
298 err_out_free_irq:
299 pdsc_qcq_intr_free(pdsc, qcq);
300 err_out_free_q_info:
301 vfree(qcq->q.info);
302 memset(qcq, 0, sizeof(*qcq));
303 err_out:
304 dev_err(dev, "qcq alloc of %s%d failed %d\n", name, index, err);
305 return err;
306 }
307
pdsc_core_init(struct pdsc * pdsc)308 static int pdsc_core_init(struct pdsc *pdsc)
309 {
310 union pds_core_dev_comp comp = {};
311 union pds_core_dev_cmd cmd = {
312 .init.opcode = PDS_CORE_CMD_INIT,
313 };
314 struct pds_core_dev_init_data_out cido;
315 struct pds_core_dev_init_data_in cidi;
316 u32 dbid_count;
317 u32 dbpage_num;
318 size_t sz;
319 int err;
320
321 cidi.adminq_q_base = cpu_to_le64(pdsc->adminqcq.q_base_pa);
322 cidi.adminq_cq_base = cpu_to_le64(pdsc->adminqcq.cq_base_pa);
323 cidi.notifyq_cq_base = cpu_to_le64(pdsc->notifyqcq.cq.base_pa);
324 cidi.flags = cpu_to_le32(PDS_CORE_QINIT_F_IRQ | PDS_CORE_QINIT_F_ENA);
325 cidi.intr_index = cpu_to_le16(pdsc->adminqcq.intx);
326 cidi.adminq_ring_size = ilog2(pdsc->adminqcq.q.num_descs);
327 cidi.notifyq_ring_size = ilog2(pdsc->notifyqcq.q.num_descs);
328
329 mutex_lock(&pdsc->devcmd_lock);
330
331 sz = min_t(size_t, sizeof(cidi), sizeof(pdsc->cmd_regs->data));
332 memcpy_toio(&pdsc->cmd_regs->data, &cidi, sz);
333
334 err = pdsc_devcmd_locked(pdsc, &cmd, &comp, pdsc->devcmd_timeout);
335 if (!err) {
336 sz = min_t(size_t, sizeof(cido), sizeof(pdsc->cmd_regs->data));
337 memcpy_fromio(&cido, &pdsc->cmd_regs->data, sz);
338 }
339
340 mutex_unlock(&pdsc->devcmd_lock);
341 if (err) {
342 dev_err(pdsc->dev, "Device init command failed: %pe\n",
343 ERR_PTR(err));
344 return err;
345 }
346
347 pdsc->hw_index = le32_to_cpu(cido.core_hw_index);
348
349 dbid_count = le32_to_cpu(pdsc->dev_ident.ndbpgs_per_lif);
350 dbpage_num = pdsc->hw_index * dbid_count;
351 pdsc->kern_dbpage = pdsc_map_dbpage(pdsc, dbpage_num);
352 if (!pdsc->kern_dbpage) {
353 dev_err(pdsc->dev, "Cannot map dbpage, aborting\n");
354 return -ENOMEM;
355 }
356
357 pdsc->adminqcq.q.hw_type = cido.adminq_hw_type;
358 pdsc->adminqcq.q.hw_index = le32_to_cpu(cido.adminq_hw_index);
359 pdsc->adminqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc->adminqcq.q.hw_index);
360
361 pdsc->notifyqcq.q.hw_type = cido.notifyq_hw_type;
362 pdsc->notifyqcq.q.hw_index = le32_to_cpu(cido.notifyq_hw_index);
363 pdsc->notifyqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc->notifyqcq.q.hw_index);
364
365 pdsc->last_eid = 0;
366
367 return err;
368 }
369
370 static struct pdsc_viftype pdsc_viftype_defaults[] = {
371 [PDS_DEV_TYPE_VDPA] = { .name = PDS_DEV_TYPE_VDPA_STR,
372 .vif_id = PDS_DEV_TYPE_VDPA,
373 .dl_id = DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET },
374 [PDS_DEV_TYPE_MAX] = {}
375 };
376
pdsc_viftypes_init(struct pdsc * pdsc)377 static int pdsc_viftypes_init(struct pdsc *pdsc)
378 {
379 enum pds_core_vif_types vt;
380
381 pdsc->viftype_status = kzalloc(sizeof(pdsc_viftype_defaults),
382 GFP_KERNEL);
383 if (!pdsc->viftype_status)
384 return -ENOMEM;
385
386 for (vt = 0; vt < PDS_DEV_TYPE_MAX; vt++) {
387 bool vt_support;
388
389 if (!pdsc_viftype_defaults[vt].name)
390 continue;
391
392 /* Grab the defaults */
393 pdsc->viftype_status[vt] = pdsc_viftype_defaults[vt];
394
395 /* See what the Core device has for support */
396 vt_support = !!le16_to_cpu(pdsc->dev_ident.vif_types[vt]);
397 dev_dbg(pdsc->dev, "VIF %s is %ssupported\n",
398 pdsc->viftype_status[vt].name,
399 vt_support ? "" : "not ");
400
401 pdsc->viftype_status[vt].supported = vt_support;
402 }
403
404 return 0;
405 }
406
pdsc_setup(struct pdsc * pdsc,bool init)407 int pdsc_setup(struct pdsc *pdsc, bool init)
408 {
409 int numdescs;
410 int err;
411
412 err = pdsc_dev_init(pdsc);
413 if (err)
414 return err;
415
416 numdescs = PDSC_ADMINQ_MAX_LENGTH;
417 err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_ADMINQ, 0, "adminq",
418 PDS_CORE_QCQ_F_CORE | PDS_CORE_QCQ_F_INTR,
419 numdescs,
420 sizeof(union pds_core_adminq_cmd),
421 sizeof(union pds_core_adminq_comp),
422 0, &pdsc->adminqcq);
423 if (err)
424 goto err_out_teardown;
425
426 err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_NOTIFYQ, 0, "notifyq",
427 PDS_CORE_QCQ_F_NOTIFYQ,
428 PDSC_NOTIFYQ_LENGTH,
429 sizeof(struct pds_core_notifyq_cmd),
430 sizeof(union pds_core_notifyq_comp),
431 0, &pdsc->notifyqcq);
432 if (err)
433 goto err_out_teardown;
434
435 /* NotifyQ rides on the AdminQ interrupt */
436 pdsc->notifyqcq.intx = pdsc->adminqcq.intx;
437
438 /* Set up the Core with the AdminQ and NotifyQ info */
439 err = pdsc_core_init(pdsc);
440 if (err)
441 goto err_out_teardown;
442
443 /* Set up the VIFs */
444 err = pdsc_viftypes_init(pdsc);
445 if (err)
446 goto err_out_teardown;
447
448 if (init)
449 pdsc_debugfs_add_viftype(pdsc);
450
451 refcount_set(&pdsc->adminq_refcnt, 1);
452 clear_bit(PDSC_S_FW_DEAD, &pdsc->state);
453 return 0;
454
455 err_out_teardown:
456 pdsc_teardown(pdsc, init);
457 return err;
458 }
459
pdsc_teardown(struct pdsc * pdsc,bool removing)460 void pdsc_teardown(struct pdsc *pdsc, bool removing)
461 {
462 int i;
463
464 if (!pdsc->pdev->is_virtfn)
465 pdsc_devcmd_reset(pdsc);
466 if (pdsc->adminqcq.work.func)
467 cancel_work_sync(&pdsc->adminqcq.work);
468 pdsc_qcq_free(pdsc, &pdsc->notifyqcq);
469 pdsc_qcq_free(pdsc, &pdsc->adminqcq);
470
471 kfree(pdsc->viftype_status);
472 pdsc->viftype_status = NULL;
473
474 if (pdsc->intr_info) {
475 for (i = 0; i < pdsc->nintrs; i++)
476 pdsc_intr_free(pdsc, i);
477
478 kfree(pdsc->intr_info);
479 pdsc->intr_info = NULL;
480 pdsc->nintrs = 0;
481 }
482
483 if (pdsc->kern_dbpage) {
484 iounmap(pdsc->kern_dbpage);
485 pdsc->kern_dbpage = NULL;
486 }
487
488 pci_free_irq_vectors(pdsc->pdev);
489 set_bit(PDSC_S_FW_DEAD, &pdsc->state);
490 }
491
pdsc_start(struct pdsc * pdsc)492 int pdsc_start(struct pdsc *pdsc)
493 {
494 pds_core_intr_mask(&pdsc->intr_ctrl[pdsc->adminqcq.intx],
495 PDS_CORE_INTR_MASK_CLEAR);
496
497 return 0;
498 }
499
pdsc_stop(struct pdsc * pdsc)500 void pdsc_stop(struct pdsc *pdsc)
501 {
502 int i;
503
504 if (!pdsc->intr_info)
505 return;
506
507 /* Mask interrupts that are in use */
508 for (i = 0; i < pdsc->nintrs; i++)
509 if (pdsc->intr_info[i].vector)
510 pds_core_intr_mask(&pdsc->intr_ctrl[i],
511 PDS_CORE_INTR_MASK_SET);
512 }
513
pdsc_adminq_wait_and_dec_once_unused(struct pdsc * pdsc)514 static void pdsc_adminq_wait_and_dec_once_unused(struct pdsc *pdsc)
515 {
516 /* The driver initializes the adminq_refcnt to 1 when the adminq is
517 * allocated and ready for use. Other users/requesters will increment
518 * the refcnt while in use. If the refcnt is down to 1 then the adminq
519 * is not in use and the refcnt can be cleared and adminq freed. Before
520 * calling this function the driver will set PDSC_S_FW_DEAD, which
521 * prevent subsequent attempts to use the adminq and increment the
522 * refcnt to fail. This guarantees that this function will eventually
523 * exit.
524 */
525 while (!refcount_dec_if_one(&pdsc->adminq_refcnt)) {
526 dev_dbg_ratelimited(pdsc->dev, "%s: adminq in use\n",
527 __func__);
528 cpu_relax();
529 }
530 }
531
pdsc_fw_down(struct pdsc * pdsc)532 void pdsc_fw_down(struct pdsc *pdsc)
533 {
534 union pds_core_notifyq_comp reset_event = {
535 .reset.ecode = cpu_to_le16(PDS_EVENT_RESET),
536 .reset.state = 0,
537 };
538
539 if (test_and_set_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
540 dev_warn(pdsc->dev, "%s: already happening\n", __func__);
541 return;
542 }
543
544 if (pdsc->pdev->is_virtfn)
545 return;
546
547 pdsc_adminq_wait_and_dec_once_unused(pdsc);
548
549 /* Notify clients of fw_down */
550 if (pdsc->fw_reporter)
551 devlink_health_report(pdsc->fw_reporter, "FW down reported", pdsc);
552 pdsc_notify(PDS_EVENT_RESET, &reset_event);
553
554 pdsc_stop(pdsc);
555 pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);
556 }
557
pdsc_fw_up(struct pdsc * pdsc)558 void pdsc_fw_up(struct pdsc *pdsc)
559 {
560 union pds_core_notifyq_comp reset_event = {
561 .reset.ecode = cpu_to_le16(PDS_EVENT_RESET),
562 .reset.state = 1,
563 };
564 int err;
565
566 if (!test_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
567 dev_err(pdsc->dev, "%s: fw not dead\n", __func__);
568 return;
569 }
570
571 if (pdsc->pdev->is_virtfn) {
572 clear_bit(PDSC_S_FW_DEAD, &pdsc->state);
573 return;
574 }
575
576 err = pdsc_setup(pdsc, PDSC_SETUP_RECOVERY);
577 if (err)
578 goto err_out;
579
580 err = pdsc_start(pdsc);
581 if (err)
582 goto err_out;
583
584 /* Notify clients of fw_up */
585 pdsc->fw_recoveries++;
586 if (pdsc->fw_reporter)
587 devlink_health_reporter_state_update(pdsc->fw_reporter,
588 DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);
589 pdsc_notify(PDS_EVENT_RESET, &reset_event);
590
591 return;
592
593 err_out:
594 pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);
595 }
596
pdsc_health_thread(struct work_struct * work)597 void pdsc_health_thread(struct work_struct *work)
598 {
599 struct pdsc *pdsc = container_of(work, struct pdsc, health_work);
600 unsigned long mask;
601 bool healthy;
602
603 mutex_lock(&pdsc->config_lock);
604
605 /* Don't do a check when in a transition state */
606 mask = BIT_ULL(PDSC_S_INITING_DRIVER) |
607 BIT_ULL(PDSC_S_STOPPING_DRIVER);
608 if (pdsc->state & mask)
609 goto out_unlock;
610
611 healthy = pdsc_is_fw_good(pdsc);
612 dev_dbg(pdsc->dev, "%s: health %d fw_status %#02x fw_heartbeat %d\n",
613 __func__, healthy, pdsc->fw_status, pdsc->last_hb);
614
615 if (test_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
616 if (healthy)
617 pdsc_fw_up(pdsc);
618 } else {
619 if (!healthy)
620 pdsc_fw_down(pdsc);
621 }
622
623 pdsc->fw_generation = pdsc->fw_status & PDS_CORE_FW_STS_F_GENERATION;
624
625 out_unlock:
626 mutex_unlock(&pdsc->config_lock);
627 }
628