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Searched defs:reg (Results 1 – 25 of 175) sorted by relevance

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/arkcompiler/runtime_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.cpp25 for (size_t reg = priority_reg; reg < reg_mask.GetSize(); ++reg) { in SetMask() local
33 for (size_t reg = 0; reg < priority_reg; ++reg) { in SetMask() local
41 for (size_t reg = 0; reg < reg_mask.GetSize(); ++reg) { in SetMask() local
53 for (size_t reg = 0; reg < first_callee_reg; ++reg) { in SetCallerFirstMask() local
60 for (size_t reg = last_callee_reg + 1; reg < reg_mask.GetSize(); ++reg) { in SetCallerFirstMask() local
68 for (size_t reg = first_callee_reg; reg <= last_callee_reg; ++reg) { in SetCallerFirstMask() local
76 for (size_t reg = 0; reg < reg_mask.GetSize(); ++reg) { in SetCallerFirstMask() local
93 bool RegisterMap::IsRegAvailable(Register reg, Arch arch) const in IsRegAvailable()
/arkcompiler/runtime_core/static_core/runtime/arch/
Dasm_support.h54 #define CFI_DEF_CFA(reg, offset) .cfi_def_cfa reg, (offset) argument
58 #define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg argument
60 #define CFI_REL_OFFSET(reg, offset) .cfi_rel_offset reg, (offset) argument
62 #define CFI_OFFSET(reg, offset) .cfi_offset reg, (offset) argument
68 #define CFI_RESTORE(reg) .cfi_restore reg argument
70 #define CFI_REGISTER(reg, old_reg) .cfi_register reg, old_reg argument
79 #define CFI_DEF_CFA(reg, offset) argument
83 #define CFI_DEF_CFA_REGISTER(reg) argument
85 #define CFI_REL_OFFSET(reg, offset) argument
87 #define CFI_OFFSET(reg, offset) argument
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/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.cpp27 for (size_t reg = priorityReg; reg < maskSize; ++reg) { in SetMask() local
35 for (size_t reg = 0; reg < priorityReg; ++reg) { in SetMask() local
51 for (size_t reg = 0; reg < firstCalleeReg; ++reg) { in SetCallerFirstMask() local
59 for (size_t reg = lastCalleeReg + 1; reg < maskSize; ++reg) { in SetCallerFirstMask() local
67 for (size_t reg = firstCalleeReg; reg <= lastCalleeReg; ++reg) { in SetCallerFirstMask() local
80 for (size_t reg = 0; reg < maskSize; ++reg) { in MapUnavailableRegisters() local
97 bool RegisterMap::IsRegAvailable(Register reg, Arch arch) const in IsRegAvailable()
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/
Dasm_assembler.cpp577 void AsmAssembler::Mov(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Mov()
586 void AsmAssembler::Mov(InsnSize insnSize, const Mem &mem, Reg reg) in Mov()
595 void AsmAssembler::Mov(InsnSize insnSize, Reg reg, const Mem &mem) in Mov()
625 void AsmAssembler::MovF(const Mem &mem, Reg reg, bool isSingle) in MovF()
636 void AsmAssembler::MovF(Reg reg, const Mem &mem, bool isSingle) in MovF()
648 void AsmAssembler::Movabs(const ImmOpnd &immOpnd, Reg reg) in Movabs()
656 void AsmAssembler::Movabs(int64 symIdx, Reg reg) in Movabs()
665 void AsmAssembler::Push(InsnSize insnSize, Reg reg) in Push()
675 void AsmAssembler::Pop(InsnSize insnSize, Reg reg) in Pop()
685 void AsmAssembler::Lea(InsnSize insnSize, const Mem &mem, Reg reg) in Lea()
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Delf_assembler.cpp320 void ElfAssembler::OpReg(Reg reg, uint8 opCode1, uint8 opCode2, uint8 modReg) in OpReg()
416 void ElfAssembler::OpRM(Reg reg, const Mem &mem, uint8 opCode1, uint8 opCode2, bool extInsn) in OpRM()
440 void ElfAssembler::OpImmAndReg(const ImmOpnd &immOpnd, Reg reg, uint8 opCode, uint8 modReg) in OpImmAndReg()
504 void ElfAssembler::MovRegAndDisp(Reg reg, const Mem &mem, uint8 opCode) in MovRegAndDisp()
532 void ElfAssembler::OpPushPop(Reg reg, uint8 code) in OpPushPop()
1301 void ElfAssembler::Mov(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Mov()
1329 void ElfAssembler::Mov(InsnSize insnSize, const Mem &mem, Reg reg) in Mov()
1338 void ElfAssembler::Mov(InsnSize insnSize, Reg reg, const Mem &mem) in Mov()
1384 void ElfAssembler::MovF(const Mem &mem, Reg reg, bool isSingle) in MovF()
1394 void ElfAssembler::MovF(Reg reg, const Mem &mem, bool isSingle) in MovF()
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/arkcompiler/runtime_core/static_core/runtime/fibers/arch/aarch64/
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S32 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
33 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/static_core/runtime/fibers/arch/arm/
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S32 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
33 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/static_core/runtime/fibers/arch/amd64/
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S33 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
34 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/static_core/runtime/tests/
Dstack_walker_test.cpp111 int32_t ToCalleeRegister(size_t reg) in ToCalleeRegister()
117 int32_t ToCalleeFpRegister(size_t reg) in ToCalleeFpRegister()
165 success = walker.IterateVRegsWithInfo([&wasSet, &walker](const auto &regInfo, const auto &reg) { in WalkIfZeroRun()
178 success = walker.IterateVRegsWithInfo([&walker](const auto &regInfo, const auto &reg) { in WalkIfZeroRun()
189 success = walker.IterateVRegsWithInfo([&walker](const auto &regInfo, const auto &reg) { in WalkIfZeroRun()
205 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in WalkIfOneRun()
215 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in WalkIfOneRun()
225 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in WalkIfOneRun()
342 const VRegRef &reg) in FirstRunModifyVregs()
363 …atic bool CheckVregs(int *regIndex, ObjectHeader *obj, const VRegInfo &regInfo, const VRegRef &reg) in CheckVregs()
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/arkcompiler/ets_runtime/test/moduletest/regexp/
Dregexp.js24 let reg= /ab|cd||/ variable
754 let reg = new RegExp("/"); variable
757 reg = new RegExp("\/[a-z]*>"); variable
760 reg = new RegExp("\\/[a-z]*>"); variable
763 reg = new RegExp("\\\/[a-z]*>"); variable
767 reg = new RegExp("\\\\/[a-z]*>"); variable
770 reg = new RegExp("\\\\\/[a-z]*>"); variable
773 reg = new RegExp("\\\\\\/[a-z]*>"); variable
776 reg = new RegExp("\\\\\\\/[a-z]*>"); variable
783 let reg = new RegExp(pattern); variable
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/arkcompiler/runtime_core/static_core/compiler/tests/aarch64/
Dregister64_test.cpp70 for (auto reg : regs) { in TEST_F() local
82 for (auto reg : regs) { in TEST_F() local
88 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/tests/aarch32/
Dregister32_test.cpp73 for (auto reg : regs) { in TEST_F() local
85 for (auto reg : regs) { in TEST_F() local
91 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/tests/amd64/
Dregister64_test.cpp73 for (auto reg : regs) { in TEST_F() local
85 for (auto reg : regs) { in TEST_F() local
91 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/
Dtarget.h56 static inline vixl::aarch64::Register VixlRegCaseScalar(Reg reg) in VixlRegCaseScalar()
70 static inline vixl::aarch64::Register VixlReg(Reg reg) in VixlReg()
85 static inline vixl::aarch64::Register VixlRegCaseScalar(Reg reg, const uint8_t size) in VixlRegCaseScalar()
92 static inline vixl::aarch64::Register VixlReg(Reg reg, const uint8_t size) in VixlReg()
/arkcompiler/runtime_core/compiler/tests/aarch32/
Dregister32_test.cpp76 for (auto reg : regs) { in TEST_F() local
88 for (auto reg : regs) { in TEST_F() local
94 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/compiler/tests/aarch64/
Dregister64_test.cpp73 for (auto reg : regs) { in TEST_F() local
85 for (auto reg : regs) { in TEST_F() local
91 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/compiler/tests/amd64/
Dregister64_test.cpp76 for (auto reg : regs) { in TEST_F() local
88 for (auto reg : regs) { in TEST_F() local
94 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/x64/
Dassembler_x64.h186 void EmitRexPrefix(Register reg, Register rm) in EmitRexPrefix()
193 void EmitRexPrefixl(Register reg, Register rm) in EmitRexPrefixl()
202 void EmitRexPrefix(Register reg, Operand rm) in EmitRexPrefix()
209 void EmitRexPrefixl(Register reg, Operand rm) in EmitRexPrefixl()
221 void EmitModrm(int32_t reg, Register rm) in EmitModrm()
226 void EmitModrm(Register reg, Register rm) in EmitModrm()
231 void EmitOperand(Register reg, Operand rm) in EmitOperand()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
Dslow_path.h155 void SetTmpReg(Reg reg) in SetTmpReg()
174 void SetDstReg(Reg reg) in SetDstReg()
179 void SetAddrReg(Reg reg) in SetAddrReg()
210 void SetClassReg(Reg reg) in SetClassReg()
223 void SetMethodReg(Reg reg) in SetMethodReg()

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