1 /*
2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #include "vou_graphics.h"
20 #include "hi_osal.h"
21
22 #include "hi_debug_adapt.h"
23 #include "hi_comm_vo_adapt.h"
24 #include "graphics_drv.h"
25 #include "vou.h"
26
27 vo_gfxlayer_context g_vo_gfx_layer_ctx[VO_MAX_GRAPHICS_LAYER_NUM];
28 hi_u32 g_dectect_zone = 0;
29
vou_graphics_get_layer_ctx(hi_graphic_layer gfx_layer)30 vo_gfxlayer_context *vou_graphics_get_layer_ctx(hi_graphic_layer gfx_layer)
31 {
32 return &g_vo_gfx_layer_ctx[gfx_layer];
33 }
34
35 #ifndef CONFIG_HI_VO_FB_SEPARATE
36
vo_graphics_open_layer(hi_graphic_layer layer)37 hi_s32 vo_graphics_open_layer(hi_graphic_layer layer)
38 {
39 hi_vo_dev dev;
40 hi_ulong lock_flag = 0;
41 hi_u32 layer_index;
42 vo_gfxlayer_context *gfx_layer_ctx = HI_NULL;
43 hal_disp_layer gfx_layer = HAL_DISP_LAYER_BUTT;
44 vo_dev_info *dev_ctx = HI_NULL;
45
46 graphic_drv_get_layer_id(layer, &gfx_layer);
47 if (graphic_drv_get_layer_index(gfx_layer, &layer_index) != HI_SUCCESS) {
48 vo_err_trace("gfx_layer(%u) is invalid!\n", (hi_u32)gfx_layer);
49 return HI_ERR_VO_GFX_INVALID_ID;
50 }
51
52 gfx_layer_ctx = &g_vo_gfx_layer_ctx[layer_index];
53
54 gfx_spin_lock_irqsave(&gfx_layer_ctx->spin_lock, &lock_flag);
55 if (!gfx_layer_ctx->binded) {
56 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
57 vo_err_trace("graphics layer %u has not been binded!\n", layer_index);
58 return HI_ERR_VO_GFX_NOT_BIND;
59 }
60
61 dev = gfx_layer_ctx->binded_dev;
62 dev_ctx = vo_get_dev_ctx(dev);
63 if (!dev_ctx->vo_enable) {
64 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
65 vo_err_trace("dev %d for graphics layer %u has not been enable!\n",
66 dev, layer_index);
67 return HI_ERR_VO_DEV_NOT_ENABLE;
68 }
69 gfx_layer_ctx->opened = HI_TRUE;
70
71 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
72
73 return HI_SUCCESS;
74 }
75
vou_graphics_set_callback(hi_graphic_layer layer,vo_fb_int_type type,vo_fb_int_call_back call_back,hi_void * arg)76 hi_s32 vou_graphics_set_callback(hi_graphic_layer layer, vo_fb_int_type type,
77 vo_fb_int_call_back call_back, hi_void *arg)
78 {
79 hal_disp_layer gfx_layer = HAL_DISP_LAYER_BUTT;
80
81 hi_ulong lock_flag;
82 hi_u32 layer_index;
83 hi_s32 ret = HI_SUCCESS;
84 vo_gfxlayer_context *gfx_layer_ctx = HI_NULL;
85
86 graphic_drv_get_layer_id(layer, &gfx_layer);
87 if (graphic_drv_get_layer_index(gfx_layer, &layer_index) != HI_SUCCESS) {
88 vo_err_trace("gfx_layer(%u) is invalid!\n", (hi_u32)gfx_layer);
89 return HI_ERR_VO_GFX_INVALID_ID;
90 }
91
92 gfx_layer_ctx = &g_vo_gfx_layer_ctx[layer_index];
93
94 gfx_spin_lock_irqsave(&gfx_layer_ctx->spin_lock, &lock_flag);
95 switch (type) {
96 case HIFB_INTTYPE_VO: {
97 gfx_layer_ctx->vo_call_back = (fb_int_call_back)call_back;
98 gfx_layer_ctx->vo_call_back_arg = arg;
99 break;
100 }
101 case HIFB_INTTYPE_WBC: {
102 gfx_layer_ctx->wbc_call_back = (fb_int_call_back)call_back;
103 gfx_layer_ctx->wbc_call_back_arg = arg;
104 break;
105 }
106 default: {
107 ret = HI_FAILURE;
108 break;
109 }
110 }
111 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
112
113 return ret;
114 }
115
vo_graphics_vtth_int_process(hi_vo_dev dev,hi_u32 int_status)116 hi_void vo_graphics_vtth_int_process(hi_vo_dev dev, hi_u32 int_status)
117 {
118 hi_ulong lock_flag;
119 hi_s32 i;
120 hi_bool progressvie = HI_FALSE;
121 hi_bool bottom_int = HI_FALSE;
122 fb_int_call_back vo_call_back;
123 vo_gfxlayer_context *gfx_layer_ctx = HI_NULL;
124
125 graphic_drv_get_scan_mode(dev, &progressvie);
126 graphic_drv_get_int_state(dev, &bottom_int);
127
128 for (i = 0; i < VO_MAX_GRAPHICS_LAYER_NUM; ++i) {
129 gfx_layer_ctx = &g_vo_gfx_layer_ctx[i];
130 gfx_spin_lock_irqsave(&gfx_layer_ctx->spin_lock, &lock_flag);
131 if (!gfx_layer_ctx->opened) {
132 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
133 continue;
134 }
135
136 if ((gfx_layer_ctx->binded) && (gfx_layer_ctx->binded_dev == dev)) {
137 if ((progressvie == HI_FALSE) && (bottom_int == HI_FALSE)) {
138 /* do nothing */
139 } else if (gfx_layer_ctx->vo_call_back != HI_NULL) {
140 vo_call_back = gfx_layer_ctx->vo_call_back;
141 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
142
143 vo_call_back(gfx_layer_ctx->vo_call_back_arg, &int_status);
144 continue;
145 }
146 }
147 gfx_spin_unlock_irqrestore(&gfx_layer_ctx->spin_lock, &lock_flag);
148 }
149 }
150 #endif
151
vou_graphics_lock_init(hi_void)152 hi_s32 vou_graphics_lock_init(hi_void)
153 {
154 hi_s32 ret;
155 ret = graphic_drv_lock_init();
156 return ret;
157 }
158
vou_graphics_lock_de_init(hi_void)159 hi_s32 vou_graphics_lock_de_init(hi_void)
160 {
161 hi_s32 ret;
162 ret = graphic_drv_lock_exit();
163 return ret;
164 }
165
vo_graphics_init(hi_void)166 hi_s32 vo_graphics_init(hi_void)
167 {
168 return graphic_drv_init();
169 }
170
vo_graphics_de_init(hi_void)171 hi_s32 vo_graphics_de_init(hi_void)
172 {
173 return graphic_drv_exit();
174 }
175
vou_graphics_bind_dev(hi_graphic_layer gfx_layer,hi_vo_dev dev)176 hi_s32 vou_graphics_bind_dev(hi_graphic_layer gfx_layer, hi_vo_dev dev)
177 {
178 hi_s32 ret;
179
180 ret = graphic_drv_check_graphic_bind_support(gfx_layer, dev);
181 if (ret != HI_SUCCESS) {
182 return ret;
183 }
184
185 return graphic_drv_graphic_bind_dev(gfx_layer, dev);
186 }
187
vou_graphics_un_bind_dev(hi_graphic_layer gfx_layer,hi_vo_dev dev)188 hi_s32 vou_graphics_un_bind_dev(hi_graphic_layer gfx_layer, hi_vo_dev dev)
189 {
190 hi_s32 ret;
191
192 ret = graphic_drv_check_graphic_bind_support(gfx_layer, dev);
193 if (ret != HI_SUCCESS) {
194 return ret;
195 }
196
197 return graphic_drv_graphic_un_bind_dev(gfx_layer);
198 }
199
graphic_set_dev_bg_color(hi_graphic_layer layer,hi_vo_csc_matrix csc_matrix)200 hi_s32 graphic_set_dev_bg_color(hi_graphic_layer layer, hi_vo_csc_matrix csc_matrix)
201 {
202 hi_bool bkg_rgb = HI_FALSE;
203 hi_vo_dev binded_vo_dev;
204 vo_dev_info *vo_dev_ctx = HI_NULL;
205 vo_gfxlayer_context *gfx_layer_ctx = HI_NULL;
206
207 if (csc_matrix == VO_CSC_MATRIX_IDENTITY) {
208 bkg_rgb = HI_TRUE;
209 } else {
210 bkg_rgb = HI_FALSE;
211 }
212
213 gfx_layer_ctx = vou_graphics_get_layer_ctx(layer);
214
215 binded_vo_dev = gfx_layer_ctx->binded_dev;
216 if (binded_vo_dev == HI_INVALID_VALUE) {
217 vo_err_trace("graphics layer %d is not binded to any dev!\n", layer);
218 return HI_ERR_VO_GFX_NOT_BIND;
219 }
220
221 vo_dev_ctx = vo_get_dev_ctx(binded_vo_dev);
222
223 vo_drv_set_dev_bg_color(binded_vo_dev, vo_dev_ctx->vou_attr.bg_color, bkg_rgb);
224 return HI_SUCCESS;
225 }
226
vou_graphics_set_csc(hi_u32 layer,hi_vo_csc * csc)227 hi_s32 vou_graphics_set_csc(hi_u32 layer, hi_vo_csc *csc)
228 {
229 hi_s32 ret;
230 hal_disp_layer gfx_layer;
231 hi_bool enable = HI_FALSE;
232
233 if (!graphic_drv_is_chip_support_csc()) {
234 vo_err_trace("graphics layer %u is not support to adjust csc!\n", layer);
235 return HI_ERR_VO_NOT_SUPPORT;
236 }
237
238 vo_check_null_ptr_return(csc);
239
240 ret = graphic_drv_get_hal_layer(layer, &gfx_layer);
241 if (ret != HI_SUCCESS) {
242 vo_err_trace("graphics layer %u is illegal!\n", layer);
243 return HI_ERR_VO_GFX_INVALID_ID;
244 }
245
246 enable = graphic_drv_get_layer_enable(gfx_layer);
247 if (enable == HI_FALSE) {
248 vo_err_trace("graphic layer %u is not enable, can't set CSC!\n", layer);
249 return HI_ERR_VO_NOT_PERMIT;
250 }
251
252 ret = graphic_drv_check_csc_coef(gfx_layer, csc);
253 if (ret != HI_SUCCESS) {
254 return ret;
255 }
256
257 (hi_void)memcpy_s(&g_vo_gfx_layer_ctx[layer].gfx_csc, sizeof(hi_vo_csc), csc, sizeof(hi_vo_csc));
258
259 ret = graphic_set_dev_bg_color(layer, csc->csc_matrix);
260 if (ret != HI_SUCCESS) {
261 return ret;
262 }
263
264 return graphic_drv_set_csc_coef(gfx_layer, csc, &g_vo_gfx_layer_ctx[layer].csc_param);
265 }
266
vou_graphics_get_csc(hi_u32 layer,hi_vo_csc * csc)267 hi_s32 vou_graphics_get_csc(hi_u32 layer, hi_vo_csc *csc)
268 {
269 hi_s32 ret;
270 hal_disp_layer gfx_layer;
271 hi_bool enable = HI_FALSE;
272
273 if (!graphic_drv_is_chip_support_csc()) {
274 vo_err_trace("graphics layer %u is not support to get csc!\n", layer);
275 return HI_ERR_VO_NOT_SUPPORT;
276 }
277
278 vo_check_null_ptr_return(csc);
279
280 ret = graphic_drv_get_hal_layer(layer, &gfx_layer);
281 if (ret != HI_SUCCESS) {
282 vo_err_trace("graphics layer %u is illegal!\n", layer);
283 return HI_ERR_VO_GFX_INVALID_ID;
284 }
285
286 enable = graphic_drv_get_layer_enable(gfx_layer);
287 if (enable == HI_FALSE) {
288 vo_err_trace("graphic layer %u is not enable, can't get CSC!\n", layer);
289 return HI_ERR_VO_NOT_PERMIT;
290 }
291
292 (hi_void)memcpy_s(csc, sizeof(hi_vo_csc), &g_vo_gfx_layer_ctx[layer].gfx_csc, sizeof(hi_vo_csc));
293
294 return HI_SUCCESS;
295 }
296
vou_graphics_show_proc(osal_proc_entry_t * s)297 hi_s32 vou_graphics_show_proc(osal_proc_entry_t *s)
298 {
299 hi_vo_csc csc;
300 hi_s32 dev;
301 hi_s32 i;
302 vo_dev_info *dev_ctx = HI_NULL;
303
304 graphic_drv_show_proc(s);
305
306 osal_seq_printf(s, "-----GRAPHIC LAYER CSC PARAM-----------------------------\n");
307 osal_seq_printf(s, "%s%s%s%s%s%s\n", " LAYERID", " Matrix", " Luma", " Cont", " Hue", " Satu");
308 for (i = 0; i < VO_MAX_GRAPHICS_LAYER_NUM; i++) {
309 dev = g_vo_gfx_layer_ctx[i].binded_dev;
310 dev_ctx = vo_get_dev_ctx(dev);
311 if (dev_ctx->vo_enable) {
312 csc = g_vo_gfx_layer_ctx[i].gfx_csc;
313 osal_seq_printf(s, "%8u%8u%8u%8u%8u%8u\n", i, csc.csc_matrix, csc.luma, csc.contrast,
314 csc.hue, csc.satuature);
315 }
316 }
317 osal_seq_printf(s, "\r\n");
318
319 return HI_SUCCESS;
320 }
321