| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_job.c | 33 struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched); in amdgpu_job_timedout() local
34 struct amdgpu_job *job = to_amdgpu_job(s_job); in amdgpu_job_timedout() local
36 struct amdgpu_device *adev = ring->adev; in amdgpu_job_timedout()
38 memset(&ti, 0, sizeof(struct amdgpu_task_info)); in amdgpu_job_timedout()
41 amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) { in amdgpu_job_timedout()
42 DRM_ERROR("ring %s timeout, but soft recovered\n", in amdgpu_job_timedout()
43 s_job->sched->name); in amdgpu_job_timedout()
47 amdgpu_vm_get_task_info(ring->adev, job->pasid, &ti); in amdgpu_job_timedout()
48 DRM_ERROR("ring %s timeout, signaled seq=%u, emitted seq=%u\n", in amdgpu_job_timedout()
49 job->base.sched->name, atomic_read(&ring->fence_drv.last_seq), in amdgpu_job_timedout()
[all …]
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| D | amdgpu_ib.c | 46 * command ring and the hw will fetch the commands from the IB
49 * put in IBs for execution by the requested ring.
53 * amdgpu_ib_get - request an IB (Indirect Buffer)
55 * @ring: ring index the IB is associated with
61 * Returns 0 on success, error on failure.
70 r = amdgpu_sa_bo_new(&adev->ib_pools[pool_type], in amdgpu_ib_get()
71 &ib->sa_bo, size, 256); in amdgpu_ib_get()
73 dev_err(adev->dev, "failed to get a new IB (%d)\n", r); in amdgpu_ib_get()
77 ib->ptr = amdgpu_sa_bo_cpu_addr(ib->sa_bo); in amdgpu_ib_get()
79 ib->flags = AMDGPU_IB_FLAG_EMIT_MEM_SYNC; in amdgpu_ib_get()
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| D | amdgpu_trace.h | 35 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ argument
36 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
47 __entry->did = did;
48 __entry->reg = reg;
49 __entry->value = value;
51 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
52 (unsigned long)__entry->did,
53 (unsigned long)__entry->reg,
54 (unsigned long)__entry->value)
66 __entry->did = did;
[all …]
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| D | amdgpu_ids.c | 26 #include <linux/dma-fence-array.h>
50 * amdgpu_pasid_alloc - Allocate a PASID
56 * Returns a positive integer on success. Returns %-EINVAL if bits==0.
57 * Returns %-ENOSPC if no PASID was available. Returns %-ENOMEM on
62 int pasid = -EINVAL; in amdgpu_pasid_alloc()
64 for (bits = min(bits, 31U); bits > 0; bits--) { in amdgpu_pasid_alloc()
66 1U << (bits - 1), 1U << bits, in amdgpu_pasid_alloc()
68 if (pasid != -ENOSPC) in amdgpu_pasid_alloc()
72 if (pasid >= 0) in amdgpu_pasid_alloc()
79 * amdgpu_pasid_free - Free a PASID
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_job.c | 36 struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched); in amdgpu_job_timedout() local
37 struct amdgpu_job *job = to_amdgpu_job(s_job); in amdgpu_job_timedout() local
39 struct amdgpu_device *adev = ring->adev; in amdgpu_job_timedout()
44 DRM_INFO("%s - device unplugged skipping recovery on scheduler:%s", in amdgpu_job_timedout()
45 __func__, s_job->sched->name); in amdgpu_job_timedout()
47 /* Effectively the job is aborted as the device is gone */ in amdgpu_job_timedout()
51 memset(&ti, 0, sizeof(struct amdgpu_task_info)); in amdgpu_job_timedout()
52 adev->job_hang = true; in amdgpu_job_timedout()
55 amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) { in amdgpu_job_timedout()
56 DRM_ERROR("ring %s timeout, but soft recovered\n", in amdgpu_job_timedout()
[all …]
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| D | amdgpu_ib.c | 45 * command ring and the hw will fetch the commands from the IB
48 * put in IBs for execution by the requested ring.
52 * amdgpu_ib_get - request an IB (Indirect Buffer)
62 * Returns 0 on success, error on failure.
71 r = amdgpu_sa_bo_new(&adev->ib_pools[pool_type], in amdgpu_ib_get()
72 &ib->sa_bo, size); in amdgpu_ib_get()
74 dev_err(adev->dev, "failed to get a new IB (%d)\n", r); in amdgpu_ib_get()
78 ib->ptr = amdgpu_sa_bo_cpu_addr(ib->sa_bo); in amdgpu_ib_get()
80 ib->flags = AMDGPU_IB_FLAG_EMIT_MEM_SYNC; in amdgpu_ib_get()
83 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo); in amdgpu_ib_get()
[all …]
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| D | amdgpu_ids.c | 26 #include <linux/dma-fence-array.h>
50 * amdgpu_pasid_alloc - Allocate a PASID
56 * Returns a positive integer on success. Returns %-EINVAL if bits==0.
57 * Returns %-ENOSPC if no PASID was available. Returns %-ENOMEM on
62 int pasid = -EINVAL; in amdgpu_pasid_alloc()
64 for (bits = min(bits, 31U); bits > 0; bits--) { in amdgpu_pasid_alloc()
66 1U << (bits - 1), 1U << bits, in amdgpu_pasid_alloc()
68 if (pasid != -ENOSPC) in amdgpu_pasid_alloc()
72 if (pasid >= 0) in amdgpu_pasid_alloc()
79 * amdgpu_pasid_free - Free a PASID
[all …]
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| D | amdgpu_trace.h | 35 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ argument
36 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
47 __entry->did = did;
48 __entry->reg = reg;
49 __entry->value = value;
51 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
52 (unsigned long)__entry->did,
53 (unsigned long)__entry->reg,
54 (unsigned long)__entry->value)
66 __entry->did = did;
[all …]
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| D | amdgpu_fence.c | 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
49 "amdgpu_fence", sizeof(struct amdgpu_fence), 0, in amdgpu_fence_slab_init()
52 return -ENOMEM; in amdgpu_fence_slab_init()
53 return 0; in amdgpu_fence_slab_init()
70 if (__f->base.ops == &amdgpu_fence_ops || in to_amdgpu_fence()
71 __f->base.ops == &amdgpu_job_fence_ops) in to_amdgpu_fence()
78 * amdgpu_fence_write - write a fence value
80 * @ring: ring the fence is associated with
85 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
87 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
13 major number whereas 0 represents minor number. The
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
25 reg = <0x320000 0x10000>;
26 ranges = <0 0x320000 0x10000>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
13 major number whereas 0 represents minor number. The
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
25 reg = <0x320000 0x10000>;
26 ranges = <0 0x320000 0x10000>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec6.txt | 4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
20 - compatible
23 Definition: Must include "fsl,sec-v6.0".
25 - fsl,sec-era
31 - #address-cells
37 - #size-cells
44 - reg
46 Value type: <prop-encoded-array>
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| D | fsl,sec-v4.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
21 2. Job Rings (HW interface between cores & SEC 4 registers).
25 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec6.txt | 4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
20 - compatible
23 Definition: Must include "fsl,sec-v6.0".
25 - fsl,sec-era
31 - #address-cells
37 - #size-cells
44 - reg
46 Value type: <prop-encoded-array>
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | qoriq-sec6.0-0.dtsi | 35 compatible = "fsl,sec-v6.0", "fsl,sec-v5.0",
36 "fsl,sec-v4.0";
37 fsl,sec-era = <6>;
38 #address-cells = <1>;
39 #size-cells = <1>;
42 compatible = "fsl,sec-v6.0-job-ring",
43 "fsl,sec-v5.2-job-ring",
44 "fsl,sec-v5.0-job-ring",
45 "fsl,sec-v4.4-job-ring",
46 "fsl,sec-v4.0-job-ring";
[all …]
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| D | qoriq-sec5.2-0.dtsi | 2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.2-job-ring",
[all …]
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| D | qoriq-sec5.3-0.dtsi | 2 * QorIQ Sec/Crypto 5.3 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <4>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.3-job-ring",
46 "fsl,sec-v5.0-job-ring",
[all …]
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| D | pq3-sec4.4-0.dtsi | 2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37 fsl,sec-era = <3>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges = <0x0 0x30000 0x10000>;
41 reg = <0x30000 0x10000>;
42 interrupts = <58 2 0 0>;
45 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
[all …]
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| D | qoriq-sec5.0-0.dtsi | 2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | qoriq-sec6.0-0.dtsi | 35 compatible = "fsl,sec-v6.0", "fsl,sec-v5.0",
36 "fsl,sec-v4.0";
37 fsl,sec-era = <6>;
38 #address-cells = <1>;
39 #size-cells = <1>;
42 compatible = "fsl,sec-v6.0-job-ring",
43 "fsl,sec-v5.2-job-ring",
44 "fsl,sec-v5.0-job-ring",
45 "fsl,sec-v4.4-job-ring",
46 "fsl,sec-v4.0-job-ring";
[all …]
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| D | qoriq-sec5.2-0.dtsi | 2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.2-job-ring",
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| D | qoriq-sec5.3-0.dtsi | 2 * QorIQ Sec/Crypto 5.3 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <4>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.3-job-ring",
46 "fsl,sec-v5.0-job-ring",
[all …]
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| D | pq3-sec4.4-0.dtsi | 2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37 fsl,sec-era = <3>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges = <0x0 0x30000 0x10000>;
41 reg = <0x30000 0x10000>;
42 interrupts = <58 2 0 0>;
45 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
[all …]
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| D | qoriq-sec5.0-0.dtsi | 2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ]
36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
45 compatible = "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/ |
| D | msm_ringbuffer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 static struct dma_fence *msm_job_run(struct drm_sched_job *job) in msm_job_run() argument
16 struct msm_gem_submit *submit = to_msm_submit(job); in msm_job_run()
17 struct msm_fence_context *fctx = submit->ring->fctx; in msm_job_run()
18 struct msm_gpu *gpu = submit->gpu; in msm_job_run()
19 struct msm_drm_private *priv = gpu->dev->dev_private; in msm_job_run()
22 msm_fence_init(submit->hw_fence, fctx); in msm_job_run()
24 mutex_lock(&priv->lru.lock); in msm_job_run()
26 for (i = 0; i < submit->nr_bos; i++) { in msm_job_run()
27 struct drm_gem_object *obj = submit->bos[i].obj; in msm_job_run()
[all …]
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