| /kernel/linux/linux-6.6/drivers/net/ |
| D | mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * mdio.c: Generic support for MDIO-compatible transceivers 4 * Copyright 2006-2009 Solarflare Communications Inc. 11 #include <linux/mdio.h> 14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers"); 15 MODULE_AUTHOR("Copyright 2006-2009 Solarflare Communications Inc."); 19 * mdio45_probe - probe for an MDIO (clause 45) device 20 * @mdio: MDIO interface 23 * This sets @prtad and @mmds in the MDIO interface if successful. 24 * Returns 0 on success, negative on error. [all …]
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| /kernel/linux/linux-5.10/drivers/net/ |
| D | mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * mdio.c: Generic support for MDIO-compatible transceivers 4 * Copyright 2006-2009 Solarflare Communications Inc. 11 #include <linux/mdio.h> 14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers"); 15 MODULE_AUTHOR("Copyright 2006-2009 Solarflare Communications Inc."); 19 * mdio45_probe - probe for an MDIO (clause 45) device 20 * @mdio: MDIO interface 23 * This sets @prtad and @mmds in the MDIO interface if successful. 24 * Returns 0 on success, negative on error. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | brcm,unimac-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom UniMAC MDIO bus controller 10 - Doug Berger <opendmb@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Rafał Miłecki <rafal@milecki.pl> 15 - $ref: mdio.yaml# 20 - brcm,genet-mdio-v1 [all …]
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-gmac 19 - const: allwinner,sun8i-v3s-emac [all …]
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| D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO 4 - compatible: One of: 6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX 9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs. 11 - reg: The base address of the MDIO bus controller register bank. 13 - #address-cells: Must be <1>. 15 - #size-cells: Must be <0>. MDIO addresses have no size component. 17 Typically an MDIO bus might have several children. 20 mdio@1180000001800 { 21 compatible = "cavium,octeon-3860-mdio"; [all …]
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| D | mdio-mux-multiplexer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Properties for an MDIO bus multiplexer consumer device 10 - Andrew Lunn <andrew@lunn.ch> 13 This is a special case of MDIO mux when MDIO mux is defined as a consumer 19 - $ref: /schemas/net/mdio-mux.yaml# 23 const: mdio-mux-multiplexer 25 mux-controls: [all …]
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| D | qcom,ipq4019-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm IPQ40xx MDIO Controller 10 - Robert Marko <robert.marko@sartura.hr> 15 - enum: 16 - qcom,ipq4019-mdio 17 - qcom,ipq5018-mdio 19 - items: [all …]
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| D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller 4 - compatible: can be one of: 5 "hisilicon,hns-mdio" 6 "hisilicon,mdio" 7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs, 8 while "hisilicon,mdio" is optional for backwards compatibility only on 10 - reg: The base address of the MDIO bus controller register bank. 11 - #address-cells: Must be <1>. 12 - #size-cells: Must be <0>. MDIO addresses have no size component. 14 Typically an MDIO bus might have several children. [all …]
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| D | fsl-enetc.txt | 9 - reg : Specifies PCIe Device Number and Function 12 - compatible : Should be "fsl,enetc". 14 1. The ENETC external port is connected to a MDIO configurable phy 16 1.1. Using the local ENETC Port MDIO interface 18 In this case, the ENETC node should include a "mdio" sub-node 19 that in turn should contain the "ethernet-phy" node describing the 26 - phy-handle : Phandle to a PHY on the MDIO bus. 29 - phy-connection-type : Defined in ethernet.txt. 31 - mdio : "mdio" node, defined in mdio.txt. 33 - ethernet-phy : "ethernet-phy" node, defined in phy.txt. [all …]
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| D | brcm,mdio-mux-iproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs. 10 - Florian Fainelli <f.fainelli@gmail.com> 13 This MDIO bus multiplexer defines buses that could be internal as well as 14 external to SoCs and could accept MDIO transaction compatible to C-22 or 15 C-45 Clause. When child bus is selected, one needs to select these two 16 properties as well to generate desired MDIO transaction on appropriate bus. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | brcm,unimac-mdio.txt | 1 * Broadcom UniMAC MDIO bus controller 4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2", 5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or 6 "brcm,unimac-mdio" 7 - reg: address and length of the register set for the device, first one is the 9 larger than 16-bits MDIO transactions 10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw" 11 - #size-cells: must be 1 12 - #address-cells: must be 0 15 - interrupts: must be one if the interrupt is shared with the Ethernet MAC or [all …]
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| D | mdio-mux-multiplexer.txt | 1 Properties for an MDIO bus multiplexer consumer device 3 This is a special case of MDIO mux when MDIO mux is defined as a consumer 7 Required properties in addition to the MDIO Bus multiplexer properties: 9 - compatible : should be "mmio-mux-multiplexer" 10 - mux-controls : mux controller node to use for operating the mux 11 - mdio-parent-bus : phandle to the parent MDIO bus. 13 each child node of mdio bus multiplexer consumer device represent a mdio 17 Documentation/devicetree/bindings/mux/mux-controller.txt 18 and Documentation/devicetree/bindings/net/mdio-mux.txt 25 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c", [all …]
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-emac 19 - const: allwinner,sun8i-v3s-emac [all …]
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| D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO 4 - compatible: One of: 6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX 9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs. 11 - reg: The base address of the MDIO bus controller register bank. 13 - #address-cells: Must be <1>. 15 - #size-cells: Must be <0>. MDIO addresses have no size component. 17 Typically an MDIO bus might have several children. 20 mdio@1180000001800 { 21 compatible = "cavium,octeon-3860-mdio"; [all …]
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| D | marvell-orion-mdio.txt | 1 * Marvell MDIO Ethernet Controller interface 5 identical unit that provides an interface with the MDIO bus. 11 - compatible: "marvell,orion-mdio" or "marvell,xmdio" 12 - reg: address and length of the MDIO registers. When an interrupt is 14 otherwise it must be 0x84 bytes to cover the interrupt control 18 - interrupts: interrupt line number for the SMI error/done interrupt 19 - clocks: phandle for up to four required clocks for the MDIO instance 21 The child nodes of the MDIO driver are the individual PHY devices 22 connected to this MDIO bus. They must have a "reg" property given the 23 PHY address on the MDIO bus. [all …]
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| D | brcm,mdio-mux-iproc.txt | 1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs. 3 This MDIO bus multiplexer defines buses that could be internal as well as 4 external to SoCs and could accept MDIO transaction compatible to C-22 or 5 C-45 Clause. When child bus is selected, one needs to select these two 6 properties as well to generate desired MDIO transaction on appropriate bus. 10 MDIO multiplexer node: 11 - compatible: brcm,mdio-mux-iproc. 13 Every non-ethernet PHY requires a compatible so that it could be probed based 17 - clocks: phandle of the core clock which drives the mdio block. 20 at- Documentation/devicetree/bindings/net/mdio-mux.txt [all …]
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| D | fsl-enetc.txt | 9 - reg : Specifies PCIe Device Number and Function 12 - compatible : Should be "fsl,enetc". 14 1. The ENETC external port is connected to a MDIO configurable phy 16 1.1. Using the local ENETC Port MDIO interface 18 In this case, the ENETC node should include a "mdio" sub-node 19 that in turn should contain the "ethernet-phy" node describing the 26 - phy-handle : Phandle to a PHY on the MDIO bus. 29 - phy-connection-type : Defined in ethernet.txt. 31 - mdio : "mdio" node, defined in mdio.txt. 33 - ethernet-phy : "ethernet-phy" node, defined in phy.txt. [all …]
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| D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller 4 - compatible: can be one of: 5 "hisilicon,hns-mdio" 6 "hisilicon,mdio" 7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs, 8 while "hisilicon,mdio" is optional for backwards compatibility only on 10 - reg: The base address of the MDIO bus controller register bank. 11 - #address-cells: Must be <1>. 12 - #size-cells: Must be <0>. MDIO addresses have no size component. 14 Typically an MDIO bus might have several children. [all …]
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| D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device 3 This is a special case of a MDIO bus multiplexer. A memory-mapped device, 4 like an FPGA, is used to control which child bus is connected. The mdio-mux 5 node must be a child of the memory-mapped device. The driver currently only 6 supports devices with 8, 16 or 32-bit registers. 10 - compatible : string, must contain "mdio-mux-mmioreg" 12 - reg : integer, contains the offset of the register that controls the bus 16 - mux-mask : integer, contains an eight-bit mask that specifies which 18 'reg' property of each child mdio-mux node must be constrained by 23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes. [all …]
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| D | brcm,bcmgenet.txt | 4 - compatible: should contain one of "brcm,genet-v1", "brcm,genet-v2", 5 "brcm,genet-v3", "brcm,genet-v4", "brcm,genet-v5", "brcm,bcm2711-genet-v5". 6 - reg: address and length of the register set for the device 7 - interrupts and/or interrupts-extended: must be two cells, the first cell 10 optional third interrupt cell for Wake-on-LAN can be specified. 11 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 13 - phy-mode: see ethernet.txt file in the same directory 14 - #address-cells: should be 1 15 - #size-cells: should be 1 18 - clocks: When provided, must be two phandles to the functional clocks nodes [all …]
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| /kernel/linux/linux-6.6/drivers/net/mdio/ |
| D | mdio-mvusb.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #define USB_MARVELL_VID 0x1286 12 { USB_DEVICE(USB_MARVELL_VID, 0x1fa4) }, 27 struct mii_bus *mdio; member 32 static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg) in mvusb_mdio_read() argument 34 struct mvusb_mdio *mvusb = mdio->priv; in mvusb_mdio_read() 37 mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0xa400 | (dev << 5) | reg); in mvusb_mdio_read() 39 err = usb_bulk_msg(mvusb->udev, usb_sndbulkpipe(mvusb->udev, 2), in mvusb_mdio_read() 40 mvusb->buf, 6, &alen, 100); in mvusb_mdio_read() 44 err = usb_bulk_msg(mvusb->udev, usb_rcvbulkpipe(mvusb->udev, 6), in mvusb_mdio_read() [all …]
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| /kernel/linux/linux-5.10/drivers/net/mdio/ |
| D | mdio-mvusb.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #define USB_MARVELL_VID 0x1286 12 { USB_DEVICE(USB_MARVELL_VID, 0x1fa4) }, 27 struct mii_bus *mdio; member 32 static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg) in mvusb_mdio_read() argument 34 struct mvusb_mdio *mvusb = mdio->priv; in mvusb_mdio_read() 38 return -EOPNOTSUPP; in mvusb_mdio_read() 40 mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0xa400 | (dev << 5) | reg); in mvusb_mdio_read() 42 err = usb_bulk_msg(mvusb->udev, usb_sndbulkpipe(mvusb->udev, 2), in mvusb_mdio_read() 43 mvusb->buf, 6, &alen, 100); in mvusb_mdio_read() [all …]
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| D | of_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OF helpers for the MDIO (Ethernet PHY) API 29 * ethernet-phy-idAAAA.BBBB */ 37 if (sscanf(cp, "ethernet-phy-id%4x.%4x", &upper, &lower) == 2) { in of_get_phy_id() 38 *phy_id = ((upper & 0xFFFF) << 16) | (lower & 0xFFFF); in of_get_phy_id() 39 return 0; in of_get_phy_id() 42 return -EINVAL; in of_get_phy_id() 50 err = of_parse_phandle_with_fixed_args(node, "timestamper", 1, 0, &arg); in of_find_mii_timestamper() 52 if (err == -ENOENT) in of_find_mii_timestamper() 58 return ERR_PTR(-EINVAL); in of_find_mii_timestamper() [all …]
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| /kernel/linux/linux-6.6/drivers/net/pcs/ |
| D | pcs-lynx.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Lynx PCS MDIO helpers 6 #include <linux/mdio.h> 8 #include <linux/pcs-lynx.h> 14 #define LINK_TIMER_LO 0x12 15 #define LINK_TIMER_HI 0x13 16 #define IF_MODE 0x14 17 #define IF_MODE_SGMII_EN BIT(0) 25 struct mdio_device *mdio; member 29 SGMII_SPEED_10 = 0, [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/dsa/ |
| D | realtek.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: dsa.yaml#/$defs/ethernet-ports 13 - Linus Walleij <linus.walleij@linaro.org> 18 MDIO or SPI. 20 The SMI "Simple Management Interface" is a two-wire protocol using 21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does 22 not use the MDIO protocol. This binding defines how to specify the 23 SMI-based Realtek devices. The realtek-smi driver is a platform driver [all …]
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