| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL
27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000
28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L
29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015
30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L
31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018
32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L
33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010
34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L
35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL
27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000
28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L
29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015
30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L
31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018
32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L
33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010
34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L
35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L
27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007
28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L
29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001
30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L
31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000
32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L
33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005
34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L
35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L
27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007
28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L
29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001
30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L
31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000
32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L
33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005
34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L
35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002
[all …]
|
| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/asm-arm/asm/ |
| D | ptrace.h | 25 #define PTRACE_GETFDPIC_EXEC 0
27 #define USR26_MODE 0x00000000
28 #define FIQ26_MODE 0x00000001
29 #define IRQ26_MODE 0x00000002
30 #define SVC26_MODE 0x00000003
31 #define USR_MODE 0x00000010
32 #define SVC_MODE 0x00000013
33 #define FIQ_MODE 0x00000011
34 #define IRQ_MODE 0x00000012
35 #define MON_MODE 0x00000016
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/ |
| D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L
27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c
28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L
29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004
30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L
31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014
32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L
33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018
34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L
35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L
27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c
28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L
29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004
30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L
31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014
32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L
33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018
34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L
35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L
27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000
28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L
29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001
30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL
31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002
32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL
33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002
34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L
35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L
27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000
28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L
29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001
30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL
31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002
32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL
33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002
34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L
35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 38 #define MC_CG_ARB_FREQ_F0 0x0a
39 #define MC_CG_ARB_FREQ_F1 0x0b
40 #define MC_CG_ARB_FREQ_F2 0x0c
41 #define MC_CG_ARB_FREQ_F3 0x0d
43 #define MC_CG_SEQ_DRAMCONF_S0 0x05
44 #define MC_CG_SEQ_DRAMCONF_S1 0x06
45 #define MC_CG_SEQ_YCLK_SUSPEND 0x04
46 #define MC_CG_SEQ_YCLK_RESUME 0x0a
48 #define SMC_RAM_END 0x8000
59 0x000008f8, 0x00000010, 0xffffffff,
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 36 #define MC_CG_ARB_FREQ_F0 0x0a
37 #define MC_CG_ARB_FREQ_F1 0x0b
38 #define MC_CG_ARB_FREQ_F2 0x0c
39 #define MC_CG_ARB_FREQ_F3 0x0d
41 #define MC_CG_SEQ_DRAMCONF_S0 0x05
42 #define MC_CG_SEQ_DRAMCONF_S1 0x06
43 #define MC_CG_SEQ_YCLK_SUSPEND 0x04
44 #define MC_CG_SEQ_YCLK_RESUME 0x0a
46 #define SMC_RAM_END 0x8000
61 0x000008f8, 0x00000010, 0xffffffff,
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/ |
| D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/ |
| D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| D | clc57d.h | 27 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER (0x00000208)
28 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0
30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0…
31 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0
32 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000)
33 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001)
35 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000)
36 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001)
38 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000)
39 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001)
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/include/uapi/asm/ |
| D | termbits.h | 48 #define VINTR 0
67 #define IXON 0x0200
68 #define IXOFF 0x0400
69 #define IUCLC 0x1000
70 #define IMAXBEL 0x2000
71 #define IUTF8 0x4000
74 #define ONLCR 0x00002
75 #define OLCUC 0x00004
76 #define NLDLY 0x00300
77 #define NL0 0x00000
[all …]
|
| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | lirc.h | 10 #define PULSE_BIT 0x01000000
11 #define PULSE_MASK 0x00FFFFFF
12 #define LIRC_MODE2_SPACE 0x00000000
13 #define LIRC_MODE2_PULSE 0x01000000
14 #define LIRC_MODE2_FREQUENCY 0x02000000
15 #define LIRC_MODE2_TIMEOUT 0x03000000
16 #define LIRC_VALUE_MASK 0x00FFFFFF
17 #define LIRC_MODE2_MASK 0xFF000000
33 #define LIRC_MODE_RAW 0x00000001
34 #define LIRC_MODE_PULSE 0x00000002
[all …]
|
| /kernel/linux/patches/linux-6.6/prebuilts/usr/include/asm-arm/asm/ |
| D | ptrace.h | 38 #define PTRACE_GETFDPIC_EXEC 0
40 #define USR26_MODE 0x00000000
41 #define FIQ26_MODE 0x00000001
42 #define IRQ26_MODE 0x00000002
43 #define SVC26_MODE 0x00000003
44 #define USR_MODE 0x00000010
45 #define SVC_MODE 0x00000013
46 #define FIQ_MODE 0x00000011
47 #define IRQ_MODE 0x00000012
48 #define MON_MODE 0x00000016
[all …]
|
| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/asm-arm/asm/ |
| D | ptrace.h | 38 #define PTRACE_GETFDPIC_EXEC 0
40 #define USR26_MODE 0x00000000
41 #define FIQ26_MODE 0x00000001
42 #define IRQ26_MODE 0x00000002
43 #define SVC26_MODE 0x00000003
44 #define USR_MODE 0x00000010
45 #define SVC_MODE 0x00000013
46 #define FIQ_MODE 0x00000011
47 #define IRQ_MODE 0x00000012
48 #define MON_MODE 0x00000016
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/top/ |
| D | ga100.c | 31 int i, n, size = nvkm_rd32(device, 0x0224fc) >> 20; in ga100_top_parse()
33 for (i = 0, n = 0; i < size; i++) { in ga100_top_parse()
37 type = ~0; in ga100_top_parse()
38 inst = 0; in ga100_top_parse()
41 data = nvkm_rd32(device, 0x022800 + (i * 0x04)); in ga100_top_parse()
43 if (!data && n == 0) in ga100_top_parse()
47 case 0: in ga100_top_parse()
48 type = (data & 0x3f000000) >> 24; in ga100_top_parse()
49 inst = (data & 0x000f0000) >> 16; in ga100_top_parse()
50 info->fault = (data & 0x0000007f); in ga100_top_parse()
[all …]
|
| /kernel/linux/linux-6.6/arch/alpha/include/uapi/asm/ |
| D | termbits.h | 54 #define VEOF 0
73 #define IXON 0x0200
74 #define IXOFF 0x0400
75 #define IUCLC 0x1000
76 #define IMAXBEL 0x2000
77 #define IUTF8 0x4000
80 #define ONLCR 0x00002
81 #define OLCUC 0x00004
82 #define NLDLY 0x00300
83 #define NL0 0x00000
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/include/uapi/asm/ |
| D | ptrace.h | 37 #define PTRACE_GETFDPIC_EXEC 0
44 #define USR26_MODE 0x00000000
45 #define FIQ26_MODE 0x00000001
46 #define IRQ26_MODE 0x00000002
47 #define SVC26_MODE 0x00000003
50 * Use 0 here to get code right that creates a userspace
53 #define USR_MODE 0x00000000
54 #define SVC_MODE 0x00000000
56 #define USR_MODE 0x00000010
57 #define SVC_MODE 0x00000013
[all …]
|