| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000, 11 0x00000000, 12 0x00000000, 13 0x00000000, 14 0x00000000, 15 0x00000000, 16 0x00000000, 17 0x00000000, 18 0x00000004, 19 0x00000000, [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000, 11 0x00000000, 12 0x00000000, 13 0x00000000, 14 0x00000000, 15 0x00000000, 16 0x00000000, 17 0x00000000, 18 0x00000004, 19 0x00000000, [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL 27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000 28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L 29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015 30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L 31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018 32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L 33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010 34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L 35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005 [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL 27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000 28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L 29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015 30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L 31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018 32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L 33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010 34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L 35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005 [all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | tables_phy_lcn.c | 30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 31 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 32 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 33 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 34 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 35 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 36 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 37 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 38 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 39 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/ |
| D | tables_phy_lcn.c | 30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 31 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 32 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 33 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 34 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 35 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 36 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 37 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 38 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 39 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
| D | a5xx_power.c | 18 #define AGC_MSG_STATE (AGC_MSG_BASE + 0) 24 #define AGC_INIT_MSG_VALUE 0xBABEFACE 42 { 0xB9A1, 0x00010303 }, 43 { 0xB9A2, 0x13000000 }, 44 { 0xB9A3, 0x00460020 }, 45 { 0xB9A4, 0x10000000 }, 46 { 0xB9A5, 0x040A1707 }, 47 { 0xB9A6, 0x00010000 }, 48 { 0xB9A7, 0x0E000904 }, 49 { 0xB9A8, 0x10000000 }, [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
| D | a5xx_power.c | 18 #define AGC_MSG_STATE (AGC_MSG_BASE + 0) 24 #define AGC_INIT_MSG_VALUE 0xBABEFACE 42 { 0xB9A1, 0x00010303 }, 43 { 0xB9A2, 0x13000000 }, 44 { 0xB9A3, 0x00460020 }, 45 { 0xB9A4, 0x10000000 }, 46 { 0xB9A5, 0x040A1707 }, 47 { 0xB9A6, 0x00010000 }, 48 { 0xB9A7, 0x0E000904 }, 49 { 0xB9A8, 0x10000000 }, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_6_0_sh_mask.h | 26 #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x00003f00L 27 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x00000008 28 #define ATC_ATS_CNTL__DEBUG_ECO_MASK 0x000f0000L 29 #define ATC_ATS_CNTL__DEBUG_ECO__SHIFT 0x00000010 30 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 31 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x00000000 32 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L 33 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x00000002 34 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 35 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x00000001 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_6_0_sh_mask.h | 26 #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x00003f00L 27 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x00000008 28 #define ATC_ATS_CNTL__DEBUG_ECO_MASK 0x000f0000L 29 #define ATC_ATS_CNTL__DEBUG_ECO__SHIFT 0x00000010 30 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 31 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x00000000 32 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L 33 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x00000002 34 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 35 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x00000001 [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L 27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007 28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L 29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001 30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L 31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000 32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L 33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005 34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L 35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L 27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007 28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L 29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001 30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L 31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000 32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L 33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005 34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L 35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002 [all …]
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | cs35l45-tables.c | 15 { 0x00000040, 0x00000055 }, 16 { 0x00000040, 0x000000AA }, 17 { 0x00000044, 0x00000055 }, 18 { 0x00000044, 0x000000AA }, 19 { 0x00006480, 0x0830500A }, 20 { 0x00007C60, 0x1000850B }, 21 { CS35L45_BOOST_OV_CFG, 0x007000D0 }, 22 { CS35L45_LDPM_CONFIG, 0x0001B636 }, 23 { 0x00002C08, 0x00000009 }, 24 { 0x00006850, 0x0A30FFC4 }, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L 27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c 28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L 29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004 30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L 31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014 32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L 33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018 34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L 35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L 27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c 28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L 29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004 30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L 31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014 32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L 33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018 34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L 35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010 [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8. 20 0x01900102 T1040 78 reg = <0xf0000 0x1000>; 79 interrupts = <18 2 0 0>; 80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 81 fsl,tmu-calibration = <0x00000000 0x00000025>, 82 <0x00000001 0x00000028>, 83 <0x00000002 0x0000002d>, 84 <0x00000003 0x00000031>, 85 <0x00000004 0x00000036>, [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8. 20 0x01900102 T1040 78 reg = <0xf0000 0x1000>; 79 interrupts = <18 2 0 0>; 80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 81 fsl,tmu-calibration = <0x00000000 0x00000025>, 82 <0x00000001 0x00000028>, 83 <0x00000002 0x0000002d>, 84 <0x00000003 0x00000031>, 85 <0x00000004 0x00000036>, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L 27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000 28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L 29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001 30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL 31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002 32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL 33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002 34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L 35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L 27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000 28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L 29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001 30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL 31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002 32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL 33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002 34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L 35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 38 #define MC_CG_ARB_FREQ_F0 0x0a 39 #define MC_CG_ARB_FREQ_F1 0x0b 40 #define MC_CG_ARB_FREQ_F2 0x0c 41 #define MC_CG_ARB_FREQ_F3 0x0d 43 #define MC_CG_SEQ_DRAMCONF_S0 0x05 44 #define MC_CG_SEQ_DRAMCONF_S1 0x06 45 #define MC_CG_SEQ_YCLK_SUSPEND 0x04 46 #define MC_CG_SEQ_YCLK_RESUME 0x0a 48 #define SMC_RAM_END 0x8000 59 0x000008f8, 0x00000010, 0xffffffff, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 36 #define MC_CG_ARB_FREQ_F0 0x0a 37 #define MC_CG_ARB_FREQ_F1 0x0b 38 #define MC_CG_ARB_FREQ_F2 0x0c 39 #define MC_CG_ARB_FREQ_F3 0x0d 41 #define MC_CG_SEQ_DRAMCONF_S0 0x05 42 #define MC_CG_SEQ_DRAMCONF_S1 0x06 43 #define MC_CG_SEQ_YCLK_SUSPEND 0x04 44 #define MC_CG_SEQ_YCLK_RESUME 0x0a 46 #define SMC_RAM_END 0x8000 61 0x000008f8, 0x00000010, 0xffffffff, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dce/ |
| D | dce_6_0_sh_mask.h | 26 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA_MASK 0xffffffffL 27 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA__SHIFT 0x00000000 28 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX_MASK 0x000000ffL 29 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX__SHIFT 0x00000000 30 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN_MASK 0x00000100L 31 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN__SHIFT 0x00000008 32 #define AFMT_60958_0__AFMT_60958_CS_A_MASK 0x00000001L 33 #define AFMT_60958_0__AFMT_60958_CS_A__SHIFT 0x00000000 34 #define AFMT_60958_0__AFMT_60958_CS_B_MASK 0x00000002L 35 #define AFMT_60958_0__AFMT_60958_CS_B__SHIFT 0x00000001 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dce/ |
| D | dce_6_0_sh_mask.h | 26 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA_MASK 0xffffffffL 27 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA__SHIFT 0x00000000 28 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX_MASK 0x000000ffL 29 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX__SHIFT 0x00000000 30 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN_MASK 0x00000100L 31 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN__SHIFT 0x00000008 32 #define AFMT_60958_0__AFMT_60958_CS_A_MASK 0x00000001L 33 #define AFMT_60958_0__AFMT_60958_CS_A__SHIFT 0x00000000 34 #define AFMT_60958_0__AFMT_60958_CS_B_MASK 0x00000002L 35 #define AFMT_60958_0__AFMT_60958_CS_B__SHIFT 0x00000001 [all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-socfpga/ |
| D | ocram.c | 12 #define ALTR_OCRAM_CLEAR_ECC 0x00000018 13 #define ALTR_OCRAM_ECC_EN 0x00000019 27 mapped_ocr_edac_addr = of_iomap(np, 0); in socfpga_init_ocram_ecc() 42 #define ALTR_A10_ECC_CTRL_OFST 0x08 43 #define ALTR_A10_OCRAM_ECC_EN_CTL (BIT(1) | BIT(0)) 46 #define ALTR_A10_ECC_INITSTAT_OFST 0x0C 47 #define ALTR_A10_ECC_INITCOMPLETEA BIT(0) 50 #define ALTR_A10_ECC_ERRINTEN_OFST 0x10 51 #define ALTR_A10_ECC_SERRINTEN BIT(0) 53 #define ALTR_A10_ECC_INTSTAT_OFST 0x20 [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| D | clc57d.h | 27 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) 28 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… 31 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 32 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) 33 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) 35 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) 36 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) 38 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) 39 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) [all …]
|