| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| D | init.c | 57 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
59 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
63 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
65 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
69 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
72 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
75 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2084) | \ in mt76_write_mac_initvals()
78 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f)) in mt76_write_mac_initvals()
82 { MT_PBF_SYS_CTRL, 0x00080c00 }, in mt76_write_mac_initvals()
83 { MT_PBF_CFG, 0x1efebcff }, in mt76_write_mac_initvals()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| D | init.c | 86 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
88 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
92 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
94 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
98 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
101 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
104 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2084) | \ in mt76_write_mac_initvals()
107 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f)) in mt76_write_mac_initvals()
111 { MT_PBF_SYS_CTRL, 0x00080c00 }, in mt76_write_mac_initvals()
112 { MT_PBF_CFG, 0x1efebcff }, in mt76_write_mac_initvals()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt76x0/ |
| D | initvals_init.h | 15 { MT_BCN_OFFSET(0), 0xf8f0e8e0 },
16 { MT_BCN_OFFSET(1), 0x6f77d0c8 },
17 { MT_LEGACY_BASIC_RATE, 0x0000013f },
18 { MT_HT_BASIC_RATE, 0x00008003 },
19 { MT_MAC_SYS_CTRL, 0x00000000 },
20 { MT_RX_FILTR_CFG, 0x00017f97 },
21 { MT_BKOFF_SLOT_CFG, 0x00000209 },
22 { MT_TX_SW_CFG0, 0x00000000 },
23 { MT_TX_SW_CFG1, 0x00080606 },
24 { MT_TX_LINK_CFG, 0x00001020 },
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x0/ |
| D | initvals_init.h | 15 { MT_BCN_OFFSET(0), 0xf8f0e8e0 },
16 { MT_BCN_OFFSET(1), 0x6f77d0c8 },
17 { MT_LEGACY_BASIC_RATE, 0x0000013f },
18 { MT_HT_BASIC_RATE, 0x00008003 },
19 { MT_MAC_SYS_CTRL, 0x00000000 },
20 { MT_RX_FILTR_CFG, 0x00017f97 },
21 { MT_BKOFF_SLOT_CFG, 0x00000209 },
22 { MT_TX_SW_CFG0, 0x00000000 },
23 { MT_TX_SW_CFG1, 0x00080606 },
24 { MT_TX_LINK_CFG, 0x00001020 },
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/pxp/ |
| D | intel_pxp_cmd_interface_43.h | 13 #define PXP43_CMDID_START_HUC_AUTH 0x0000003A
14 #define PXP43_CMDID_NEW_HUC_AUTH 0x0000003F /* MTL+ */
15 #define PXP43_CMDID_INIT_SESSION 0x00000036
45 #define PXP43_INIT_SESSION_VALID BIT(0)
49 #define PXP43_INIT_SESSION_PROTECTION_ARB 0x2
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/ |
| D | ar9485_initvals.h | 31 {0x00009e00, 0x037216a0},
32 {0x00009e04, 0x00182020},
33 {0x00009e18, 0x00000000},
34 {0x00009e20, 0x000003a8},
35 {0x00009e2c, 0x00004121},
36 {0x00009e44, 0x02282324},
37 {0x0000a000, 0x00060005},
38 {0x0000a004, 0x00810080},
39 {0x0000a008, 0x00830082},
40 {0x0000a00c, 0x00850084},
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/ |
| D | ar9485_initvals.h | 31 {0x00009e00, 0x037216a0},
32 {0x00009e04, 0x00182020},
33 {0x00009e18, 0x00000000},
34 {0x00009e20, 0x000003a8},
35 {0x00009e2c, 0x00004121},
36 {0x00009e44, 0x02282324},
37 {0x0000a000, 0x00060005},
38 {0x0000a004, 0x00810080},
39 {0x0000a008, 0x00830082},
40 {0x0000a00c, 0x00850084},
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a.dtsi | 32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath5k/ |
| D | rfgain.h | 38 { AR5K_RF_GAIN(0), { 0x000001a9, 0x00000000 } },
39 { AR5K_RF_GAIN(1), { 0x000001e9, 0x00000040 } },
40 { AR5K_RF_GAIN(2), { 0x00000029, 0x00000080 } },
41 { AR5K_RF_GAIN(3), { 0x00000069, 0x00000150 } },
42 { AR5K_RF_GAIN(4), { 0x00000199, 0x00000190 } },
43 { AR5K_RF_GAIN(5), { 0x000001d9, 0x000001d0 } },
44 { AR5K_RF_GAIN(6), { 0x00000019, 0x00000010 } },
45 { AR5K_RF_GAIN(7), { 0x00000059, 0x00000044 } },
46 { AR5K_RF_GAIN(8), { 0x00000099, 0x00000084 } },
47 { AR5K_RF_GAIN(9), { 0x000001a5, 0x00000148 } },
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath5k/ |
| D | rfgain.h | 38 { AR5K_RF_GAIN(0), { 0x000001a9, 0x00000000 } },
39 { AR5K_RF_GAIN(1), { 0x000001e9, 0x00000040 } },
40 { AR5K_RF_GAIN(2), { 0x00000029, 0x00000080 } },
41 { AR5K_RF_GAIN(3), { 0x00000069, 0x00000150 } },
42 { AR5K_RF_GAIN(4), { 0x00000199, 0x00000190 } },
43 { AR5K_RF_GAIN(5), { 0x000001d9, 0x000001d0 } },
44 { AR5K_RF_GAIN(6), { 0x00000019, 0x00000010 } },
45 { AR5K_RF_GAIN(7), { 0x00000059, 0x00000044 } },
46 { AR5K_RF_GAIN(8), { 0x00000099, 0x00000084 } },
47 { AR5K_RF_GAIN(9), { 0x000001a5, 0x00000148 } },
[all …]
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | cs35l45-tables.c | 15 { 0x00000040, 0x00000055 },
16 { 0x00000040, 0x000000AA },
17 { 0x00000044, 0x00000055 },
18 { 0x00000044, 0x000000AA },
19 { 0x00006480, 0x0830500A },
20 { 0x00007C60, 0x1000850B },
21 { CS35L45_BOOST_OV_CFG, 0x007000D0 },
22 { CS35L45_LDPM_CONFIG, 0x0001B636 },
23 { 0x00002C08, 0x00000009 },
24 { 0x00006850, 0x0A30FFC4 },
[all …]
|
| D | cs35l36.h | 16 #define CS35L36_FIRSTREG 0x00000000
17 #define CS35L36_LASTREG 0x00E037FC
18 #define CS35L36_SW_RESET 0x00000000
19 #define CS35L36_SW_REV 0x00000004
20 #define CS35L36_HW_REV 0x00000008
21 #define CS35L36_TESTKEY_CTRL 0x00000020
22 #define CS35L36_USERKEY_CTL 0x00000024
23 #define CS35L36_OTP_MEM30 0x00000478
24 #define CS35L36_OTP_CTRL1 0x00000500
25 #define CS35L36_OTP_CTRL2 0x00000504
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | cs35l36.h | 16 #define CS35L36_FIRSTREG 0x00000000
17 #define CS35L36_LASTREG 0x00E037FC
18 #define CS35L36_SW_RESET 0x00000000
19 #define CS35L36_SW_REV 0x00000004
20 #define CS35L36_HW_REV 0x00000008
21 #define CS35L36_TESTKEY_CTRL 0x00000020
22 #define CS35L36_USERKEY_CTL 0x00000024
23 #define CS35L36_OTP_MEM30 0x00000478
24 #define CS35L36_OTP_CTRL1 0x00000500
25 #define CS35L36_OTP_CTRL2 0x00000504
[all …]
|
| /kernel/linux/linux-6.6/sound/ppc/ |
| D | tumbler_volume.h | 4 /* 0 = -70 dB, 175 = 18.0 dB in 0.5 dB step */
6 0x00000015, 0x00000016, 0x00000017,
7 0x00000019, 0x0000001a, 0x0000001c,
8 0x0000001d, 0x0000001f, 0x00000021,
9 0x00000023, 0x00000025, 0x00000027,
10 0x00000029, 0x0000002c, 0x0000002e,
11 0x00000031, 0x00000034, 0x00000037,
12 0x0000003a, 0x0000003e, 0x00000042,
13 0x00000045, 0x0000004a, 0x0000004e,
14 0x00000053, 0x00000057, 0x0000005d,
[all …]
|
| /kernel/linux/linux-5.10/sound/ppc/ |
| D | tumbler_volume.h | 4 /* 0 = -70 dB, 175 = 18.0 dB in 0.5 dB step */
6 0x00000015, 0x00000016, 0x00000017,
7 0x00000019, 0x0000001a, 0x0000001c,
8 0x0000001d, 0x0000001f, 0x00000021,
9 0x00000023, 0x00000025, 0x00000027,
10 0x00000029, 0x0000002c, 0x0000002e,
11 0x00000031, 0x00000034, 0x00000037,
12 0x0000003a, 0x0000003e, 0x00000042,
13 0x00000045, 0x0000004a, 0x0000004e,
14 0x00000053, 0x00000057, 0x0000005d,
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/ |
| D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
|
| D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
|
| D | soc21_enum.h | 55 DSM_DATA_SEL_DISABLE = 0x00000000,
56 DSM_DATA_SEL_0 = 0x00000001,
57 DSM_DATA_SEL_1 = 0x00000002,
58 DSM_DATA_SEL_BOTH = 0x00000003,
66 DSM_ENABLE_ERROR_INJECT_FED_IN = 0x00000000,
67 DSM_ENABLE_ERROR_INJECT_SINGLE = 0x00000001,
68 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE = 0x00000002,
69 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE_LIMITED = 0x00000003,
77 DSM_SELECT_INJECT_DELAY_NO_DELAY = 0x00000000,
78 DSM_SELECT_INJECT_DELAY_DELAY_ERROR = 0x00000001,
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/ |
| D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
|
| D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| D | clc37e.h | 28 #define NVC37E_UPDATE (0x00000200)
30 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000)
31 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001)
32 #define NVC37E_SET_SEMAPHORE_CONTROL (0x0000020C)
33 #define NVC37E_SET_SEMAPHORE_CONTROL_OFFSET 7:0
34 #define NVC37E_SET_SEMAPHORE_ACQUIRE (0x00000210)
35 #define NVC37E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0
36 #define NVC37E_SET_SEMAPHORE_RELEASE (0x00000214)
37 #define NVC37E_SET_SEMAPHORE_RELEASE_VALUE 31:0
38 #define NVC37E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218)
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| D | clc37e.h | 28 #define NVC37E_UPDATE (0x00000200)
30 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000)
31 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001)
32 #define NVC37E_SET_SEMAPHORE_CONTROL (0x0000020C)
33 #define NVC37E_SET_SEMAPHORE_CONTROL_OFFSET 7:0
34 #define NVC37E_SET_SEMAPHORE_ACQUIRE (0x00000210)
35 #define NVC37E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0
36 #define NVC37E_SET_SEMAPHORE_RELEASE (0x00000214)
37 #define NVC37E_SET_SEMAPHORE_RELEASE_VALUE 31:0
38 #define NVC37E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218)
[all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | ethtool.h | 36 ep->speed = (__u16)(speed & 0xFFFF); in ethtool_cmd_speed_set()
73 #define PFC_STORM_PREVENTION_AUTO 0xffff
74 #define PFC_STORM_PREVENTION_DISABLE 0
100 void *data[0];
102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
103 #define DOWNSHIFT_DEV_DISABLE 0
114 __u8 data[0];
121 __u8 data[0];
195 ETH_SS_TEST = 0,
209 __u8 data[0];
[all …]
|