Searched +full:0 +full:x0002 (Results 1 – 25 of 1108) sorted by relevance
12345678910>>...45
| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | mdio.h | 50 #define MDIO_PMA_LASI_RXCTRL 0x9000
51 #define MDIO_PMA_LASI_TXCTRL 0x9001
52 #define MDIO_PMA_LASI_CTRL 0x9002
53 #define MDIO_PMA_LASI_RXSTAT 0x9003
54 #define MDIO_PMA_LASI_TXSTAT 0x9004
55 #define MDIO_PMA_LASI_STAT 0x9005
57 #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c)
61 #define MDIO_PMA_CTRL1_LOOPBACK 0x0001
68 #define MDIO_AN_CTRL1_XNP 0x2000
69 #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
| D | pcm990_baseboard.h | 29 #define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
30 #define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */
31 #define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */
32 #define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */
34 #define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */
35 #define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */
36 #define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */
37 #define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */
39 #define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */
40 #define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */
[all …]
|
| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/ |
| D | mdio.h | 67 #define MDIO_PMA_LASI_RXCTRL 0x9000
68 #define MDIO_PMA_LASI_TXCTRL 0x9001
69 #define MDIO_PMA_LASI_CTRL 0x9002
70 #define MDIO_PMA_LASI_RXSTAT 0x9003
71 #define MDIO_PMA_LASI_TXSTAT 0x9004
72 #define MDIO_PMA_LASI_STAT 0x9005
74 #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c)
78 #define MDIO_PMA_CTRL1_LOOPBACK 0x0001
85 #define MDIO_AN_CTRL1_XNP 0x2000
86 #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400
[all …]
|
| /kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/ |
| D | mdio.h | 67 #define MDIO_PMA_LASI_RXCTRL 0x9000
68 #define MDIO_PMA_LASI_TXCTRL 0x9001
69 #define MDIO_PMA_LASI_CTRL 0x9002
70 #define MDIO_PMA_LASI_RXSTAT 0x9003
71 #define MDIO_PMA_LASI_TXSTAT 0x9004
72 #define MDIO_PMA_LASI_STAT 0x9005
74 #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c)
78 #define MDIO_PMA_CTRL1_LOOPBACK 0x0001
85 #define MDIO_AN_CTRL1_XNP 0x2000
86 #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400
[all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/madera/ |
| D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/wm8350/ |
| D | core.h | 27 #define WM8350_RESET_ID 0x00
28 #define WM8350_ID 0x01
29 #define WM8350_REVISION 0x02
30 #define WM8350_SYSTEM_CONTROL_1 0x03
31 #define WM8350_SYSTEM_CONTROL_2 0x04
32 #define WM8350_SYSTEM_HIBERNATE 0x05
33 #define WM8350_INTERFACE_CONTROL 0x06
34 #define WM8350_POWER_MGMT_1 0x08
35 #define WM8350_POWER_MGMT_2 0x09
36 #define WM8350_POWER_MGMT_3 0x0A
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/wm8350/ |
| D | core.h | 27 #define WM8350_RESET_ID 0x00
28 #define WM8350_ID 0x01
29 #define WM8350_REVISION 0x02
30 #define WM8350_SYSTEM_CONTROL_1 0x03
31 #define WM8350_SYSTEM_CONTROL_2 0x04
32 #define WM8350_SYSTEM_HIBERNATE 0x05
33 #define WM8350_INTERFACE_CONTROL 0x06
34 #define WM8350_POWER_MGMT_1 0x08
35 #define WM8350_POWER_MGMT_2 0x09
36 #define WM8350_POWER_MGMT_3 0x0A
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/madera/ |
| D | registers.h | 14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/i2c/s5c73m3/ |
| D | s5c73m3.h | 44 #define AHB_MSB_ADDR_PTR 0xfcfc
45 #define REG_CMDWR_ADDRH 0x0050
46 #define REG_CMDWR_ADDRL 0x0054
47 #define REG_CMDRD_ADDRH 0x0058
48 #define REG_CMDRD_ADDRL 0x005c
49 #define REG_CMDBUF_ADDR 0x0f14
51 #define REG_I2C_SEQ_STATUS S5C73M3_REG(0x0009, 0x59A6)
52 #define SEQ_END_PLL (1<<0x0)
53 #define SEQ_END_SENSOR (1<<0x1)
54 #define SEQ_END_GPIO (1<<0x2)
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/i2c/s5c73m3/ |
| D | s5c73m3.h | 44 #define AHB_MSB_ADDR_PTR 0xfcfc
45 #define REG_CMDWR_ADDRH 0x0050
46 #define REG_CMDWR_ADDRL 0x0054
47 #define REG_CMDRD_ADDRH 0x0058
48 #define REG_CMDRD_ADDRL 0x005c
49 #define REG_CMDBUF_ADDR 0x0f14
51 #define REG_I2C_SEQ_STATUS S5C73M3_REG(0x0009, 0x59A6)
52 #define SEQ_END_PLL (1<<0x0)
53 #define SEQ_END_SENSOR (1<<0x1)
54 #define SEQ_END_GPIO (1<<0x2)
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | wm8903.h | 22 #define WM8903_SW_RESET_AND_ID 0x00
23 #define WM8903_REVISION_NUMBER 0x01
24 #define WM8903_BIAS_CONTROL_0 0x04
25 #define WM8903_VMID_CONTROL_0 0x05
26 #define WM8903_MIC_BIAS_CONTROL_0 0x06
27 #define WM8903_ANALOGUE_DAC_0 0x08
28 #define WM8903_ANALOGUE_ADC_0 0x0A
29 #define WM8903_POWER_MANAGEMENT_0 0x0C
30 #define WM8903_POWER_MANAGEMENT_1 0x0D
31 #define WM8903_POWER_MANAGEMENT_2 0x0E
[all …]
|
| D | tlv320aic23.h | 19 #define TLV320AIC23_LINVOL 0x00
20 #define TLV320AIC23_RINVOL 0x01
21 #define TLV320AIC23_LCHNVOL 0x02
22 #define TLV320AIC23_RCHNVOL 0x03
23 #define TLV320AIC23_ANLG 0x04
24 #define TLV320AIC23_DIGT 0x05
25 #define TLV320AIC23_PWR 0x06
26 #define TLV320AIC23_DIGT_FMT 0x07
27 #define TLV320AIC23_SRATE 0x08
28 #define TLV320AIC23_ACTIVE 0x09
[all …]
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | wm8903.h | 22 #define WM8903_SW_RESET_AND_ID 0x00
23 #define WM8903_REVISION_NUMBER 0x01
24 #define WM8903_BIAS_CONTROL_0 0x04
25 #define WM8903_VMID_CONTROL_0 0x05
26 #define WM8903_MIC_BIAS_CONTROL_0 0x06
27 #define WM8903_ANALOGUE_DAC_0 0x08
28 #define WM8903_ANALOGUE_ADC_0 0x0A
29 #define WM8903_POWER_MANAGEMENT_0 0x0C
30 #define WM8903_POWER_MANAGEMENT_1 0x0D
31 #define WM8903_POWER_MANAGEMENT_2 0x0E
[all …]
|
| D | tlv320aic23.h | 19 #define TLV320AIC23_LINVOL 0x00
20 #define TLV320AIC23_RINVOL 0x01
21 #define TLV320AIC23_LCHNVOL 0x02
22 #define TLV320AIC23_RCHNVOL 0x03
23 #define TLV320AIC23_ANLG 0x04
24 #define TLV320AIC23_DIGT 0x05
25 #define TLV320AIC23_PWR 0x06
26 #define TLV320AIC23_DIGT_FMT 0x07
27 #define TLV320AIC23_SRATE 0x08
28 #define TLV320AIC23_ACTIVE 0x09
[all …]
|
| /kernel/linux/linux-6.6/include/sound/ |
| D | wm8903.h | 15 #define WM8903_GPIO_CONFIG_ZERO 0x8000
18 * R6 (0x06) - Mic Bias Control 0
20 #define WM8903_MICDET_THR_MASK 0x0030 /* MICDET_THR - [5:4] */
23 #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */
26 #define WM8903_MICDET_ENA 0x0002 /* MICDET_ENA */
27 #define WM8903_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */
30 #define WM8903_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */
31 #define WM8903_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */
32 #define WM8903_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */
40 #define WM8903_GPn_FN_GPIO_OUTPUT 0
[all …]
|
| /kernel/linux/linux-5.10/include/sound/ |
| D | wm8903.h | 15 #define WM8903_GPIO_CONFIG_ZERO 0x8000
18 * R6 (0x06) - Mic Bias Control 0
20 #define WM8903_MICDET_THR_MASK 0x0030 /* MICDET_THR - [5:4] */
23 #define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */
26 #define WM8903_MICDET_ENA 0x0002 /* MICDET_ENA */
27 #define WM8903_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */
30 #define WM8903_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */
31 #define WM8903_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */
32 #define WM8903_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */
40 #define WM8903_GPn_FN_GPIO_OUTPUT 0
[all …]
|
| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | mdio.h | 70 #define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */
71 #define MDIO_PMA_LASI_TXCTRL 0x9001 /* TX_ALARM control */
72 #define MDIO_PMA_LASI_CTRL 0x9002 /* LASI control */
73 #define MDIO_PMA_LASI_RXSTAT 0x9003 /* RX_ALARM status */
74 #define MDIO_PMA_LASI_TXSTAT 0x9004 /* TX_ALARM status */
75 #define MDIO_PMA_LASI_STAT 0x9005 /* LASI status */
81 #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c)
85 #define MDIO_PMA_CTRL1_LOOPBACK 0x0001
92 #define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */
93 #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | tegra30-cpu-opp.dtsi | 10 opp-supported-hw = <0x1F 0x31FE>;
16 opp-supported-hw = <0x1F 0x0C01>;
22 opp-supported-hw = <0x1F 0x0200>;
28 opp-supported-hw = <0x1F 0x31FE>;
34 opp-supported-hw = <0x1F 0x0C01>;
40 opp-supported-hw = <0x1F 0x0200>;
46 opp-supported-hw = <0x1F 0x31FE>;
52 opp-supported-hw = <0x1F 0x0C01>;
58 opp-supported-hw = <0x1F 0x0200>;
64 opp-supported-hw = <0x1F 0x0C00>;
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/ |
| D | tegra30-cpu-opp.dtsi | 10 opp-supported-hw = <0x1F 0x31FE>;
16 opp-supported-hw = <0x1F 0x0C01>;
22 opp-supported-hw = <0x1F 0x0200>;
28 opp-supported-hw = <0x1F 0x31FE>;
34 opp-supported-hw = <0x1F 0x0C01>;
40 opp-supported-hw = <0x1F 0x0200>;
46 opp-supported-hw = <0x1F 0x31FE>;
53 opp-supported-hw = <0x1F 0x0C01>;
60 opp-supported-hw = <0x1F 0x0200>;
67 opp-supported-hw = <0x1F 0x0C00>;
[all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/wm831x/ |
| D | irq.h | 14 #define WM831X_IRQ_TEMP_THW 0
75 * R16400 (0x4010) - System Interrupts
77 #define WM831X_PS_INT 0x8000 /* PS_INT */
78 #define WM831X_PS_INT_MASK 0x8000 /* PS_INT */
81 #define WM831X_TEMP_INT 0x4000 /* TEMP_INT */
82 #define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */
85 #define WM831X_GP_INT 0x2000 /* GP_INT */
86 #define WM831X_GP_INT_MASK 0x2000 /* GP_INT */
89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/wm831x/ |
| D | irq.h | 14 #define WM831X_IRQ_TEMP_THW 0
75 * R16400 (0x4010) - System Interrupts
77 #define WM831X_PS_INT 0x8000 /* PS_INT */
78 #define WM831X_PS_INT_MASK 0x8000 /* PS_INT */
81 #define WM831X_TEMP_INT 0x4000 /* TEMP_INT */
82 #define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */
85 #define WM831X_GP_INT 0x2000 /* GP_INT */
86 #define WM831X_GP_INT_MASK 0x2000 /* GP_INT */
89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
[all …]
|
| /kernel/linux/linux-6.6/sound/pci/oxygen/ |
| D | cm9780.h | 5 #define CM9780_JACK 0x62
6 #define CM9780_MIXER 0x64
7 #define CM9780_GPIO_SETUP 0x70
8 #define CM9780_GPIO_STATUS 0x72
11 #define CM9780_RSOE 0x0001
12 #define CM9780_CBOE 0x0002
13 #define CM9780_SSOE 0x0004
14 #define CM9780_FROE 0x0008
15 #define CM9780_HP2FMICOE 0x0010
16 #define CM9780_CB2MICOE 0x0020
[all …]
|
| /kernel/linux/linux-5.10/sound/pci/oxygen/ |
| D | cm9780.h | 5 #define CM9780_JACK 0x62
6 #define CM9780_MIXER 0x64
7 #define CM9780_GPIO_SETUP 0x70
8 #define CM9780_GPIO_STATUS 0x72
11 #define CM9780_RSOE 0x0001
12 #define CM9780_CBOE 0x0002
13 #define CM9780_SSOE 0x0004
14 #define CM9780_FROE 0x0008
15 #define CM9780_HP2FMICOE 0x0010
16 #define CM9780_CB2MICOE 0x0020
[all …]
|
12345678910>>...45