| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/ |
| D | rtw8822b_table.c | 10 0x029, 0x000000F9, 11 0x420, 0x00000080, 12 0x421, 0x0000001F, 13 0x428, 0x0000000A, 14 0x429, 0x00000010, 15 0x430, 0x00000000, 16 0x431, 0x00000000, 17 0x432, 0x00000000, 18 0x433, 0x00000001, 19 0x434, 0x00000004, [all …]
|
| D | rtw8723d_table.c | 10 0x020, 0x00000013, 11 0x02F, 0x00000010, 12 0x077, 0x00000007, 13 0x421, 0x0000000F, 14 0x428, 0x0000000A, 15 0x429, 0x00000010, 16 0x430, 0x00000000, 17 0x431, 0x00000000, 18 0x432, 0x00000000, 19 0x433, 0x00000001, [all …]
|
| D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
|
| D | rtw8821c_table.c | 10 0x010, 0x00000043, 11 0x025, 0x0000001D, 12 0x026, 0x000000CE, 13 0x04F, 0x00000001, 14 0x029, 0x000000F9, 15 0x420, 0x00000080, 16 0x421, 0x0000001F, 17 0x428, 0x0000000A, 18 0x429, 0x00000010, 19 0x430, 0x00000000, [all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/ |
| D | rtw8822b_table.c | 10 0x029, 0x000000F9, 11 0x420, 0x00000080, 12 0x421, 0x0000001F, 13 0x428, 0x0000000A, 14 0x429, 0x00000010, 15 0x430, 0x00000000, 16 0x431, 0x00000000, 17 0x432, 0x00000000, 18 0x433, 0x00000001, 19 0x434, 0x00000004, [all …]
|
| D | rtw8723d_table.c | 10 0x020, 0x00000013, 11 0x02F, 0x00000010, 12 0x077, 0x00000007, 13 0x421, 0x0000000F, 14 0x428, 0x0000000A, 15 0x429, 0x00000010, 16 0x430, 0x00000000, 17 0x431, 0x00000000, 18 0x432, 0x00000000, 19 0x433, 0x00000001, [all …]
|
| D | rtw8822c_table.c | 16 0x80000015, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
|
| D | rtw8821c_table.c | 10 0x010, 0x00000043, 11 0x025, 0x0000001D, 12 0x026, 0x000000CE, 13 0x04F, 0x00000001, 14 0x029, 0x000000F9, 15 0x420, 0x00000080, 16 0x421, 0x0000000F, 17 0x428, 0x0000000A, 18 0x429, 0x00000010, 19 0x430, 0x00000000, [all …]
|
| /kernel/linux/linux-5.10/sound/pci/oxygen/ |
| D | wm8776.h | 14 #define WM8776_HPLVOL 0x00 15 #define WM8776_HPRVOL 0x01 16 #define WM8776_HPMASTER 0x02 17 #define WM8776_DACLVOL 0x03 18 #define WM8776_DACRVOL 0x04 19 #define WM8776_DACMASTER 0x05 20 #define WM8776_PHASESWAP 0x06 21 #define WM8776_DACCTRL1 0x07 22 #define WM8776_DACMUTE 0x08 23 #define WM8776_DACCTRL2 0x09 [all …]
|
| D | wm8766.h | 5 #define WM8766_LDA1 0x00 6 #define WM8766_RDA1 0x01 7 #define WM8766_DAC_CTRL 0x02 8 #define WM8766_INT_CTRL 0x03 9 #define WM8766_LDA2 0x04 10 #define WM8766_RDA2 0x05 11 #define WM8766_LDA3 0x06 12 #define WM8766_RDA3 0x07 13 #define WM8766_MASTDA 0x08 14 #define WM8766_DAC_CTRL2 0x09 [all …]
|
| /kernel/linux/linux-6.6/sound/pci/oxygen/ |
| D | wm8776.h | 14 #define WM8776_HPLVOL 0x00 15 #define WM8776_HPRVOL 0x01 16 #define WM8776_HPMASTER 0x02 17 #define WM8776_DACLVOL 0x03 18 #define WM8776_DACRVOL 0x04 19 #define WM8776_DACMASTER 0x05 20 #define WM8776_PHASESWAP 0x06 21 #define WM8776_DACCTRL1 0x07 22 #define WM8776_DACMUTE 0x08 23 #define WM8776_DACCTRL2 0x09 [all …]
|
| D | wm8766.h | 5 #define WM8766_LDA1 0x00 6 #define WM8766_RDA1 0x01 7 #define WM8766_DAC_CTRL 0x02 8 #define WM8766_INT_CTRL 0x03 9 #define WM8766_LDA2 0x04 10 #define WM8766_RDA2 0x05 11 #define WM8766_LDA3 0x06 12 #define WM8766_RDA3 0x07 13 #define WM8766_MASTDA 0x08 14 #define WM8766_DAC_CTRL2 0x09 [all …]
|
| /kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt8195.c | 13 * iocfg[0]:0x10005000, iocfg[1]:0x11d10000, iocfg[2]:0x11d30000, 14 * iocfg[3]:0x11d40000, iocfg[4]:0x11e20000, iocfg[5]:0x11eb0000, 15 * iocfg[6]:0x11f40000. 21 32, 0) 28 PIN_FIELD(0, 144, 0x300, 0x10, 0, 4), 32 PIN_FIELD(0, 144, 0x0, 0x10, 0, 1), 36 PIN_FIELD(0, 144, 0x200, 0x10, 0, 1), 40 PIN_FIELD(0, 144, 0x100, 0x10, 0, 1), 44 PIN_FIELD_BASE(0, 0, 4, 0x040, 0x10, 0, 1), 45 PIN_FIELD_BASE(1, 1, 4, 0x040, 0x10, 1, 1), [all …]
|
| /kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.h | 10 #define QSERDES_COM_BG_TIMER 0x00c 11 #define QSERDES_COM_SSC_EN_CENTER 0x010 12 #define QSERDES_COM_SSC_ADJ_PER1 0x014 13 #define QSERDES_COM_SSC_ADJ_PER2 0x018 14 #define QSERDES_COM_SSC_PER1 0x01c 15 #define QSERDES_COM_SSC_PER2 0x020 16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024 17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028 18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034 19 #define QSERDES_COM_CLK_ENABLE1 0x038 [all …]
|
| /kernel/linux/linux-6.6/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp-qserdes-txrx-v3.h | 10 #define QSERDES_V3_TX_BIST_MODE_LANENO 0x000 11 #define QSERDES_V3_TX_CLKBUF_ENABLE 0x008 12 #define QSERDES_V3_TX_TX_EMP_POST1_LVL 0x00c 13 #define QSERDES_V3_TX_TX_DRV_LVL 0x01c 14 #define QSERDES_V3_TX_RESET_TSYNC_EN 0x024 15 #define QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN 0x028 16 #define QSERDES_V3_TX_TX_BAND 0x02c 17 #define QSERDES_V3_TX_SLEW_CNTL 0x030 18 #define QSERDES_V3_TX_INTERFACE_SELECT 0x034 19 #define QSERDES_V3_TX_RES_CODE_LANE_TX 0x03c [all …]
|
| D | phy-qcom-qmp-qserdes-txrx.h | 10 #define QSERDES_TX_BIST_MODE_LANENO 0x000 11 #define QSERDES_TX_BIST_INVERT 0x004 12 #define QSERDES_TX_CLKBUF_ENABLE 0x008 13 #define QSERDES_TX_CMN_CONTROL_ONE 0x00c 14 #define QSERDES_TX_CMN_CONTROL_TWO 0x010 15 #define QSERDES_TX_CMN_CONTROL_THREE 0x014 16 #define QSERDES_TX_TX_EMP_POST1_LVL 0x018 17 #define QSERDES_TX_TX_POST2_EMPH 0x01c 18 #define QSERDES_TX_TX_BOOST_LVL_UP_DN 0x020 19 #define QSERDES_TX_HP_PD_ENABLES 0x024 [all …]
|
| D | phy-qcom-qmp-qserdes-txrx-v4.h | 10 #define QSERDES_V4_TX_BIST_MODE_LANENO 0x000 11 #define QSERDES_V4_TX_BIST_INVERT 0x004 12 #define QSERDES_V4_TX_CLKBUF_ENABLE 0x008 13 #define QSERDES_V4_TX_TX_EMP_POST1_LVL 0x00c 14 #define QSERDES_V4_TX_TX_IDLE_LVL_LARGE_AMP 0x010 15 #define QSERDES_V4_TX_TX_DRV_LVL 0x014 16 #define QSERDES_V4_TX_TX_DRV_LVL_OFFSET 0x018 17 #define QSERDES_V4_TX_RESET_TSYNC_EN 0x01c 18 #define QSERDES_V4_TX_PRE_STALL_LDO_BOOST_EN 0x020 19 #define QSERDES_V4_TX_TX_BAND 0x024 [all …]
|
| D | phy-qcom-qmp-qserdes-txrx-v5.h | 11 #define QSERDES_V5_TX_BIST_MODE_LANENO 0x000 12 #define QSERDES_V5_TX_BIST_INVERT 0x004 13 #define QSERDES_V5_TX_CLKBUF_ENABLE 0x008 14 #define QSERDES_V5_TX_TX_EMP_POST1_LVL 0x00c 15 #define QSERDES_V5_TX_TX_IDLE_LVL_LARGE_AMP 0x010 16 #define QSERDES_V5_TX_TX_DRV_LVL 0x014 17 #define QSERDES_V5_TX_TX_DRV_LVL_OFFSET 0x018 18 #define QSERDES_V5_TX_RESET_TSYNC_EN 0x01c 19 #define QSERDES_V5_TX_PRE_STALL_LDO_BOOST_EN 0x020 20 #define QSERDES_V5_TX_TX_BAND 0x024 [all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/ |
| D | rtw8852c_table.c | 10 {0xF0FF0000, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03400FF, 0x00000002}, 13 {0xF03500FF, 0x00000003}, 14 {0xF03600FF, 0x00000004}, 15 {0x70C, 0x00000020}, 16 {0x704, 0x601E0100}, 17 {0x4000, 0x00000000}, 18 {0x4004, 0xCA014000}, 19 {0x4008, 0xC751D4F0}, [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | hdagf119.c | 30 const u32 hoff = 0x800 * head; in gf119_hda_device_entry() 31 nvkm_mask(device, 0x616548 + hoff, 0x00000070, head << 4); in gf119_hda_device_entry() 38 const u32 soff = 0x030 * ior->id + (head * 0x04); in gf119_hda_eld() 41 for (i = 0; i < size; i++) in gf119_hda_eld() 42 nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | data[i]); in gf119_hda_eld() 43 for (; i < 0x60; i++) in gf119_hda_eld() 44 nvkm_wr32(device, 0x10ec00 + soff, (i << 8)); in gf119_hda_eld() 45 nvkm_mask(device, 0x10ec10 + soff, 0x80000002, 0x80000002); in gf119_hda_eld() 52 const u32 soff = 0x030 * ior->id + (head * 0x04); in gf119_hda_hpd() 53 u32 data = 0x80000000; in gf119_hda_hpd() [all …]
|
| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt7986-topckgen.c | 176 0x000, 0x004, 0x008, 0, 3, 7, 0x1C0, 0), 178 0x000, 0x004, 0x008, 8, 3, 15, 0x1C0, 1), 179 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x000, 180 0x004, 0x008, 16, 3, 23, 0x1C0, 2), 182 0x000, 0x004, 0x008, 24, 3, 31, 0x1C0, 3), 184 MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x010, 185 0x014, 0x018, 0, 2, 7, 0x1C0, 4), 186 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x010, 187 0x014, 0x018, 8, 2, 15, 0x1C0, 5), 188 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x010, [all …]
|
| D | clk-mt7981-topckgen.c | 293 0x000, 0x004, 0x008, 0, 3, 7, 0x1C0, 0), 295 0x000, 0x004, 0x008, 8, 3, 15, 0x1C0, 1), 297 0x000, 0x004, 0x008, 16, 3, 23, 0x1C0, 2), 299 0x000, 0x004, 0x008, 24, 3, 31, 0x1C0, 3), 302 0x010, 0x014, 0x018, 0, 2, 7, 0x1C0, 4), 304 0x010, 0x014, 0x018, 8, 3, 15, 0x1C0, 5), 306 0x010, 0x014, 0x018, 16, 2, 23, 0x1C0, 6), 308 pextp_tl_ck_parents, 0x010, 0x014, 0x018, 24, 2, 31, 309 0x1C0, 7), 312 emmc_208m_parents, 0x020, 0x024, 0x028, 0, 3, 7, [all …]
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/ |
| D | mips-cpc.h | 33 * Attempt to detect the presence of a Cluster Power Controller. Returns 0 if 60 #define MIPS_CPC_GCB_OFS 0x0000 61 #define MIPS_CPC_CLCB_OFS 0x2000 62 #define MIPS_CPC_COCB_OFS 0x4000 81 CPC_ACCESSOR_RW(32, 0x000, access) 84 CPC_ACCESSOR_RW(32, 0x008, seqdel) 87 CPC_ACCESSOR_RW(32, 0x010, rail) 90 CPC_ACCESSOR_RW(32, 0x018, resetlen) 93 CPC_ACCESSOR_RO(32, 0x020, revision) 96 CPC_ACCESSOR_RW(32, 0x030, pwrup_ctl) [all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/ |
| D | mips-cpc.h | 33 * Attempt to detect the presence of a Cluster Power Controller. Returns 0 if 60 #define MIPS_CPC_GCB_OFS 0x0000 61 #define MIPS_CPC_CLCB_OFS 0x2000 62 #define MIPS_CPC_COCB_OFS 0x4000 81 CPC_ACCESSOR_RW(32, 0x000, access) 84 CPC_ACCESSOR_RW(32, 0x008, seqdel) 87 CPC_ACCESSOR_RW(32, 0x010, rail) 90 CPC_ACCESSOR_RW(32, 0x018, resetlen) 93 CPC_ACCESSOR_RO(32, 0x020, revision) 96 CPC_ACCESSOR_RW(32, 0x030, pwrup_ctl) [all …]
|
| /kernel/linux/linux-6.6/drivers/media/platform/mediatek/mdp3/ |
| D | mdp_reg_ccorr.h | 10 #define MDP_CCORR_EN 0x000 11 #define MDP_CCORR_CFG 0x020 12 #define MDP_CCORR_SIZE 0x030 15 #define MDP_CCORR_EN_MASK 0x00000001 16 #define MDP_CCORR_CFG_MASK 0x70001317 17 #define MDP_CCORR_SIZE_MASK 0x1fff1fff
|