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/kernel/linux/linux-6.6/fs/hfsplus/
Dtables.c24 // High-byte indices ( == 0 iff no case mapping and no ignorables )
27 /* 0 */ 0x0100, 0x0200, 0x0000, 0x0300, 0x0400, 0x0500, 0x0000, 0x0000,
28 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
29 /* 1 */ 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
30 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
31 /* 2 */ 0x0700, 0x0800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
32 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
33 /* 3 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
34 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
35 /* 4 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
[all …]
/kernel/linux/linux-5.10/fs/hfsplus/
Dtables.c24 // High-byte indices ( == 0 iff no case mapping and no ignorables )
27 /* 0 */ 0x0100, 0x0200, 0x0000, 0x0300, 0x0400, 0x0500, 0x0000, 0x0000,
28 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
29 /* 1 */ 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
30 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
31 /* 2 */ 0x0700, 0x0800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
32 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
33 /* 3 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
34 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
35 /* 4 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
[all …]
/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-exynos5260.h15 #define MUX_SEL_AUD 0x0200
16 #define MUX_ENABLE_AUD 0x0300
17 #define MUX_STAT_AUD 0x0400
18 #define MUX_IGNORE_AUD 0x0500
19 #define DIV_AUD0 0x0600
20 #define DIV_AUD1 0x0604
21 #define DIV_STAT_AUD0 0x0700
22 #define DIV_STAT_AUD1 0x0704
23 #define EN_ACLK_AUD 0x0800
24 #define EN_PCLK_AUD 0x0900
[all …]
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-exynos5260.h15 #define MUX_SEL_AUD 0x0200
16 #define MUX_ENABLE_AUD 0x0300
17 #define MUX_STAT_AUD 0x0400
18 #define MUX_IGNORE_AUD 0x0500
19 #define DIV_AUD0 0x0600
20 #define DIV_AUD1 0x0604
21 #define DIV_STAT_AUD0 0x0700
22 #define DIV_STAT_AUD1 0x0704
23 #define EN_ACLK_AUD 0x0800
24 #define EN_PCLK_AUD 0x0900
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/wm8350/
Dpmic.h19 #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
20 #define WM8350_CSA_FLASH_CONTROL 0xAD
21 #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
22 #define WM8350_CSB_FLASH_CONTROL 0xAF
23 #define WM8350_DCDC_LDO_REQUESTED 0xB0
24 #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
25 #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
26 #define WM8350_POWER_CHECK_COMPARATOR 0xB3
27 #define WM8350_DCDC1_CONTROL 0xB4
28 #define WM8350_DCDC1_TIMEOUTS 0xB5
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm8350/
Dpmic.h19 #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
20 #define WM8350_CSA_FLASH_CONTROL 0xAD
21 #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
22 #define WM8350_CSB_FLASH_CONTROL 0xAF
23 #define WM8350_DCDC_LDO_REQUESTED 0xB0
24 #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
25 #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
26 #define WM8350_POWER_CHECK_COMPARATOR 0xB3
27 #define WM8350_DCDC1_CONTROL 0xB4
28 #define WM8350_DCDC1_TIMEOUTS 0xB5
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Dbmp.h12 return 0x0000; in bmp_version()
18 if (bmp_version(bios) >= 0x0300) in bmp_mem_init_table()
20 return 0x0000; in bmp_mem_init_table()
26 if (bmp_version(bios) >= 0x0300) in bmp_sdr_seq_table()
28 return 0x0000; in bmp_sdr_seq_table()
34 if (bmp_version(bios) >= 0x0300) in bmp_ddr_seq_table()
36 return 0x0000; in bmp_ddr_seq_table()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Dbmp.h12 return 0x0000; in bmp_version()
18 if (bmp_version(bios) >= 0x0300) in bmp_mem_init_table()
20 return 0x0000; in bmp_mem_init_table()
26 if (bmp_version(bios) >= 0x0300) in bmp_sdr_seq_table()
28 return 0x0000; in bmp_sdr_seq_table()
34 if (bmp_version(bios) >= 0x0300) in bmp_ddr_seq_table()
36 return 0x0000; in bmp_ddr_seq_table()
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dprcm43xx.h15 #define AM43XX_PRM_OCP_SOCKET_INST 0x0000
16 #define AM43XX_PRM_MPU_INST 0x0300
17 #define AM43XX_PRM_GFX_INST 0x0400
18 #define AM43XX_PRM_RTC_INST 0x0500
19 #define AM43XX_PRM_TAMPER_INST 0x0600
20 #define AM43XX_PRM_CEFUSE_INST 0x0700
21 #define AM43XX_PRM_PER_INST 0x0800
22 #define AM43XX_PRM_WKUP_INST 0x2000
23 #define AM43XX_PRM_DEVICE_INST 0x4000
26 #define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/
Dnv04_fbcon.c44 PUSH_NVSQ(push, NV05F, 0x0300, (region->sy << 16) | region->sx, in nv04_fbcon_copyarea()
45 0x0304, (region->dy << 16) | region->dx, in nv04_fbcon_copyarea()
46 0x0308, (region->height << 16) | region->width); in nv04_fbcon_copyarea()
48 return 0; in nv04_fbcon_copyarea()
64 PUSH_NVSQ(push, NV04A, 0x02fc, (rect->rop != ROP_COPY) ? 1 : 3); in nv04_fbcon_fillrect()
67 PUSH_NVSQ(push, NV04A, 0x03fc, ((uint32_t *)info->pseudo_palette)[rect->color]); in nv04_fbcon_fillrect()
69 PUSH_NVSQ(push, NV04A, 0x03fc, rect->color); in nv04_fbcon_fillrect()
70 PUSH_NVSQ(push, NV04A, 0x0400, (rect->dx << 16) | rect->dy, in nv04_fbcon_fillrect()
71 0x0404, (rect->width << 16) | rect->height); in nv04_fbcon_fillrect()
73 return 0; in nv04_fbcon_fillrect()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-mv78xx0/
Dbridge-regs.h8 #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
9 #define L2_WRITETHROUGH 0x00020000
11 #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
12 #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
13 #define SOFT_RESET_OUT_EN 0x00000004
15 #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
16 #define SOFT_RESET 0x00000001
18 #define BRIDGE_INT_TIMER1_CLR (~0x0004)
20 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)
21 #define IRQ_CAUSE_ERR_OFF 0x0000
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/include/
Dbrcmu_d11.h20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
23 #define BRCMU_CHSPEC_CH_MASK 0x00ff
24 #define BRCMU_CHSPEC_CH_SHIFT 0
25 #define BRCMU_CHSPEC_CHL_MASK 0x000f
26 #define BRCMU_CHSPEC_CHL_SHIFT 0
27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/include/
Dbrcmu_d11.h20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
23 #define BRCMU_CHSPEC_CH_MASK 0x00ff
24 #define BRCMU_CHSPEC_CH_SHIFT 0
25 #define BRCMU_CHSPEC_CHL_MASK 0x000f
26 #define BRCMU_CHSPEC_CHL_SHIFT 0
27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dmxms.c42 case 0x0200: in mxms_version()
43 case 0x0201: in mxms_version()
44 case 0x0300: in mxms_version()
51 return 0x0000; in mxms_version()
70 u8 *mxms = mxms_data(mxm), sum = 0; in mxms_checksum()
84 if (*(u32 *)mxms != 0x5f4d584d) { in mxms_valid()
104 u8 type = desc[0] & 0x0f; in mxms_foreach()
105 u8 headerlen = 0; in mxms_foreach()
106 u8 recordlen = 0; in mxms_foreach()
107 u8 entries = 0; in mxms_foreach()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dmxms.c42 case 0x0200: in mxms_version()
43 case 0x0201: in mxms_version()
44 case 0x0300: in mxms_version()
51 return 0x0000; in mxms_version()
70 u8 *mxms = mxms_data(mxm), sum = 0; in mxms_checksum()
84 if (*(u32 *)mxms != 0x5f4d584d) { in mxms_valid()
104 u8 type = desc[0] & 0x0f; in mxms_foreach()
105 u8 headerlen = 0; in mxms_foreach()
106 u8 recordlen = 0; in mxms_foreach()
107 u8 entries = 0; in mxms_foreach()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-mv78xx0/
Dbridge-regs.h12 #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
13 #define L2_WRITETHROUGH 0x00020000
15 #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
16 #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
17 #define SOFT_RESET_OUT_EN 0x00000004
19 #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
20 #define SOFT_RESET 0x00000001
22 #define BRIDGE_INT_TIMER1_CLR (~0x0004)
24 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)
25 #define IRQ_CAUSE_ERR_OFF 0x0000
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/wm831x/
Dregulator.h14 * R16462 (0x404E) - Current Sink 1
16 #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
17 #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
20 #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
21 #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
34 #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
Dregulator.h14 * R16462 (0x404E) - Current Sink 1
16 #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
17 #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
20 #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
21 #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
34 #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/marvell/libertas/
Dradiotap.h17 0)
19 #define IEEE80211_FC_VERSION_MASK 0x0003
20 #define IEEE80211_FC_TYPE_MASK 0x000c
21 #define IEEE80211_FC_TYPE_MGT 0x0000
22 #define IEEE80211_FC_TYPE_CTL 0x0004
23 #define IEEE80211_FC_TYPE_DATA 0x0008
24 #define IEEE80211_FC_SUBTYPE_MASK 0x00f0
25 #define IEEE80211_FC_TOFROMDS_MASK 0x0300
26 #define IEEE80211_FC_TODS_MASK 0x0100
27 #define IEEE80211_FC_FROMDS_MASK 0x0200
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/marvell/libertas/
Dradiotap.h17 0)
19 #define IEEE80211_FC_VERSION_MASK 0x0003
20 #define IEEE80211_FC_TYPE_MASK 0x000c
21 #define IEEE80211_FC_TYPE_MGT 0x0000
22 #define IEEE80211_FC_TYPE_CTL 0x0004
23 #define IEEE80211_FC_TYPE_DATA 0x0008
24 #define IEEE80211_FC_SUBTYPE_MASK 0x00f0
25 #define IEEE80211_FC_TOFROMDS_MASK 0x0300
26 #define IEEE80211_FC_TODS_MASK 0x0100
27 #define IEEE80211_FC_FROMDS_MASK 0x0200
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dprcm43xx.h18 #define AM43XX_PRM_OCP_SOCKET_INST 0x0000
19 #define AM43XX_PRM_MPU_INST 0x0300
20 #define AM43XX_PRM_GFX_INST 0x0400
21 #define AM43XX_PRM_RTC_INST 0x0500
22 #define AM43XX_PRM_TAMPER_INST 0x0600
23 #define AM43XX_PRM_CEFUSE_INST 0x0700
24 #define AM43XX_PRM_PER_INST 0x0800
25 #define AM43XX_PRM_WKUP_INST 0x2000
26 #define AM43XX_PRM_DEVICE_INST 0x4000
29 #define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-dove/
Dbridge-regs.h9 #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000)
11 #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
12 #define CPU_CTRL_PCIE0_LINK 0x00000001
13 #define CPU_RESET 0x00000002
14 #define CPU_CTRL_PCIE1_LINK 0x00000008
16 #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
17 #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
18 #define SOFT_RESET_OUT_EN 0x00000004
20 #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
21 #define SOFT_RESET 0x00000001
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-dove/
Dbridge-regs.h14 #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000)
16 #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
17 #define CPU_CTRL_PCIE0_LINK 0x00000001
18 #define CPU_RESET 0x00000002
19 #define CPU_CTRL_PCIE1_LINK 0x00000008
21 #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
22 #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
23 #define SOFT_RESET_OUT_EN 0x00000004
25 #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
26 #define SOFT_RESET 0x00000001
[all …]
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
Dport.h16 /* Offset 0x00: Port Status Register */
17 #define MV88E6XXX_PORT_STS 0x00
18 #define MV88E6XXX_PORT_STS_PAUSE_EN 0x8000
19 #define MV88E6XXX_PORT_STS_MY_PAUSE 0x4000
20 #define MV88E6XXX_PORT_STS_HD_FLOW 0x2000
21 #define MV88E6XXX_PORT_STS_PHY_DETECT 0x1000
22 #define MV88E6250_PORT_STS_LINK 0x1000
23 #define MV88E6250_PORT_STS_PORTMODE_MASK 0x0f00
24 #define MV88E6250_PORT_STS_PORTMODE_PHY_10_HALF 0x0800
25 #define MV88E6250_PORT_STS_PORTMODE_PHY_100_HALF 0x0900
[all …]
/kernel/linux/linux-6.6/include/media/i2c/
Dm52790.h14 #define M52790_SW1_IN_MASK 0x0003
15 #define M52790_SW1_IN_TUNER 0x0000
16 #define M52790_SW1_IN_V2 0x0001
17 #define M52790_SW1_IN_V3 0x0002
18 #define M52790_SW1_IN_V4 0x0003
21 #define M52790_SW1_YCMIX 0x0004
26 #define M52790_SW2_IN_MASK 0x0300
27 #define M52790_SW2_IN_TUNER 0x0000
28 #define M52790_SW2_IN_V2 0x0100
29 #define M52790_SW2_IN_V3 0x0200
[all …]

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