Searched +full:0 +full:x04000000 (Results 1 – 25 of 1176) sorted by relevance
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| /kernel/linux/linux-6.6/arch/sh/include/mach-se/mach/ |
| D | se7751.h | 19 #define PA_ROM 0x00000000 /* EPROM */
20 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
21 #define PA_FROM 0x01000000 /* EPROM */
22 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
23 #define PA_EXT1 0x04000000
24 #define PA_EXT1_SIZE 0x04000000
25 #define PA_EXT2 0x08000000
26 #define PA_EXT2_SIZE 0x04000000
27 #define PA_SDRAM 0x0c000000
28 #define PA_SDRAM_SIZE 0x04000000
[all …]
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| D | se.h | 16 #define PA_ROM 0x00000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
18 #define PA_FROM 0x01000000 /* EPROM */
19 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
20 #define PA_EXT1 0x04000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_EXT2 0x08000000
23 #define PA_EXT2_SIZE 0x04000000
24 #define PA_SDRAM 0x0c000000
25 #define PA_SDRAM_SIZE 0x04000000
[all …]
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| D | se7343.h | 16 /* Area 0 */
17 #define PA_ROM 0x00000000 /* EPROM */
18 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
19 #define PA_FROM 0x00400000 /* Flash ROM */
20 #define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
21 #define PA_SRAM 0x00800000 /* SRAM */
22 #define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
24 #define PA_EXT1 0x04000000
25 #define PA_EXT1_SIZE 0x04000000
27 #define PA_EXT2 0x08000000
[all …]
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| D | se7721.h | 16 #define PA_ROM 0xa0000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
18 #define PA_FROM 0xa1000000 /* Flash-ROM */
19 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
20 #define PA_EXT1 0xa4000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
23 #define PA_SDRAM_SIZE 0x04000000
25 #define PA_EXT4 0xb0000000
26 #define PA_EXT4_SIZE 0x04000000
[all …]
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| /kernel/linux/linux-5.10/arch/sh/include/mach-se/mach/ |
| D | se7751.h | 19 #define PA_ROM 0x00000000 /* EPROM */
20 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
21 #define PA_FROM 0x01000000 /* EPROM */
22 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
23 #define PA_EXT1 0x04000000
24 #define PA_EXT1_SIZE 0x04000000
25 #define PA_EXT2 0x08000000
26 #define PA_EXT2_SIZE 0x04000000
27 #define PA_SDRAM 0x0c000000
28 #define PA_SDRAM_SIZE 0x04000000
[all …]
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| D | se.h | 16 #define PA_ROM 0x00000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
18 #define PA_FROM 0x01000000 /* EPROM */
19 #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
20 #define PA_EXT1 0x04000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_EXT2 0x08000000
23 #define PA_EXT2_SIZE 0x04000000
24 #define PA_SDRAM 0x0c000000
25 #define PA_SDRAM_SIZE 0x04000000
[all …]
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| D | se7343.h | 16 /* Area 0 */
17 #define PA_ROM 0x00000000 /* EPROM */
18 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
19 #define PA_FROM 0x00400000 /* Flash ROM */
20 #define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
21 #define PA_SRAM 0x00800000 /* SRAM */
22 #define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
24 #define PA_EXT1 0x04000000
25 #define PA_EXT1_SIZE 0x04000000
27 #define PA_EXT2 0x08000000
[all …]
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| D | se7721.h | 16 #define PA_ROM 0xa0000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
18 #define PA_FROM 0xa1000000 /* Flash-ROM */
19 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
20 #define PA_EXT1 0xa4000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
23 #define PA_SDRAM_SIZE 0x04000000
25 #define PA_EXT4 0xb0000000
26 #define PA_EXT4_SIZE 0x04000000
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/ |
| D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/ |
| D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/ |
| D | rtsm_ve-motherboard.dtsi | 13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
[all …]
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| D | juno-motherboard.dtsi | 13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
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| D | foundation-v8.dtsi | 12 /memreserve/ 0x80000000 0x00010000;
32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0 0x0>;
43 reg = <0x0 0x1>;
49 reg = <0x0 0x2>;
55 reg = <0x0 0x3>;
68 reg = <0x00000000 0x80000000 0 0x80000000>,
69 <0x00000008 0x80000000 0 0x80000000>;
96 reg = <0x0 0x2a440000 0 0x1000>,
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/ |
| D | rtsm_ve-aemv8a.dts | 15 /memreserve/ 0x80000000 0x00010000;
37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0x0 0x0>;
44 cpu-release-addr = <0x0 0x8000fff8>;
50 reg = <0x0 0x1>;
52 cpu-release-addr = <0x0 0x8000fff8>;
58 reg = <0x0 0x2>;
60 cpu-release-addr = <0x0 0x8000fff8>;
66 reg = <0x0 0x3>;
[all …]
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| D | vexpress-v2f-1xv7-ca53x2.dts | 20 arm,hbi = <0x247>;
21 arm,vexpress,site = <0xf>;
42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0 0>;
54 reg = <0 1>;
65 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
73 /* Chipselect 2 is physically at 0x18000000 */
77 reg = <0 0x18000000 0 0x00800000>;
85 #address-cells = <0>;
[all …]
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| D | foundation-v8.dtsi | 12 /memreserve/ 0x80000000 0x00010000;
32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0 0x0>;
43 reg = <0x0 0x1>;
49 reg = <0x0 0x2>;
55 reg = <0x0 0x3>;
66 reg = <0x00000000 0x80000000 0 0x80000000>,
67 <0x00000008 0x80000000 0 0x80000000>;
89 reg = <0x0 0x2a440000 0 0x1000>,
[all …]
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| D | fvp-base-revc.dts | 15 /memreserve/ 0x80000000 0x00010000;
43 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0 0x000>;
54 reg = <0x0 0x100>;
60 reg = <0x0 0x200>;
66 reg = <0x0 0x300>;
72 reg = <0x0 0x10000>;
78 reg = <0x0 0x10100>;
84 reg = <0x0 0x10200>;
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | sbc8548.dts | 20 reg = <0xe0000000 0x5000>;
23 ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
24 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
25 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
26 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
27 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
30 flash@0,0 {
34 reg = <0x0 0x0 0x800000>;
37 partition@0 {
40 reg = <0x00000000 0x007a0000>;
[all …]
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| D | sbc8548-altflash.dts | 23 reg = <0xe0000000 0x5000>;
26 ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
27 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
28 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
29 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
30 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
32 flash@0,0 {
35 reg = <0x0 0x0 0x04000000>;
39 partition@0 {
42 reg = <0x00000000 0x03f00000>;
[all …]
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| /kernel/linux/linux-6.6/include/linux/ |
| D | fsl_ifc.h | 26 #define FSL_IFC_VERSION_MASK 0x0F0F0000
27 #define FSL_IFC_VERSION_1_0_0 0x01000000
28 #define FSL_IFC_VERSION_1_1_0 0x01010000
29 #define FSL_IFC_VERSION_2_0_0 0x02000000
37 #define CSPR_BA 0xFFFF0000
39 #define CSPR_PORT_SIZE 0x00000180
42 #define CSPR_PORT_SIZE_8 0x00000080
44 #define CSPR_PORT_SIZE_16 0x00000100
46 #define CSPR_PORT_SIZE_32 0x00000180
48 #define CSPR_WP 0x00000040
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | fsl_ifc.h | 26 #define FSL_IFC_VERSION_MASK 0x0F0F0000
27 #define FSL_IFC_VERSION_1_0_0 0x01000000
28 #define FSL_IFC_VERSION_1_1_0 0x01010000
29 #define FSL_IFC_VERSION_2_0_0 0x02000000
37 #define CSPR_BA 0xFFFF0000
39 #define CSPR_PORT_SIZE 0x00000180
42 #define CSPR_PORT_SIZE_8 0x00000080
44 #define CSPR_PORT_SIZE_16 0x00000100
46 #define CSPR_PORT_SIZE_32 0x00000180
48 #define CSPR_WP 0x00000040
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi.yaml | 46 <bank-number> 0 <address of the bank> <size>
49 "^.*@[0-4],[a-f0-9]+$":
73 reg = <0x58002000 0x1000>;
77 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
78 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
79 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
80 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
81 <4 0 0x80000000 0x10000000>; /* NAND */
83 psram@0,0 {
85 reg = <0 0x00000000 0x100000>;
[all …]
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| /kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/ |
| D | sh7785lcr.h | 11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
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| /kernel/linux/linux-6.6/arch/sh/include/mach-common/mach/ |
| D | sh7785lcr.h | 11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | vexpress-v2p-ca5s.dts | 16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
55 reg = <0x80000000 0x40000000>;
63 /* Chipselect 2 is physically at 0x18000000 */
67 reg = <0x18000000 0x00800000>;
74 reg = <0x2a110000 0x1000>;
75 interrupts = <0 85 4>;
[all …]
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