Searched +full:0 +full:x05000000 (Results 1 – 25 of 137) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | cavium-mdio.txt | 15 - #size-cells: Must be <0>. MDIO addresses have no size component.
23 #size-cells = <0>;
24 reg = <0x11800 0x00001800 0x0 0x40>;
26 ethernet-phy@0 {
28 reg = <0>;
58 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
59 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
60 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
65 #size-cells = <0>;
66 reg = <0x87e0 0x05003800 0x0 0x30>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | cavium-mdio.txt | 15 - #size-cells: Must be <0>. MDIO addresses have no size component.
23 #size-cells = <0>;
24 reg = <0x11800 0x00001800 0x0 0x40>;
26 ethernet-phy@0 {
28 reg = <0>;
58 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
59 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
60 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
65 #size-cells = <0>;
66 reg = <0x87e0 0x05003800 0x0 0x30>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | vr1000.h | 14 #define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */
28 #define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000))
32 #define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */
33 #define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
35 #define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */
36 #define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
38 #define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */
39 #define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
41 #define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */
42 #define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
[all …]
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| D | bast.h | 16 #define BAST_CPLD_CTRL1_LRCOFF (0x00)
17 #define BAST_CPLD_CTRL1_LRCADC (0x01)
18 #define BAST_CPLD_CTRL1_LRCDAC (0x02)
19 #define BAST_CPLD_CTRL1_LRCARM (0x03)
20 #define BAST_CPLD_CTRL1_LRMASK (0x03)
24 #define BAST_CPLD_CTRL2_WNAND (0x04)
25 #define BAST_CPLD_CTLR2_IDERST (0x08)
29 #define BAST_CPLD_CTRL3_IDMASK (0x0e)
30 #define BAST_CPLD_CTRL3_ROMWEN (0x01)
34 #define BAST_CPLD_CTRL4_LLAT (0x01)
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | amlogic-t7-a311d2-khadas-vim4.dts | 18 memory@0 {
20 reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
30 reg = <0x0 0x05000000 0x0 0x300000>;
36 reg = <0x0 0x05300000 0x0 0x2000000>;
45 #clock-cells = <0>;
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| /kernel/linux/linux-6.6/drivers/net/ethernet/ibm/emac/ |
| D | tah.h | 52 #define TAH_MR_CVR 0x80000000
53 #define TAH_MR_SR 0x40000000
54 #define TAH_MR_ST_256 0x01000000
55 #define TAH_MR_ST_512 0x02000000
56 #define TAH_MR_ST_768 0x03000000
57 #define TAH_MR_ST_1024 0x04000000
58 #define TAH_MR_ST_1280 0x05000000
59 #define TAH_MR_ST_1536 0x06000000
60 #define TAH_MR_TFS_16KB 0x00000000
61 #define TAH_MR_TFS_2KB 0x00200000
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/ibm/emac/ |
| D | tah.h | 52 #define TAH_MR_CVR 0x80000000
53 #define TAH_MR_SR 0x40000000
54 #define TAH_MR_ST_256 0x01000000
55 #define TAH_MR_ST_512 0x02000000
56 #define TAH_MR_ST_768 0x03000000
57 #define TAH_MR_ST_1024 0x04000000
58 #define TAH_MR_ST_1280 0x05000000
59 #define TAH_MR_ST_1536 0x06000000
60 #define TAH_MR_TFS_16KB 0x00000000
61 #define TAH_MR_TFS_2KB 0x00200000
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | reg_8xx.h | 29 #define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
30 #define SPRN_NRI 82 /* Non recoverable interrupt (EE=0, RI=0) */
38 #define LCTRL1_CTE_GT 0xc0000000
39 #define LCTRL1_CTF_LT 0x14000000
40 #define LCTRL1_CRWE_RW 0x00000000
41 #define LCTRL1_CRWE_RO 0x00040000
42 #define LCTRL1_CRWE_WO 0x000c0000
43 #define LCTRL1_CRWF_RW 0x00000000
44 #define LCTRL1_CRWF_RO 0x00010000
45 #define LCTRL1_CRWF_WO 0x00030000
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | reg_8xx.h | 29 #define SPRN_EID 81 /* External interrupt disable (EE=0, RI=1) */
30 #define SPRN_NRI 82 /* Non recoverable interrupt (EE=0, RI=0) */
38 #define LCTRL1_CTE_GT 0xc0000000
39 #define LCTRL1_CTF_LT 0x14000000
40 #define LCTRL1_CRWE_RW 0x00000000
41 #define LCTRL1_CRWE_RO 0x00040000
42 #define LCTRL1_CRWE_WO 0x000c0000
43 #define LCTRL1_CRWF_RW 0x00000000
44 #define LCTRL1_CRWF_RO 0x00010000
45 #define LCTRL1_CRWF_WO 0x00030000
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/ |
| D | bcm53016-dlink-dwl-8610ap.dts | 13 memory@0 {
16 reg = <0x00000000 0x08000000>,
17 <0x88000000 0x08000000>;
26 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
66 * Flash memory at 0x1e000000-0x1fffffff
72 reg = <0x1e080000 0x00020000>;
112 trx@0 {
114 reg = <0x00000000 0x02800000>;
121 reg = <0x02800000 0x02800000>;
128 reg = <0x05000000 0x03000000>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos-srom.yaml | 33 <bank-number> 0 <parent address of bank> <size>
37 "^.*@[0-3],[a-f0-9]+$":
50 typically 0 as this is the start of the bank.
74 Tacp: Page mode access cycle at Page mode (0 - 15)
75 Tcah: Address holding time after CSn (0 - 15)
76 Tcoh: Chip selection hold on OEn (0 - 15)
77 Tacc: Access cycle (0 - 31, the actual time is N + 1)
78 Tcos: Chip selection set-up before OEn (0 - 15)
79 Tacs: Address set-up before CSn (0 - 15)
96 reg = <0x12560000 0x14>;
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| D | gen7_renderstate.c | 11 0x0000000c,
12 0x00000010,
13 0x00000018,
14 0x000001ec,
19 0x69040000,
20 0x61010008,
21 0x00000000,
22 0x00000001, /* reloc */
23 0x00000001, /* reloc */
24 0x00000000,
[all …]
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| D | gen6_renderstate.c | 11 0x00000020,
12 0x00000024,
13 0x0000002c,
14 0x000001e0,
15 0x000001e4,
20 0x69040000,
21 0x790d0001,
22 0x00000000,
23 0x00000000,
24 0x78180000,
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos-srom.yaml | 35 <bank-number> 0 <parent address of bank> <size>
39 "^.*@[0-3],[a-f0-9]+$":
53 typically 0 as this is the start of the bank.
77 Tacp: Page mode access cycle at Page mode (0 - 15)
78 Tcah: Address holding time after CSn (0 - 15)
79 Tcoh: Chip selection hold on OEn (0 - 15)
80 Tacc: Access cycle (0 - 31, the actual time is N + 1)
81 Tcos: Chip selection set-up before OEn (0 - 15)
82 Tacs: Address set-up before CSn (0 - 15)
99 reg = <0x12560000 0x14>;
[all …]
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| /kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/ |
| D | urquell.h | 6 * ------ 0x00000000 ------------------------------------
8 * -----+ 0x04000000 ------------------------------------
10 * -----+ 0x08000000 ------------------------------------
13 * -----+ 0x10000000 ------------------------------------
15 * -----+ 0x14000000 ------------------------------------
17 * -----+ 0x18000000 ------------------------------------
19 * -----+ 0x1c000000 ------------------------------------
24 #define NOR_FLASH_ADDR 0x00000000
25 #define NOR_FLASH_SIZE 0x04000000
27 #define CS1_BASE 0x05000000
[all …]
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| /kernel/linux/linux-6.6/arch/sh/include/mach-common/mach/ |
| D | urquell.h | 6 * ------ 0x00000000 ------------------------------------
8 * -----+ 0x04000000 ------------------------------------
10 * -----+ 0x08000000 ------------------------------------
13 * -----+ 0x10000000 ------------------------------------
15 * -----+ 0x14000000 ------------------------------------
17 * -----+ 0x18000000 ------------------------------------
19 * -----+ 0x1c000000 ------------------------------------
24 #define NOR_FLASH_ADDR 0x00000000
25 #define NOR_FLASH_SIZE 0x04000000
27 #define CS1_BASE 0x05000000
[all …]
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | elf.h | 25 #define EF_ARM_EABI_MASK 0xff000000
26 #define EF_ARM_EABI_UNKNOWN 0x00000000
27 #define EF_ARM_EABI_VER1 0x01000000
28 #define EF_ARM_EABI_VER2 0x02000000
29 #define EF_ARM_EABI_VER3 0x03000000
30 #define EF_ARM_EABI_VER4 0x04000000
31 #define EF_ARM_EABI_VER5 0x05000000
33 #define EF_ARM_BE8 0x00800000 /* ABI 4,5 */
34 #define EF_ARM_LE8 0x00400000 /* ABI 4,5 */
35 #define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */
[all …]
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | elf.h | 25 #define EF_ARM_EABI_MASK 0xff000000
26 #define EF_ARM_EABI_UNKNOWN 0x00000000
27 #define EF_ARM_EABI_VER1 0x01000000
28 #define EF_ARM_EABI_VER2 0x02000000
29 #define EF_ARM_EABI_VER3 0x03000000
30 #define EF_ARM_EABI_VER4 0x04000000
31 #define EF_ARM_EABI_VER5 0x05000000
33 #define EF_ARM_BE8 0x00800000 /* ABI 4,5 */
34 #define EF_ARM_LE8 0x00400000 /* ABI 4,5 */
35 #define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | gen7_renderstate.c | 29 0x0000000c,
30 0x00000010,
31 0x00000018,
32 0x000001ec,
37 0x69040000,
38 0x61010008,
39 0x00000000,
40 0x00000001, /* reloc */
41 0x00000001, /* reloc */
42 0x00000000,
[all …]
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| D | gen6_renderstate.c | 29 0x00000020,
30 0x00000024,
31 0x0000002c,
32 0x000001e0,
33 0x000001e4,
38 0x69040000,
39 0x790d0001,
40 0x00000000,
41 0x00000000,
42 0x78180000,
[all …]
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| /kernel/linux/linux-6.6/arch/sh/boards/ |
| D | board-urquell.c | 32 * SW2 0x1x xxxx -> little endian
39 * 0x00000000 - 0x04000000 (CS0) Nor Flash
40 * 0x04000000 - 0x04200000 (CS1) SRAM
41 * 0x05000000 - 0x05800000 (CS1) on board register
42 * 0x05800000 - 0x06000000 (CS1) LAN91C111
43 * 0x06000000 - 0x06400000 (CS1) PCMCIA
44 * 0x08000000 - 0x10000000 (CS2-CS3) DDR3
45 * 0x10000000 - 0x14000000 (CS4) PCIe
46 * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
47 * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
[all …]
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| /kernel/linux/linux-5.10/arch/sh/boards/ |
| D | board-urquell.c | 32 * SW2 0x1x xxxx -> little endian
39 * 0x00000000 - 0x04000000 (CS0) Nor Flash
40 * 0x04000000 - 0x04200000 (CS1) SRAM
41 * 0x05000000 - 0x05800000 (CS1) on board register
42 * 0x05800000 - 0x06000000 (CS1) LAN91C111
43 * 0x06000000 - 0x06400000 (CS1) PCMCIA
44 * 0x08000000 - 0x10000000 (CS2-CS3) DDR3
45 * 0x10000000 - 0x14000000 (CS4) PCIe
46 * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
47 * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/visconti/ |
| D | pinctrl-tmpv7700.c | 15 #define tmpv7700_MAGIC_NUM 0x4932f70e
18 #define REG_KEY_CTRL 0x0000
19 #define REG_KEY_CMD 0x0004
20 #define REG_PINMUX1 0x3000
21 #define REG_PINMUX2 0x3004
22 #define REG_PINMUX3 0x3008
23 #define REG_PINMUX4 0x300c
24 #define REG_PINMUX5 0x3010
25 #define REG_IOSET 0x3014
26 #define REG_IO_VSEL 0x3018
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/visconti/ |
| D | pinctrl-tmpv7700.c | 15 #define tmpv7700_MAGIC_NUM 0x4932f70e
18 #define REG_KEY_CTRL 0x0000
19 #define REG_KEY_CMD 0x0004
20 #define REG_PINMUX1 0x3000
21 #define REG_PINMUX2 0x3004
22 #define REG_PINMUX3 0x3008
23 #define REG_PINMUX4 0x300c
24 #define REG_PINMUX5 0x3010
25 #define REG_IOSET 0x3014
26 #define REG_IO_VSEL 0x3018
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ti/ |
| D | k3-udma.yaml | 53 for source thread IDs (rx): 0 - 0x7fff
54 for destination thread IDs (tx): 0x8000 - 0xffff
158 ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>;
164 reg = <0x0 0x31150000 0x0 0x100>,
165 <0x0 0x34000000 0x0 0x100000>,
166 <0x0 0x35000000 0x0 0x100000>;
177 ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
178 <0x2>; /* TX_CHAN */
179 ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
180 <0x5>; /* RX_CHAN */
[all …]
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