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/kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dmpc8536ds_36b.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0xf 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
35 0x2 0x0 0xf 0xffa00000 0x00040000
36 0x3 0x0 0xf 0xffdf0000 0x00008000>;
40 ranges = <0x0 0xf 0xffe00000 0x100000>;
44 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dmpc8536ds.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
35 0x2 0x0 0x0 0xffa00000 0x00040000
36 0x3 0x0 0x0 0xffdf0000 0x00008000>;
40 ranges = <0x0 0 0xffe00000 0x100000>;
44 reg = <0 0xffe08000 0 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dmpc8536ds_36b.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0xf 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
35 0x2 0x0 0xf 0xffa00000 0x00040000
36 0x3 0x0 0xf 0xffdf0000 0x00008000>;
40 ranges = <0x0 0xf 0xffe00000 0x100000>;
44 reg = <0xf 0xffe08000 0 0x1000>;
[all …]
Dmpc8536ds.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
35 0x2 0x0 0x0 0xffa00000 0x00040000
36 0x3 0x0 0x0 0xffdf0000 0x00008000>;
40 ranges = <0x0 0 0xffe00000 0x100000>;
44 reg = <0 0xffe08000 0 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/
Dbcm3384_zephyr.dtsi7 memory@0 {
11 reg = <0x0 0x08000000>;
16 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
35 #address-cells = <0>;
45 #clock-cells = <0>;
60 dma-ranges = <0x00000000 0x08000000 0x08000000>,
61 <0x08000000 0x00000000 0x08000000>;
65 reg = <0x14e00038 0x4 0x14e0003c 0x4>,
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm3384_zephyr.dtsi7 memory@0 {
11 reg = <0x0 0x08000000>;
16 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
35 #address-cells = <0>;
45 #clock-cells = <0>;
60 dma-ranges = <0x00000000 0x08000000 0x08000000>,
61 <0x08000000 0x00000000 0x08000000>;
65 reg = <0x14e00038 0x4 0x14e0003c 0x4>,
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6ul-kontron-n6310-som.dtsi16 reg = <0x80000000 0x10000000>;
22 flash@0 {
29 reg = <0>;
31 partition@0 {
33 reg = <0x00000000 0x08000000>;
38 reg = <0x08000000 0x08000000>;
Dethernut5.dts19 reg = <0x20000000 0x08000000>;
39 timer@0 {
41 reg = <0>, <1>;
74 pinctrl-0 = <&pinctrl_nand_cs>;
78 reg = <0x3 0x0 0x800000>;
90 root@0 {
92 reg = <0x0 0x08000000>;
97 reg = <0x08000000 0x38000000>;
110 i2c-gpio-0 {
115 reg = <0x51>;
Dbcm47094-dlink-dir-885l.dts22 memory@0 {
24 reg = <0x00000000 0x08000000>,
25 <0x88000000 0x08000000>;
29 nandcs@0 {
35 partition@0 {
37 reg = <0x00000000 0x08000000>;
48 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
Dimx6ull-kontron-n6411-som.dtsi15 reg = <0x80000000 0x20000000>;
21 flash@0 {
28 reg = <0>;
30 partition@0 {
32 reg = <0x00000000 0x08000000>;
37 reg = <0x08000000 0x18000000>;
Dimx6ul-kontron-n6311-som.dtsi15 reg = <0x80000000 0x20000000>;
21 flash@0 {
28 reg = <0>;
30 partition@0 {
32 reg = <0x00000000 0x08000000>;
37 reg = <0x08000000 0x18000000>;
Dbcm4709-linksys-ea9200.dts19 memory@0 {
21 reg = <0x00000000 0x08000000>,
22 <0x88000000 0x08000000>;
28 #size-cells = <0>;
/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am64.dtsi53 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
57 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
58 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
59 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
60 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
62 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhip05-d02.dts17 memory@0 {
19 reg = <0x0 0x00000000 0x0 0x80000000>;
33 #size-cells = <0>;
39 debounce-interval = <0>;
56 ranges = <0 0 0x0 0x90000000 0x08000000>,
57 <1 0 0x0 0x98000000 0x08000000>;
59 nor-flash@0,0 {
63 reg = <0 0x0 0x08000000>;
66 partition@0 {
68 reg = <0x0 0x300000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-rpc/include/mach/
Dhardware.h25 #define RPC_RAM_SIZE 0x10000000
26 #define RPC_RAM_START 0x10000000
28 #define EASI_SIZE 0x08000000 /* EASI I/O */
29 #define EASI_START 0x08000000
30 #define EASI_BASE IOMEM(0xe5000000)
32 #define IO_START 0x03000000 /* I/O */
33 #define IO_SIZE 0x01000000
34 #define IO_BASE IOMEM(0xe0000000)
36 #define SCREEN_START 0x02000000 /* VRAM */
37 #define SCREEN_END 0xdfc00000
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhip05-d02.dts17 memory@0 {
19 reg = <0x0 0x00000000 0x0 0x80000000>;
37 debounce-interval = <0>;
54 ranges = <0 0 0x0 0x90000000 0x08000000>,
55 <1 0 0x0 0x98000000 0x08000000>;
57 nor-flash@0,0 {
61 reg = <0 0x0 0x08000000>;
64 partition@0 {
66 reg = <0x0 0x300000>;
70 reg = <0x300000 0xa00000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-rpc/include/mach/
Dhardware.h25 #define RPC_RAM_SIZE 0x10000000
26 #define RPC_RAM_START 0x10000000
28 #define EASI_SIZE 0x08000000 /* EASI I/O */
29 #define EASI_START 0x08000000
30 #define EASI_BASE IOMEM(0xe5000000)
32 #define IO_START 0x03000000 /* I/O */
33 #define IO_SIZE 0x01000000
34 #define IO_BASE IOMEM(0xe0000000)
36 #define SCREEN_START 0x02000000 /* VRAM */
37 #define SCREEN_END 0xdfc00000
[all …]
/kernel/linux/linux-6.6/include/linux/mtd/
Dndfc.h12 #define NDFC_CMD 0x00
13 #define NDFC_ALE 0x04
14 #define NDFC_DATA 0x08
15 #define NDFC_ECC 0x10
16 #define NDFC_BCFG0 0x30
17 #define NDFC_BCFG1 0x34
18 #define NDFC_BCFG2 0x38
19 #define NDFC_BCFG3 0x3c
20 #define NDFC_CCR 0x40
21 #define NDFC_STAT 0x44
[all …]
/kernel/linux/linux-5.10/include/linux/mtd/
Dndfc.h12 #define NDFC_CMD 0x00
13 #define NDFC_ALE 0x04
14 #define NDFC_DATA 0x08
15 #define NDFC_ECC 0x10
16 #define NDFC_BCFG0 0x30
17 #define NDFC_BCFG1 0x34
18 #define NDFC_BCFG2 0x38
19 #define NDFC_BCFG3 0x3c
20 #define NDFC_CCR 0x40
21 #define NDFC_STAT 0x44
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dethernut5.dts19 reg = <0x20000000 0x08000000>;
39 timer@0 {
41 reg = <0>, <1>;
74 pinctrl-0 = <&pinctrl_nand_cs>;
78 reg = <0x3 0x0 0x800000>;
90 root@0 {
92 reg = <0x0 0x08000000>;
97 reg = <0x08000000 0x38000000>;
110 i2c-gpio-0 {
115 reg = <0x51>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm4708-buffalo-wzr-1166dhp2.dts20 memory@0 {
22 reg = <0x00000000 0x08000000>,
23 <0x88000000 0x08000000>;
Dbcm47094-dlink-dir-885l.dts22 memory@0 {
24 reg = <0x00000000 0x08000000>,
25 <0x88000000 0x08000000>;
29 nand@0 {
35 partition@0 {
38 reg = <0x00000000 0x08000000>;
49 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
127 port@0 {

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