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/kernel/linux/linux-6.6/drivers/staging/media/meson/vdec/
Ddos_regs.h11 #define VDEC_ASSIST_AMR1_INT8 0x00b4
13 #define ASSIST_MBOX1_CLR_REG 0x01d4
14 #define ASSIST_MBOX1_MASK 0x01d8
16 #define MPSR 0x0c04
17 #define MCPU_INTR_MSK 0x0c10
18 #define CPSR 0x0c84
20 #define IMEM_DMA_CTRL 0x0d00
21 #define IMEM_DMA_ADR 0x0d04
22 #define IMEM_DMA_COUNT 0x0d08
23 #define LMEM_DMA_CTRL 0x0d40
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
Ddos_regs.h11 #define VDEC_ASSIST_AMR1_INT8 0x00b4
13 #define ASSIST_MBOX1_CLR_REG 0x01d4
14 #define ASSIST_MBOX1_MASK 0x01d8
16 #define MPSR 0x0c04
17 #define MCPU_INTR_MSK 0x0c10
18 #define CPSR 0x0c84
20 #define IMEM_DMA_CTRL 0x0d00
21 #define IMEM_DMA_ADR 0x0d04
22 #define IMEM_DMA_COUNT 0x0d08
23 #define LMEM_DMA_CTRL 0x0d40
[all …]
/kernel/linux/linux-6.6/drivers/net/dsa/microchip/
Dksz_ptp_reg.h9 #define REG_SW_GLOBAL_LED_OVR__4 0x0120
11 #define LED_OVR_1 BIT(0)
13 #define REG_SW_GLOBAL_LED_SRC__4 0x0128
18 #define REG_PTP_CLK_CTRL 0x0500
26 #define PTP_CLK_RESET BIT(0)
28 #define REG_PTP_RTC_SUB_NANOSEC__2 0x0502
30 #define PTP_RTC_SUB_NANOSEC_M 0x0007
31 #define PTP_RTC_0NS 0x00
33 #define REG_PTP_RTC_NANOSEC 0x0504
35 #define REG_PTP_RTC_SEC 0x0508
[all …]
/kernel/linux/linux-6.6/drivers/iommu/
Dfsl_pamu.h22 #define PAMU_PGC 0x00000000 /* Allows all peripheral accesses */
23 #define PAMU_PE 0x40000000 /* enable PAMU */
26 #define PAMU_OFFSET 0x1000
28 #define PAMU_MMAP_REGS_BASE 0
46 #define PAMU_POES1 0x0040
47 #define PAMU_POES2 0x0044
48 #define PAMU_POEAH 0x0048
49 #define PAMU_POEAL 0x004C
50 #define PAMU_AVS1 0x0050
51 #define PAMU_AVS1_AV 0x1
[all …]
/kernel/linux/linux-5.10/drivers/iommu/
Dfsl_pamu.h22 #define PAMU_PGC 0x00000000 /* Allows all peripheral accesses */
23 #define PAMU_PE 0x40000000 /* enable PAMU */
26 #define PAMU_OFFSET 0x1000
28 #define PAMU_MMAP_REGS_BASE 0
46 #define PAMU_POES1 0x0040
47 #define PAMU_POES2 0x0044
48 #define PAMU_POEAH 0x0048
49 #define PAMU_POEAL 0x004C
50 #define PAMU_AVS1 0x0050
51 #define PAMU_AVS1_AV 0x1
[all …]
/kernel/linux/linux-6.6/include/linux/bcma/
Dbcma_driver_pcie2.h5 #define BCMA_CORE_PCIE2_CLK_CONTROL 0x0000
6 #define PCIE2_CLKC_RST_OE 0x0001 /* When set, drives PCI_RESET out to pin */
7 #define PCIE2_CLKC_RST 0x0002 /* Value driven out to pin */
8 #define PCIE2_CLKC_SPERST 0x0004 /* SurvivePeRst */
9 #define PCIE2_CLKC_DISABLE_L1CLK_GATING 0x0010
10 #define PCIE2_CLKC_DLYPERST 0x0100 /* Delay PeRst to CoE Core */
11 #define PCIE2_CLKC_DISSPROMLD 0x0200 /* DisableSpromLoadOnPerst */
12 #define PCIE2_CLKC_WAKE_MODE_L2 0x1000 /* Wake on L2 */
13 #define BCMA_CORE_PCIE2_RC_PM_CONTROL 0x0004
14 #define BCMA_CORE_PCIE2_RC_PM_STATUS 0x0008
[all …]
/kernel/linux/linux-5.10/include/linux/bcma/
Dbcma_driver_pcie2.h5 #define BCMA_CORE_PCIE2_CLK_CONTROL 0x0000
6 #define PCIE2_CLKC_RST_OE 0x0001 /* When set, drives PCI_RESET out to pin */
7 #define PCIE2_CLKC_RST 0x0002 /* Value driven out to pin */
8 #define PCIE2_CLKC_SPERST 0x0004 /* SurvivePeRst */
9 #define PCIE2_CLKC_DISABLE_L1CLK_GATING 0x0010
10 #define PCIE2_CLKC_DLYPERST 0x0100 /* Delay PeRst to CoE Core */
11 #define PCIE2_CLKC_DISSPROMLD 0x0200 /* DisableSpromLoadOnPerst */
12 #define PCIE2_CLKC_WAKE_MODE_L2 0x1000 /* Wake on L2 */
13 #define BCMA_CORE_PCIE2_RC_PM_CONTROL 0x0004
14 #define BCMA_CORE_PCIE2_RC_PM_STATUS 0x0008
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_4_0_offset.h27 // base address: 0x22000
28 …VCE_STATUS 0x0a01
29 …ne mmVCE_STATUS_BASE_IDX 0
30 …VCE_VCPU_CNTL 0x0a05
31 …ne mmVCE_VCPU_CNTL_BASE_IDX 0
32 …VCE_VCPU_CACHE_OFFSET0 0x0a09
33 …ne mmVCE_VCPU_CACHE_OFFSET0_BASE_IDX 0
34 …VCE_VCPU_CACHE_SIZE0 0x0a0a
35 …ne mmVCE_VCPU_CACHE_SIZE0_BASE_IDX 0
36 …VCE_VCPU_CACHE_OFFSET1 0x0a0b
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_4_0_offset.h27 // base address: 0x22000
28 …VCE_STATUS 0x0a01
29 …ne mmVCE_STATUS_BASE_IDX 0
30 …VCE_VCPU_CNTL 0x0a05
31 …ne mmVCE_VCPU_CNTL_BASE_IDX 0
32 …VCE_VCPU_CACHE_OFFSET0 0x0a09
33 …ne mmVCE_VCPU_CACHE_OFFSET0_BASE_IDX 0
34 …VCE_VCPU_CACHE_SIZE0 0x0a0a
35 …ne mmVCE_VCPU_CACHE_SIZE0_BASE_IDX 0
36 …VCE_VCPU_CACHE_OFFSET1 0x0a0b
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap3xxx-clocks.dtsi9 #clock-cells = <0>;
15 #clock-cells = <0>;
18 reg = <0x0d40>;
22 #clock-cells = <0>;
27 reg = <0x1270>;
32 #clock-cells = <0>;
35 reg = <0x0d70>;
40 #clock-cells = <0>;
48 #clock-cells = <0>;
56 #clock-cells = <0>;
[all …]
Domap36xx-omap3430es2plus-clocks.dtsi9 #clock-cells = <0>;
12 ti,bit-shift = <0>;
13 reg = <0x0a00>;
17 #clock-cells = <0>;
21 reg = <0x0a40>;
22 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
26 #clock-cells = <0>;
32 #clock-cells = <0>;
40 #clock-cells = <0>;
43 reg = <0x0a10>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/hns3/hns3vf/
Dhclgevf_cmd.h12 #define HCLGEVF_CMDQ_RX_INVLD_B 0
49 HCLGEVF_CMD_EXEC_SUCCESS = 0,
64 HCLGEVF_STATUS_SUCCESS = 0,
77 #define HCLGEVF_CMD_FLAG_IN_VALID_SHIFT 0
93 HCLGEVF_OPC_QUERY_FW_VER = 0x0001,
94 HCLGEVF_OPC_QUERY_VF_RSRC = 0x0024,
95 HCLGEVF_OPC_QUERY_DEV_SPECS = 0x0050,
98 HCLGEVF_OPC_QUERY_TX_STATUS = 0x0B03,
99 HCLGEVF_OPC_QUERY_RX_STATUS = 0x0B13,
100 HCLGEVF_OPC_CFG_COM_TQP_QUEUE = 0x0B20,
[all …]
/kernel/linux/linux-5.10/include/linux/ssb/
Dssb_driver_gige.h14 #define SSB_GIGE_PCIIO 0x0000 /* PCI I/O Registers (1024 bytes) */
15 #define SSB_GIGE_RESERVED 0x0400 /* Reserved (1024 bytes) */
16 #define SSB_GIGE_PCICFG 0x0800 /* PCI config space (256 bytes) */
17 #define SSB_GIGE_SHIM_FLUSHSTAT 0x0C00 /* PCI to OCP: Flush status control (32bit) */
18 #define SSB_GIGE_SHIM_FLUSHRDA 0x0C04 /* PCI to OCP: Flush read address (32bit) */
19 #define SSB_GIGE_SHIM_FLUSHTO 0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
20 #define SSB_GIGE_SHIM_BARRIER 0x0C0C /* PCI to OCP: Barrier register (32bit) */
21 #define SSB_GIGE_SHIM_MAOCPSI 0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
22 #define SSB_GIGE_SHIM_SIOCPMA 0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
25 #define SSB_GIGE_TMSHIGH_RGMII 0x00010000 /* Have an RGMII PHY-bus */
[all …]
/kernel/linux/linux-6.6/include/linux/ssb/
Dssb_driver_gige.h14 #define SSB_GIGE_PCIIO 0x0000 /* PCI I/O Registers (1024 bytes) */
15 #define SSB_GIGE_RESERVED 0x0400 /* Reserved (1024 bytes) */
16 #define SSB_GIGE_PCICFG 0x0800 /* PCI config space (256 bytes) */
17 #define SSB_GIGE_SHIM_FLUSHSTAT 0x0C00 /* PCI to OCP: Flush status control (32bit) */
18 #define SSB_GIGE_SHIM_FLUSHRDA 0x0C04 /* PCI to OCP: Flush read address (32bit) */
19 #define SSB_GIGE_SHIM_FLUSHTO 0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
20 #define SSB_GIGE_SHIM_BARRIER 0x0C0C /* PCI to OCP: Barrier register (32bit) */
21 #define SSB_GIGE_SHIM_MAOCPSI 0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
22 #define SSB_GIGE_SHIM_SIOCPMA 0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
25 #define SSB_GIGE_TMSHIGH_RGMII 0x00010000 /* Have an RGMII PHY-bus */
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_1_0_d.h26 #define ixCLIENT0_BM 0x0220
27 #define ixCLIENT0_CD0 0x0210
28 #define ixCLIENT0_CD1 0x0214
29 #define ixCLIENT0_CD2 0x0218
30 #define ixCLIENT0_CD3 0x021C
31 #define ixCLIENT0_CK0 0x0200
32 #define ixCLIENT0_CK1 0x0204
33 #define ixCLIENT0_CK2 0x0208
34 #define ixCLIENT0_CK3 0x020C
35 #define ixCLIENT0_K0 0x01F0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_1_0_d.h26 #define ixCLIENT0_BM 0x0220
27 #define ixCLIENT0_CD0 0x0210
28 #define ixCLIENT0_CD1 0x0214
29 #define ixCLIENT0_CD2 0x0218
30 #define ixCLIENT0_CD3 0x021C
31 #define ixCLIENT0_CK0 0x0200
32 #define ixCLIENT0_CK1 0x0204
33 #define ixCLIENT0_CK2 0x0208
34 #define ixCLIENT0_CK3 0x020C
35 #define ixCLIENT0_K0 0x01F0
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dqcom,sdm845-camss.yaml96 port@0:
321 iommus = <&apps_smmu 0x0808 0x0>,
322 <&apps_smmu 0x0810 0x8>,
323 <&apps_smmu 0x0c08 0x0>,
324 <&apps_smmu 0x0c10 0x8>;
330 reg = <0 0xacb3000 0 0x1000>,
331 <0 0xacba000 0 0x1000>,
332 <0 0xacc8000 0 0x1000>,
333 <0 0xac65000 0 0x1000>,
334 <0 0xac66000 0 0x1000>,
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/st/sti/bdisp/
Dbdisp-reg.h8 /* 0 - General */
87 #define BLT_CTL 0x0A00
88 #define BLT_ITS 0x0A04
89 #define BLT_STA1 0x0A08
90 #define BLT_AQ1_CTL 0x0A60
91 #define BLT_AQ1_IP 0x0A64
92 #define BLT_AQ1_LNA 0x0A68
93 #define BLT_AQ1_STA 0x0A6C
94 #define BLT_ITM0 0x0AD0
96 #define BLT_PLUGS1_OP2 0x0B04
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/sti/bdisp/
Dbdisp-reg.h8 /* 0 - General */
87 #define BLT_CTL 0x0A00
88 #define BLT_ITS 0x0A04
89 #define BLT_STA1 0x0A08
90 #define BLT_AQ1_CTL 0x0A60
91 #define BLT_AQ1_IP 0x0A64
92 #define BLT_AQ1_LNA 0x0A68
93 #define BLT_AQ1_STA 0x0A6C
94 #define BLT_ITM0 0x0AD0
96 #define BLT_PLUGS1_OP2 0x0B04
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dtu102.c30 nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, 0x006f0002); in tu102_gr_init_fecs_exceptions()
42 for (sm = 0; sm < gr->sm_nr; sm++) { in tu102_gr_init_fs()
43 nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + in tu102_gr_init_fs()
55 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in tu102_gr_init_zcull()
60 for (i = 0; i < tile_nr; i += 8) { in tu102_gr_init_zcull()
61 for (data = 0, j = 0; j < 8 && i + j < gr->tpc_total; j++) { in tu102_gr_init_zcull()
65 nvkm_wr32(device, GPC_BCAST(0x0980 + ((i / 8) * 4)), data); in tu102_gr_init_zcull()
68 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in tu102_gr_init_zcull()
69 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in tu102_gr_init_zcull()
71 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in tu102_gr_init_zcull()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dcell-regs.h28 #define HID0_CBE_THERM_WAKEUP 0x0000020000000000ul
29 #define HID0_CBE_SYSERR_WAKEUP 0x0000008000000000ul
30 #define HID0_CBE_THERM_INT_EN 0x0000000400000000ul
31 #define HID0_CBE_SYSERR_INT_EN 0x0000000200000000ul
57 u64 pad_0x0000; /* 0x0000 */
59 u64 group_control; /* 0x0008 */
61 u8 pad_0x0010_0x00a8 [0x00a8 - 0x0010]; /* 0x0010 */
63 u64 debug_bus_control; /* 0x00a8 */
65 u8 pad_0x00b0_0x0100 [0x0100 - 0x00b0]; /* 0x00b0 */
67 u64 trace_aux_data; /* 0x0100 */
[all …]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Dcell-regs.h28 #define HID0_CBE_THERM_WAKEUP 0x0000020000000000ul
29 #define HID0_CBE_SYSERR_WAKEUP 0x0000008000000000ul
30 #define HID0_CBE_THERM_INT_EN 0x0000000400000000ul
31 #define HID0_CBE_SYSERR_INT_EN 0x0000000200000000ul
57 u64 pad_0x0000; /* 0x0000 */
59 u64 group_control; /* 0x0008 */
61 u8 pad_0x0010_0x00a8 [0x00a8 - 0x0010]; /* 0x0010 */
63 u64 debug_bus_control; /* 0x00a8 */
65 u8 pad_0x00b0_0x0100 [0x0100 - 0x00b0]; /* 0x00b0 */
67 u64 trace_aux_data; /* 0x0100 */
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxgv100.c30 { 0x00001000, 64, 0x00100000, 0x00000008 },
31 { 0x00000941, 64, 0x00100000, 0x00000000 },
32 { 0x0000097e, 64, 0x00100000, 0x00000000 },
33 { 0x0000097f, 64, 0x00100000, 0x00000100 },
34 { 0x0000035c, 64, 0x00100000, 0x00000000 },
35 { 0x0000035d, 64, 0x00100000, 0x00000000 },
36 { 0x00000a08, 64, 0x00100000, 0x00000000 },
37 { 0x00000a09, 64, 0x00100000, 0x00000000 },
38 { 0x00000a0a, 64, 0x00100000, 0x00000000 },
39 { 0x00000352, 64, 0x00100000, 0x00000000 },
[all …]
/kernel/linux/linux-6.6/drivers/soc/fsl/qbman/
Dbman_ccsr.c37 #define REG_FBPR_FPC 0x0800
38 #define REG_ECSR 0x0a00
39 #define REG_ECIR 0x0a04
40 #define REG_EADR 0x0a08
41 #define REG_EDATA(n) (0x0a10 + ((n) * 0x04))
42 #define REG_SBEC(n) (0x0a80 + ((n) * 0x04))
43 #define REG_IP_REV_1 0x0bf8
44 #define REG_IP_REV_2 0x0bfc
45 #define REG_FBPR_BARE 0x0c00
46 #define REG_FBPR_BAR 0x0c04
[all …]
/kernel/linux/linux-5.10/drivers/soc/fsl/qbman/
Dbman_ccsr.c37 #define REG_FBPR_FPC 0x0800
38 #define REG_ECSR 0x0a00
39 #define REG_ECIR 0x0a04
40 #define REG_EADR 0x0a08
41 #define REG_EDATA(n) (0x0a10 + ((n) * 0x04))
42 #define REG_SBEC(n) (0x0a80 + ((n) * 0x04))
43 #define REG_IP_REV_1 0x0bf8
44 #define REG_IP_REV_2 0x0bfc
45 #define REG_FBPR_BARE 0x0c00
46 #define REG_FBPR_BAR 0x0c04
[all …]

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