| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 22 #define AUX_CORE_BOOT0_PA 0x48281800 23 #define API_HYP_ENTRY 0x102 46 mrc p15, 0, r4, c0, c0, 5 47 and r4, r4, #0x0f 64 mrc p15, 0, r4, c0, c0, 5 65 and r4, r4, #0x0f 70 smc #0 82 hold: ldr r12,=0x103 84 smc #0 @ read from AuxCoreBoot0 86 mrc p15, 0, r4, c0, c0, 5 [all …]
|
| D | omap-smc.S | 30 smc #0 46 mov r1, #0x0 @ Process ID 47 mov r6, #0xff 48 mov r12, #0x00 @ Secure Service ID 49 mov r7, #0 50 mcr p15, 0, r7, c7, c5, 6 53 smc #0 68 mov r6, #0xff @ Indicate new Task call 76 ldr r12, =0x104 78 smc #0 [all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 22 #define AUX_CORE_BOOT0_PA 0x48281800 23 #define API_HYP_ENTRY 0x102 46 mrc p15, 0, r4, c0, c0, 5 47 and r4, r4, #0x0f 64 mrc p15, 0, r4, c0, c0, 5 65 and r4, r4, #0x0f 70 smc #0 82 hold: ldr r12,=0x103 84 smc #0 @ read from AuxCoreBoot0 86 mrc p15, 0, r4, c0, c0, 5 [all …]
|
| D | omap-smc.S | 30 smc #0 46 mov r1, #0x0 @ Process ID 47 mov r6, #0xff 48 mov r12, #0x00 @ Secure Service ID 49 mov r7, #0 50 mcr p15, 0, r7, c7, c5, 6 53 smc #0 68 mov r6, #0xff @ Indicate new Task call 76 ldr r12, =0x104 78 smc #0 [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_abm.c | 58 uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0; in dmub_abm_enable_fractional_pwm() 74 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103); in dmub_abm_init() 75 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101); in dmub_abm_init() 76 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103); in dmub_abm_init() 77 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101); in dmub_abm_init() 78 REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101); in dmub_abm_init() 80 REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0, in dmub_abm_init() 81 ABM1_HG_NUM_OF_BINS_SEL, 0, in dmub_abm_init() 83 ABM1_HG_BIN_BITWIDTH_SIZE_SEL, 0); in dmub_abm_init() 85 REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0, in dmub_abm_init() [all …]
|
| D | dce_abm.c | 52 #define MCP_ABM_LEVEL_SET 0x65 53 #define MCP_ABM_PIPE_SET 0x66 54 #define MCP_BL_SET 0x67 61 uint32_t rampingBoundary = 0xFFFF; in dce_abm_set_pipe() 66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe() 80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe() 93 unsigned int backlight_8_bit = 0; in dmcu_set_backlight_level() 96 if (backlight_pwm_u16_16 & 0x10000) in dmcu_set_backlight_level() 98 backlight_8_bit = 0xFF; in dmcu_set_backlight_level() 101 backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; in dmcu_set_backlight_level() [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_abm.c | 52 #define MCP_ABM_LEVEL_SET 0x65 53 #define MCP_ABM_PIPE_SET 0x66 54 #define MCP_BL_SET 0x67 61 uint32_t rampingBoundary = 0xFFFF; in dce_abm_set_pipe() 66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe() 80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe() 93 unsigned int backlight_8_bit = 0; in dmcu_set_backlight_level() 96 if (backlight_pwm_u16_16 & 0x10000) in dmcu_set_backlight_level() 98 backlight_8_bit = 0xFF; in dmcu_set_backlight_level() 101 backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; in dmcu_set_backlight_level() [all …]
|
| /kernel/linux/linux-6.6/drivers/media/usb/au0828/ |
| D | au0828-reg.h | 11 #define REG_000 0x000 12 #define REG_001 0x001 13 #define REG_002 0x002 14 #define REG_003 0x003 16 #define AU0828_SENSORCTRL_100 0x100 17 #define AU0828_SENSORCTRL_VBI_103 0x103 20 #define AU0828_I2C_TRIGGER_200 0x200 21 #define AU0828_I2C_STATUS_201 0x201 22 #define AU0828_I2C_CLK_DIVIDER_202 0x202 23 #define AU0828_I2C_DEST_ADDR_203 0x203 [all …]
|
| /kernel/linux/linux-5.10/drivers/media/usb/au0828/ |
| D | au0828-reg.h | 11 #define REG_000 0x000 12 #define REG_001 0x001 13 #define REG_002 0x002 14 #define REG_003 0x003 16 #define AU0828_SENSORCTRL_100 0x100 17 #define AU0828_SENSORCTRL_VBI_103 0x103 20 #define AU0828_I2C_TRIGGER_200 0x200 21 #define AU0828_I2C_STATUS_201 0x201 22 #define AU0828_I2C_CLK_DIVIDER_202 0x202 23 #define AU0828_I2C_DEST_ADDR_203 0x203 [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | usb_a9g20-dab-mmx.dtsi | 21 i2c-gpio@0 { 69 #size-cells = <0>; 74 linux,code = <0x100>; 80 linux,code = <0x101>; 86 linux,code = <0x102>; 92 linux,code = <0x103>;
|
| D | at91-foxg20.dts | 21 reg = <0x20000000 0x4000000>; 37 timer@0 { 39 reg = <0>, <1>; 54 pinctrl-0 = < 68 pinctrl-0 = 121 pinctrl_i2c0: i2c0-0 { 140 i2c-gpio-0 { 142 pinctrl-0 = <&pinctrl_i2c0>; 164 linux,code = <0x103>;
|
| D | at91sam9260ek.dts | 21 reg = <0x20000000 0x4000000>; 37 timer@0 { 39 reg = <0>, <1>; 54 pinctrl-0 = < 69 pinctrl-0 = 85 pinctrl-0 = <&pinctrl_ssc0_tx>; 94 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; 121 atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 153 linux,code = <0x103>; 165 i2c-gpio-0 { [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | usb_a9g20-dab-mmx.dtsi | 21 i2c-gpio@0 { 69 #size-cells = <0>; 74 linux,code = <0x100>; 80 linux,code = <0x101>; 86 linux,code = <0x102>; 92 linux,code = <0x103>;
|
| D | at91-foxg20.dts | 21 reg = <0x20000000 0x4000000>; 37 timer@0 { 39 reg = <0>, <1>; 54 pinctrl-0 = < 68 pinctrl-0 = 121 pinctrl_i2c0: i2c0-0 { 140 i2c-gpio-0 { 142 pinctrl-0 = <&pinctrl_i2c0>; 164 linux,code = <0x103>;
|
| D | at91sam9260ek.dts | 21 reg = <0x20000000 0x4000000>; 37 timer@0 { 39 reg = <0>, <1>; 54 pinctrl-0 = < 69 pinctrl-0 = 85 pinctrl-0 = <&pinctrl_ssc0_tx>; 94 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; 121 atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 153 linux,code = <0x103>; 165 i2c-gpio-0 { [all …]
|
| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/sound/ |
| D | tlv.h | 8 #define SNDRV_CTL_TLVT_CONTAINER 0 14 #define SNDRV_CTL_TLVT_CHMAP_FIXED 0x101 15 #define SNDRV_CTL_TLVT_CHMAP_VAR 0x102 16 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 21 #define SNDRV_CTL_TLVO_TYPE 0 29 #define SNDRV_CTL_TLVD_DB_SCALE_MASK 0xffff 30 #define SNDRV_CTL_TLVD_DB_SCALE_MUTE 0x10000 35 ((mute) ? SNDRV_CTL_TLVD_DB_SCALE_MUTE : 0))
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-pcie.dtsi | 8 reg = <0 0x60400000 0 0x1000>; 11 bus-range = <0x0 0x1>; 16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>; 20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */ 21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */ 22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */ 23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */ 24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */ 25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */ 26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */ [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-pcie.dtsi | 8 reg = <0 0x60400000 0 0x1000>; 11 bus-range = <0x0 0x1>; 16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>; 20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */ 21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */ 22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */ 23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */ 24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */ 25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */ 26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */ [all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | idt82p33_reg.h | 10 #define REG_ADDR(page, offset) (((page) << 0x7) | ((offset) & 0x7f)) 13 #define DPLL1_TOD_CNFG 0x134 14 #define DPLL2_TOD_CNFG 0x1B4 16 #define DPLL1_TOD_STS 0x10B 17 #define DPLL2_TOD_STS 0x18B 19 #define DPLL1_TOD_TRIGGER 0x115 20 #define DPLL2_TOD_TRIGGER 0x195 22 #define DPLL1_OPERATING_MODE_CNFG 0x120 23 #define DPLL2_OPERATING_MODE_CNFG 0x1A0 25 #define DPLL1_HOLDOVER_FREQ_CNFG 0x12C [all …]
|
| /kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/ |
| D | q6prm.h | 7 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100 9 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101 11 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102 13 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103 15 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_IBIT 0x104 17 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_EBIT 0x105 19 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106 21 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_EBIT 0x107 23 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_IBIT 0x108 25 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_EBIT 0x109 [all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| D | cache.json | 79 "EventCode": "0x34", 85 "EventCode": "0x35", 91 "EventCode": "0x102", 97 "EventCode": "0x103", 103 "EventCode": "0x104", 109 "EventCode": "0x105", 115 "EventCode": "0x106", 121 "EventCode": "0x107", 127 "EventCode": "0x111", 132 "PublicDescription": "Page walk cache level-0 stage-1 hit", [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b.dtsi | 13 #address-cells = <0x2>; 14 #size-cells = <0x0>; 46 cpu0: cpu@0 { 49 reg = <0x0 0x0>; 59 reg = <0x0 0x1>; 69 reg = <0x0 0x100>; 79 reg = <0x0 0x101>; 89 reg = <0x0 0x102>; 99 reg = <0x0 0x103>;
|
| /kernel/linux/linux-6.6/fs/smb/server/ |
| D | smb_common.h | 19 #define SMB1_PROT 0 27 #define BAD_PROT 0xFFFF 41 #define MAX_STREAM_PROT_LEN 0x00FFFFFF 44 #define F_SUPERSEDED 0 52 #define ATTR_POSIX_SEMANTICS 0x01000000 53 #define ATTR_BACKUP_SEMANTICS 0x02000000 54 #define ATTR_DELETE_ON_CLOSE 0x04000000 55 #define ATTR_SEQUENTIAL_SCAN 0x08000000 56 #define ATTR_RANDOM_ACCESS 0x10000000 57 #define ATTR_NO_BUFFERING 0x20000000 [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt6755.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 29 reg = <0x000>; 36 reg = <0x001>; 43 reg = <0x002>; 50 reg = <0x003>; 57 reg = <0x100>; 64 reg = <0x101>; 71 reg = <0x102>; 78 reg = <0x103>; [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b.dtsi | 13 #address-cells = <0x2>; 14 #size-cells = <0x0>; 46 cpu0: cpu@0 { 49 reg = <0x0 0x0>; 59 reg = <0x0 0x1>; 69 reg = <0x0 0x100>; 79 reg = <0x0 0x101>; 89 reg = <0x0 0x102>; 99 reg = <0x0 0x103>;
|