Searched +full:0 +full:x10a0 (Results 1 – 25 of 109) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | qcom,sdm845-venus-v2.yaml | 95 reg = <0x0aa00000 0xff000>;
111 iommus = <&apps_smmu 0x10a0 0x8>,
112 <&apps_smmu 0x10b0 0x0>;
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| D | qcom,sdm845-venus.yaml | 105 reg = <0x0aa00000 0xff000>;
112 iommus = <&apps_smmu 0x10a0 0x8>,
113 <&apps_smmu 0x10b0 0x0>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | qcom,sdm845-venus-v2.yaml | 119 reg = <0x0aa00000 0xff000>;
135 iommus = <&apps_smmu 0x10a0 0x8>,
136 <&apps_smmu 0x10b0 0x0>;
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| D | qcom,sdm845-venus.yaml | 132 reg = <0x0aa00000 0xff000>;
139 iommus = <&apps_smmu 0x10a0 0x8>,
140 <&apps_smmu 0x10b0 0x0>;
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| /kernel/linux/linux-6.6/drivers/net/can/m_can/ |
| D | tcan4x5x-regmap.c | 12 #define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)
13 #define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)
15 #define TCAN4X5X_MAX_REGISTER 0x87fc
63 spi_message_add_tail(&xfer[0], &msg); in tcan4x5x_regmap_read()
70 xfer[0].len = sizeof(buf_tx->cmd); in tcan4x5x_regmap_read()
76 xfer[0].rx_buf = buf_rx; in tcan4x5x_regmap_read()
77 xfer[0].len = sizeof(buf_tx->cmd) + val_len; in tcan4x5x_regmap_read()
80 memset(buf_tx->data, 0x0, val_len); in tcan4x5x_regmap_read()
90 return 0; in tcan4x5x_regmap_read()
95 regmap_reg_range(0x000c, 0x0010),
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/lima/ |
| D | lima_regs.h | 14 #define LIMA_PMU_POWER_UP 0x00
15 #define LIMA_PMU_POWER_DOWN 0x04
16 #define LIMA_PMU_POWER_GP0_MASK BIT(0)
29 #define LIMA_PMU_STATUS 0x08
30 #define LIMA_PMU_INT_MASK 0x0C
31 #define LIMA_PMU_INT_RAWSTAT 0x10
32 #define LIMA_PMU_INT_CLEAR 0x18
33 #define LIMA_PMU_INT_CMD_MASK BIT(0)
34 #define LIMA_PMU_SW_DELAY 0x1C
37 #define LIMA_L2_CACHE_SIZE 0x0004
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| /kernel/linux/linux-6.6/drivers/gpu/drm/lima/ |
| D | lima_regs.h | 14 #define LIMA_PMU_POWER_UP 0x00
15 #define LIMA_PMU_POWER_DOWN 0x04
16 #define LIMA_PMU_POWER_GP0_MASK BIT(0)
29 #define LIMA_PMU_STATUS 0x08
30 #define LIMA_PMU_INT_MASK 0x0C
31 #define LIMA_PMU_INT_RAWSTAT 0x10
32 #define LIMA_PMU_INT_CLEAR 0x18
33 #define LIMA_PMU_INT_CMD_MASK BIT(0)
34 #define LIMA_PMU_SW_DELAY 0x1C
37 #define LIMA_L2_CACHE_SIZE 0x0004
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_dkl_phy_regs.h | 16 #define _DKL_PHY1_BASE 0x168000
17 #define _DKL_PHY2_BASE 0x169000
18 #define _DKL_PHY3_BASE 0x16A000
19 #define _DKL_PHY4_BASE 0x16B000
20 #define _DKL_PHY5_BASE 0x16C000
21 #define _DKL_PHY6_BASE 0x16D000
37 (((phy_offset) >> _DKL_BANK_SHIFT) & 0xf)
49 #define _DKL_PCS_DW5_LN0 0x0014
50 #define _DKL_PCS_DW5_LN1 0x1014
56 #define _DKL_PLL_DIV0 0x2200
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/mxs/ |
| D | imx23-pinfunc.h | 13 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
14 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
15 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
16 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
17 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
18 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
19 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
20 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
21 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
22 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
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| D | imx28-pinfunc.h | 13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | mac_psc.h | 37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
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| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | mac_psc.h | 37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx23-pinfunc.h | 19 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
20 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
21 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
22 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
23 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
24 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
25 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
26 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
27 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
28 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
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| D | imx28-pinfunc.h | 19 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
20 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
21 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
22 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
23 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
24 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
25 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
26 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
27 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
28 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
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| D | keystone-k2g-evm.dts | 17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
27 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
66 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
67 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
73 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
74 K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */
75 K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */
76 K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */
77 K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */
78 K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | gpucc-sm8250.c | 22 #define CX_GMU_CBCR_SLEEP_MASK 0xf
24 #define CX_GMU_CBCR_WAKE_MASK 0xf
37 { 249600000, 2000000000, 0 },
41 .l = 0x1a,
42 .alpha = 0xaaa,
43 .config_ctl_val = 0x20485699,
44 .config_ctl_hi_val = 0x00002261,
45 .config_ctl_hi1_val = 0x029a699c,
46 .user_ctl_val = 0x00000000,
47 .user_ctl_hi_val = 0x00000805,
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | gpucc-sm8250.c | 22 #define CX_GMU_CBCR_SLEEP_MASK 0xf
24 #define CX_GMU_CBCR_WAKE_MASK 0xf
36 { 249600000, 2000000000, 0 },
40 .l = 0x1a,
41 .alpha = 0xaaa,
42 .config_ctl_val = 0x20485699,
43 .config_ctl_hi_val = 0x00002261,
44 .config_ctl_hi1_val = 0x029a699c,
45 .user_ctl_val = 0x00000000,
46 .user_ctl_hi_val = 0x00000805,
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/kvm/ |
| D | mpic.c | 44 #define VID 0x03 /* MPIC version ID */
47 #define OPENPIC_FLAG_IDR_CRIT (1 << 0)
48 #define OPENPIC_FLAG_ILR (2 << 0)
51 #define OPENPIC_REG_SIZE 0x40000
52 #define OPENPIC_GLB_REG_START 0x0
53 #define OPENPIC_GLB_REG_SIZE 0x10F0
54 #define OPENPIC_TMR_REG_START 0x10F0
55 #define OPENPIC_TMR_REG_SIZE 0x220
56 #define OPENPIC_MSI_REG_START 0x1600
57 #define OPENPIC_MSI_REG_SIZE 0x200
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| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| D | mpic.c | 44 #define VID 0x03 /* MPIC version ID */
47 #define OPENPIC_FLAG_IDR_CRIT (1 << 0)
48 #define OPENPIC_FLAG_ILR (2 << 0)
51 #define OPENPIC_REG_SIZE 0x40000
52 #define OPENPIC_GLB_REG_START 0x0
53 #define OPENPIC_GLB_REG_SIZE 0x10F0
54 #define OPENPIC_TMR_REG_START 0x10F0
55 #define OPENPIC_TMR_REG_SIZE 0x220
56 #define OPENPIC_MSI_REG_START 0x1600
57 #define OPENPIC_MSI_REG_SIZE 0x200
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| /kernel/linux/linux-5.10/include/media/ |
| D | dvb-usb-ids.h | 14 #define USB_VID_ADSTECH 0x06e1
15 #define USB_VID_AFATECH 0x15a4
16 #define USB_VID_ALCOR_MICRO 0x058f
17 #define USB_VID_ALINK 0x05e3
18 #define USB_VID_AMT 0x1c73
19 #define USB_VID_ANCHOR 0x0547
20 #define USB_VID_ANSONIC 0x10b9
21 #define USB_VID_ANUBIS_ELECTRONIC 0x10fd
22 #define USB_VID_ASUS 0x0b05
23 #define USB_VID_AVERMEDIA 0x07ca
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| /kernel/linux/linux-6.6/include/media/ |
| D | dvb-usb-ids.h | 23 #define USB_VID_774 0x7a69
24 #define USB_VID_ADSTECH 0x06e1
25 #define USB_VID_AFATECH 0x15a4
26 #define USB_VID_ALCOR_MICRO 0x058f
27 #define USB_VID_ALINK 0x05e3
28 #define USB_VID_AME 0x06be
29 #define USB_VID_AMT 0x1c73
30 #define USB_VID_ANCHOR 0x0547
31 #define USB_VID_ANSONIC 0x10b9
32 #define USB_VID_ANUBIS_ELECTRONIC 0x10fd
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| /kernel/linux/linux-6.6/include/linux/soc/samsung/ |
| D | exynos-regs-pmu.h | 17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
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| /kernel/linux/linux-5.10/include/linux/soc/samsung/ |
| D | exynos-regs-pmu.h | 17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
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| /kernel/linux/linux-6.6/drivers/net/ethernet/cavium/liquidio/ |
| D | cn66xx_regs.h | 26 #define CN6XXX_XPANSION_BAR 0x30
28 #define CN6XXX_MSI_CAP 0x50
29 #define CN6XXX_MSI_ADDR_LO 0x54
30 #define CN6XXX_MSI_ADDR_HI 0x58
31 #define CN6XXX_MSI_DATA 0x5C
33 #define CN6XXX_PCIE_CAP 0x70
34 #define CN6XXX_PCIE_DEVCAP 0x74
35 #define CN6XXX_PCIE_DEVCTL 0x78
36 #define CN6XXX_PCIE_LINKCAP 0x7C
37 #define CN6XXX_PCIE_LINKCTL 0x80
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/ |
| D | cn66xx_regs.h | 26 #define CN6XXX_XPANSION_BAR 0x30
28 #define CN6XXX_MSI_CAP 0x50
29 #define CN6XXX_MSI_ADDR_LO 0x54
30 #define CN6XXX_MSI_ADDR_HI 0x58
31 #define CN6XXX_MSI_DATA 0x5C
33 #define CN6XXX_PCIE_CAP 0x70
34 #define CN6XXX_PCIE_DEVCAP 0x74
35 #define CN6XXX_PCIE_DEVCTL 0x78
36 #define CN6XXX_PCIE_LINKCAP 0x7C
37 #define CN6XXX_PCIE_LINKCTL 0x80
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