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/kernel/linux/linux-5.10/drivers/media/platform/coda/
Dcoda_regs.h14 #define CODA_REG_BIT_CODE_RUN 0x000
15 #define CODA_REG_RUN_ENABLE (1 << 0)
16 #define CODA_REG_BIT_CODE_DOWN 0x004
17 #define CODA_DOWN_ADDRESS_SET(x) (((x) & 0xffff) << 16)
18 #define CODA_DOWN_DATA_SET(x) ((x) & 0xffff)
19 #define CODA_REG_BIT_HOST_IN_REQ 0x008
20 #define CODA_REG_BIT_INT_CLEAR 0x00c
21 #define CODA_REG_BIT_INT_CLEAR_SET 0x1
22 #define CODA_REG_BIT_INT_STATUS 0x010
23 #define CODA_REG_BIT_CODE_RESET 0x014
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/chips-media/
Dcoda_regs.h14 #define CODA_REG_BIT_CODE_RUN 0x000
15 #define CODA_REG_RUN_ENABLE (1 << 0)
16 #define CODA_REG_BIT_CODE_DOWN 0x004
17 #define CODA_DOWN_ADDRESS_SET(x) (((x) & 0xffff) << 16)
18 #define CODA_DOWN_DATA_SET(x) ((x) & 0xffff)
19 #define CODA_REG_BIT_HOST_IN_REQ 0x008
20 #define CODA_REG_BIT_INT_CLEAR 0x00c
21 #define CODA_REG_BIT_INT_CLEAR_SET 0x1
22 #define CODA_REG_BIT_INT_STATUS 0x010
23 #define CODA_REG_BIT_CODE_RESET 0x014
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dadder875-redboot.dts24 #size-cells = <0>;
26 PowerPC,875@0 {
28 reg = <0>;
33 timebase-frequency = <0>;
34 bus-frequency = <0>;
35 clock-frequency = <0>;
43 reg = <0 0x01000000>;
51 reg = <0xfa200100 0x40>;
54 0 0 0xfe000000 0x00800000
55 2 0 0xfa100000 0x00008000
[all …]
Dadder875-uboot.dts24 #size-cells = <0>;
26 PowerPC,875@0 {
28 reg = <0>;
33 timebase-frequency = <0>;
34 bus-frequency = <0>;
35 clock-frequency = <0>;
43 reg = <0 0x01000000>;
51 reg = <0xff000100 0x40>;
54 0 0 0xfe000000 0x01000000
57 flash@0,0 {
[all …]
Dep88xc.dts19 #size-cells = <0>;
21 PowerPC,885@0 {
23 reg = <0x0>;
28 timebase-frequency = <0>;
29 bus-frequency = <0>;
30 clock-frequency = <0>;
38 reg = <0x0 0x0>;
45 reg = <0xfa200100 0x40>;
48 0x0 0x0 0xfc000000 0x4000000
49 0x3 0x0 0xfa000000 0x1000000
[all …]
Dmpc885ads.dts19 #size-cells = <0>;
21 PowerPC,885@0 {
23 reg = <0x0>;
28 timebase-frequency = <0>;
29 bus-frequency = <0>;
30 clock-frequency = <0>;
38 reg = <0x0 0x0>;
45 reg = <0xff000100 0x40>;
48 0x0 0x0 0xfe000000 0x800000
49 0x1 0x0 0xff080000 0x8000
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dadder875-redboot.dts24 #size-cells = <0>;
26 PowerPC,875@0 {
28 reg = <0>;
33 timebase-frequency = <0>;
34 bus-frequency = <0>;
35 clock-frequency = <0>;
43 reg = <0 0x01000000>;
51 reg = <0xfa200100 0x40>;
54 0 0 0xfe000000 0x00800000
55 2 0 0xfa100000 0x00008000
[all …]
Dadder875-uboot.dts24 #size-cells = <0>;
26 PowerPC,875@0 {
28 reg = <0>;
33 timebase-frequency = <0>;
34 bus-frequency = <0>;
35 clock-frequency = <0>;
43 reg = <0 0x01000000>;
51 reg = <0xff000100 0x40>;
54 0 0 0xfe000000 0x01000000
57 flash@0,0 {
[all …]
Dep88xc.dts19 #size-cells = <0>;
21 PowerPC,885@0 {
23 reg = <0x0>;
28 timebase-frequency = <0>;
29 bus-frequency = <0>;
30 clock-frequency = <0>;
38 reg = <0x0 0x0>;
45 reg = <0xfa200100 0x40>;
48 0x0 0x0 0xfc000000 0x4000000
49 0x3 0x0 0xfa000000 0x1000000
[all …]
Dmpc885ads.dts19 #size-cells = <0>;
21 PowerPC,885@0 {
23 reg = <0x0>;
28 timebase-frequency = <0>;
29 bus-frequency = <0>;
30 clock-frequency = <0>;
38 reg = <0x0 0x0>;
45 reg = <0xff000100 0x40>;
48 0x0 0x0 0xfe000000 0x800000
49 0x1 0x0 0xff080000 0x8000
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dphy-hi3798cv200-combphy.txt37 reg = <0x8a20000 0x1000>;
40 ranges = <0x0 0x8a20000 0x1000>;
44 reg = <0x850 0x8>;
47 resets = <&crg 0x188 4>;
53 reg = <0x858 0x8>;
56 resets = <&crg 0x188 12>;
57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-hi3798cv200-combphy.txt37 reg = <0x8a20000 0x1000>;
40 ranges = <0x0 0x8a20000 0x1000>;
44 reg = <0x850 0x8>;
47 resets = <&crg 0x188 4>;
53 reg = <0x858 0x8>;
56 resets = <&crg 0x188 12>;
57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dmediatek,efuse.yaml22 pattern: "^efuse@[0-9a-f]+$"
55 reg = <0x11c10000 0x1000>;
60 reg = <0x184 0x1>;
61 bits = <0 5>;
64 reg = <0x184 0x2>;
68 reg = <0x185 0x1>;
72 reg = <0x186 0x1>;
73 bits = <0 5>;
76 reg = <0x186 0x2>;
80 reg = <0x187 0x1>;
[all …]
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dcrg-hi3798cv200.c45 { HISTB_OSC_CLK, "clk_osc", NULL, 0, 24000000, },
46 { HISTB_APB_CLK, "clk_apb", NULL, 0, 100000000, },
47 { HISTB_AHB_CLK, "clk_ahb", NULL, 0, 200000000, },
48 { HI3798CV200_FIXED_12M, "12m", NULL, 0, 12000000, },
49 { HI3798CV200_FIXED_24M, "24m", NULL, 0, 24000000, },
50 { HI3798CV200_FIXED_25M, "25m", NULL, 0, 25000000, },
51 { HI3798CV200_FIXED_48M, "48m", NULL, 0, 48000000, },
52 { HI3798CV200_FIXED_50M, "50m", NULL, 0, 50000000, },
53 { HI3798CV200_FIXED_60M, "60m", NULL, 0, 60000000, },
54 { HI3798CV200_FIXED_75M, "75m", NULL, 0, 75000000, },
[all …]
/kernel/linux/linux-6.6/drivers/clk/hisilicon/
Dcrg-hi3798cv200.c45 { HISTB_OSC_CLK, "clk_osc", NULL, 0, 24000000, },
46 { HISTB_APB_CLK, "clk_apb", NULL, 0, 100000000, },
47 { HISTB_AHB_CLK, "clk_ahb", NULL, 0, 200000000, },
48 { HI3798CV200_FIXED_12M, "12m", NULL, 0, 12000000, },
49 { HI3798CV200_FIXED_24M, "24m", NULL, 0, 24000000, },
50 { HI3798CV200_FIXED_25M, "25m", NULL, 0, 25000000, },
51 { HI3798CV200_FIXED_48M, "48m", NULL, 0, 48000000, },
52 { HI3798CV200_FIXED_50M, "50m", NULL, 0, 50000000, },
53 { HI3798CV200_FIXED_60M, "60m", NULL, 0, 60000000, },
54 { HI3798CV200_FIXED_75M, "75m", NULL, 0, 75000000, },
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/falcon/
Dv1.c38 reg = start | BIT(24) | (secure ? BIT(28) : 0); in nvkm_falcon_v1_load_imem()
39 nvkm_falcon_wr32(falcon, 0x180 + (port * 16), reg); in nvkm_falcon_v1_load_imem()
40 for (i = 0; i < size / 4; i++) { in nvkm_falcon_v1_load_imem()
42 if ((i & 0x3f) == 0) in nvkm_falcon_v1_load_imem()
43 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); in nvkm_falcon_v1_load_imem()
44 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), ((u32 *)data)[i]); in nvkm_falcon_v1_load_imem()
55 if ((i & 0x3f) == 0) in nvkm_falcon_v1_load_imem()
56 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); in nvkm_falcon_v1_load_imem()
57 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), in nvkm_falcon_v1_load_imem()
62 /* code must be padded to 0x40 words */ in nvkm_falcon_v1_load_imem()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_doorbell.h85 AMDGPU_DOORBELL_KIQ = 0x000,
86 AMDGPU_DOORBELL_HIQ = 0x001,
87 AMDGPU_DOORBELL_DIQ = 0x002,
88 AMDGPU_DOORBELL_MEC_RING0 = 0x010,
89 AMDGPU_DOORBELL_MEC_RING1 = 0x011,
90 AMDGPU_DOORBELL_MEC_RING2 = 0x012,
91 AMDGPU_DOORBELL_MEC_RING3 = 0x013,
92 AMDGPU_DOORBELL_MEC_RING4 = 0x014,
93 AMDGPU_DOORBELL_MEC_RING5 = 0x015,
94 AMDGPU_DOORBELL_MEC_RING6 = 0x016,
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_doorbell.h99 AMDGPU_DOORBELL_KIQ = 0x000,
100 AMDGPU_DOORBELL_HIQ = 0x001,
101 AMDGPU_DOORBELL_DIQ = 0x002,
102 AMDGPU_DOORBELL_MEC_RING0 = 0x010,
103 AMDGPU_DOORBELL_MEC_RING1 = 0x011,
104 AMDGPU_DOORBELL_MEC_RING2 = 0x012,
105 AMDGPU_DOORBELL_MEC_RING3 = 0x013,
106 AMDGPU_DOORBELL_MEC_RING4 = 0x014,
107 AMDGPU_DOORBELL_MEC_RING5 = 0x015,
108 AMDGPU_DOORBELL_MEC_RING6 = 0x016,
[all …]
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
Dphy-qcom-qmp-pcs-v5_20.h9 #define QPHY_V5_20_PCS_G3S2_PRE_GAIN 0x170
10 #define QPHY_V5_20_PCS_RX_SIGDET_LVL 0x188
11 #define QPHY_V5_20_PCS_EQ_CONFIG2 0x1d8
12 #define QPHY_V5_20_PCS_EQ_CONFIG4 0x1e0
13 #define QPHY_V5_20_PCS_EQ_CONFIG5 0x1e4
Dphy-qcom-qmp-pcs-v6.h10 #define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
11 #define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
12 #define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198
13 #define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
14 #define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
Dphy-qcom-qmp-pcs-v4_20.h10 #define QPHY_V4_20_PCS_RX_SIGDET_LVL 0x188
11 #define QPHY_V4_20_PCS_EQ_CONFIG2 0x1d8
12 #define QPHY_V4_20_PCS_EQ_CONFIG4 0x1e0
13 #define QPHY_V4_20_PCS_EQ_CONFIG5 0x1e4
/kernel/linux/linux-6.6/drivers/gpu/drm/omapdrm/dss/
Dhdmi4_core.h15 #define HDMI_CORE_SYS_VND_IDL 0x0
16 #define HDMI_CORE_SYS_DEV_IDL 0x8
17 #define HDMI_CORE_SYS_DEV_IDH 0xC
18 #define HDMI_CORE_SYS_DEV_REV 0x10
19 #define HDMI_CORE_SYS_SRST 0x14
20 #define HDMI_CORE_SYS_SYS_CTRL1 0x20
21 #define HDMI_CORE_SYS_SYS_STAT 0x24
22 #define HDMI_CORE_SYS_SYS_CTRL3 0x28
23 #define HDMI_CORE_SYS_DCTL 0x34
24 #define HDMI_CORE_SYS_DE_DLY 0xC8
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi4_core.h15 #define HDMI_CORE_SYS_VND_IDL 0x0
16 #define HDMI_CORE_SYS_DEV_IDL 0x8
17 #define HDMI_CORE_SYS_DEV_IDH 0xC
18 #define HDMI_CORE_SYS_DEV_REV 0x10
19 #define HDMI_CORE_SYS_SRST 0x14
20 #define HDMI_CORE_SYS_SYS_CTRL1 0x20
21 #define HDMI_CORE_SYS_SYS_STAT 0x24
22 #define HDMI_CORE_SYS_SYS_CTRL3 0x28
23 #define HDMI_CORE_SYS_DCTL 0x34
24 #define HDMI_CORE_SYS_DE_DLY 0xC8
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi4_core.h15 #define HDMI_CORE_SYS_VND_IDL 0x0
16 #define HDMI_CORE_SYS_DEV_IDL 0x8
17 #define HDMI_CORE_SYS_DEV_IDH 0xC
18 #define HDMI_CORE_SYS_DEV_REV 0x10
19 #define HDMI_CORE_SYS_SRST 0x14
20 #define HDMI_CORE_SYS_SYS_CTRL1 0x20
21 #define HDMI_CORE_SYS_SYS_STAT 0x24
22 #define HDMI_CORE_SYS_SYS_CTRL3 0x28
23 #define HDMI_CORE_SYS_DCTL 0x34
24 #define HDMI_CORE_SYS_DE_DLY 0xC8
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/
Dhdmi4_core.h15 #define HDMI_CORE_SYS_VND_IDL 0x0
16 #define HDMI_CORE_SYS_DEV_IDL 0x8
17 #define HDMI_CORE_SYS_DEV_IDH 0xC
18 #define HDMI_CORE_SYS_DEV_REV 0x10
19 #define HDMI_CORE_SYS_SRST 0x14
20 #define HDMI_CORE_SYS_SYS_CTRL1 0x20
21 #define HDMI_CORE_SYS_SYS_STAT 0x24
22 #define HDMI_CORE_SYS_SYS_CTRL3 0x28
23 #define HDMI_CORE_SYS_DCTL 0x34
24 #define HDMI_CORE_SYS_DE_DLY 0xC8
[all …]

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