| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | mt6351.h | 12 #define MT6351_AFE_UL_DL_CON0 (0x2000 + 0x0000) 13 #define MT6351_AFE_DL_SRC2_CON0_H (0x2000 + 0x0002) 14 #define MT6351_AFE_DL_SRC2_CON0_L (0x2000 + 0x0004) 15 #define MT6351_AFE_DL_SDM_CON0 (0x2000 + 0x0006) 16 #define MT6351_AFE_DL_SDM_CON1 (0x2000 + 0x0008) 17 #define MT6351_AFE_UL_SRC_CON0_H (0x2000 + 0x000a) 18 #define MT6351_AFE_UL_SRC_CON0_L (0x2000 + 0x000c) 19 #define MT6351_AFE_UL_SRC_CON1_H (0x2000 + 0x000e) 20 #define MT6351_AFE_UL_SRC_CON1_L (0x2000 + 0x0010) 21 #define MT6351_AFE_TOP_CON0 (0x2000 + 0x0012) [all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | mt6351.h | 12 #define MT6351_AFE_UL_DL_CON0 (0x2000 + 0x0000) 13 #define MT6351_AFE_DL_SRC2_CON0_H (0x2000 + 0x0002) 14 #define MT6351_AFE_DL_SRC2_CON0_L (0x2000 + 0x0004) 15 #define MT6351_AFE_DL_SDM_CON0 (0x2000 + 0x0006) 16 #define MT6351_AFE_DL_SDM_CON1 (0x2000 + 0x0008) 17 #define MT6351_AFE_UL_SRC_CON0_H (0x2000 + 0x000a) 18 #define MT6351_AFE_UL_SRC_CON0_L (0x2000 + 0x000c) 19 #define MT6351_AFE_UL_SRC_CON1_H (0x2000 + 0x000e) 20 #define MT6351_AFE_UL_SRC_CON1_L (0x2000 + 0x0010) 21 #define MT6351_AFE_TOP_CON0 (0x2000 + 0x0012) [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx23.dtsi | 32 #size-cells = <0>; 34 cpu@0 { 37 reg = <0>; 45 reg = <0x80000000 0x80000>; 52 reg = <0x80000000 0x40000>; 59 reg = <0x80000000 0x2000>; 64 reg = <0x80004000 0x2000>; 65 interrupts = <0 14 20 0 75 reg = <0x80008000 0x2000>; 83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; [all …]
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| D | imx28.dtsi | 43 #size-cells = <0>; 45 cpu@0 { 48 reg = <0>; 56 reg = <0x80000000 0x80000>; 63 reg = <0x80000000 0x3c900>; 70 reg = <0x80000000 0x2000>; 74 reg = <0x80002000 0x2000>; 83 reg = <0x80004000 0x2000>; 87 87 86 0 0>; 98 reg = <0x80006000 0x800>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/mxs/ |
| D | imx23.dtsi | 32 #size-cells = <0>; 34 cpu@0 { 37 reg = <0>; 45 reg = <0x80000000 0x80000>; 52 reg = <0x80000000 0x40000>; 59 reg = <0x80000000 0x2000>; 64 reg = <0x80004000 0x2000>; 65 interrupts = <0>, <14>, <20>, <0>, 73 reg = <0x80008000 0x2000>; 81 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; [all …]
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| D | imx28.dtsi | 43 #size-cells = <0>; 45 cpu@0 { 48 reg = <0>; 56 reg = <0x80000000 0x80000>; 63 reg = <0x80000000 0x3c900>; 70 reg = <0x80000000 0x2000>; 74 reg = <0x80002000 0x2000>; 83 reg = <0x80004000 0x2000>; 87 <87>, <86>, <0>, <0>; 94 reg = <0x80006000 0x800>; [all …]
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| /kernel/linux/linux-5.10/drivers/clk/axs10x/ |
| D | i2s_pll_clock.c | 22 #define PLL_IDIV_REG 0x0 23 #define PLL_FBDIV_REG 0x4 24 #define PLL_ODIV0_REG 0x8 25 #define PLL_ODIV1_REG 0xC 37 { 1024000, 0x104, 0x451, 0x10E38, 0x2000 }, 38 { 1411200, 0x104, 0x596, 0x10D35, 0x2000 }, 39 { 1536000, 0x208, 0xA28, 0x10B2C, 0x2000 }, 40 { 2048000, 0x82, 0x451, 0x10E38, 0x2000 }, 41 { 2822400, 0x82, 0x596, 0x10D35, 0x2000 }, 42 { 3072000, 0x104, 0xA28, 0x10B2C, 0x2000 }, [all …]
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| /kernel/linux/linux-6.6/drivers/clk/axs10x/ |
| D | i2s_pll_clock.c | 19 #define PLL_IDIV_REG 0x0 20 #define PLL_FBDIV_REG 0x4 21 #define PLL_ODIV0_REG 0x8 22 #define PLL_ODIV1_REG 0xC 34 { 1024000, 0x104, 0x451, 0x10E38, 0x2000 }, 35 { 1411200, 0x104, 0x596, 0x10D35, 0x2000 }, 36 { 1536000, 0x208, 0xA28, 0x10B2C, 0x2000 }, 37 { 2048000, 0x82, 0x451, 0x10E38, 0x2000 }, 38 { 2822400, 0x82, 0x596, 0x10D35, 0x2000 }, 39 { 3072000, 0x104, 0xA28, 0x10B2C, 0x2000 }, [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dpp.h | 74 { 0x2000, 0, 0, 0, 75 0, 0x2000, 0, 0, 76 0, 0, 0x2000, 0 } }, 78 { 0x2000, 0, 0, 0, 79 0, 0x2000, 0, 0, 80 0, 0, 0x2000, 0 } }, 82 { 0x2cdd, 0x2000, 0, 0xe991, 83 0xe926, 0x2000, 0xf4fd, 0x10ef, 84 0, 0x2000, 0x38b4, 0xe3a6 } }, 86 { 0x3353, 0x2568, 0, 0xe400, [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/event/ |
| D | exynos-ppmu.txt | 34 reg = <0x106a0000 0x2000>; 40 reg = <0x106b0000 0x2000>; 46 reg = <0x106c0000 0x2000>; 52 reg = <0x112a0000 0x2000>; 60 reg = <0x116a0000 0x2000>; 124 reg = <0x10480000 0x2000>; 130 reg = <0x10490000 0x2000>; 136 reg = <0x104a0000 0x2000>; 142 reg = <0x104b0000 0x2000>; 148 reg = <0x104c0000 0x2000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am57-pruss.dtsi | 11 reg = <0x4b226000 0x4>, 12 <0x4b226004 0x4>; 23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; 27 ranges = <0x00000000 0x4b200000 0x80000>; 29 pruss1: pruss@0 { 31 reg = <0x0 0x80000>; 36 pruss1_mem: memories@0 { 37 reg = <0x0 0x2000>, 38 <0x2000 0x2000>, 39 <0x10000 0x8000>; [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | dpp.h | 52 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 54 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 56 {0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef, 57 0, 0x2000, 0x38b4, 0xe3a6} }, 59 {0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108, 60 0, 0x2568, 0x40de, 0xdd3a} }, 62 {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0, 63 0x2000, 0x3b61, 0xe24f} }, 66 {0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0, 67 0x2568, 0x43ee, 0xdbb2} } [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/devfreq/event/ |
| D | samsung,exynos-ppmu.yaml | 43 '^ppmu-event[0-9]+(-[a-z0-9]+){,2}$': 80 reg = <0x106a0000 0x2000>; 103 reg = <0x112a0000 0x2000>; 118 reg = <0x10480000 0x2000>; 123 reg = <0x10490000 0x2000>; 134 reg = <0x104a0000 0x2000>; 139 reg = <0x104b0000 0x2000>; 144 reg = <0x104c0000 0x2000>; 149 reg = <0x104d0000 0x2000>; 158 reg = <0x106a0000 0x2000>;
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| /kernel/linux/linux-5.10/drivers/reset/ |
| D | reset-uniphier.c | 20 #define UNIPHIER_RESET_ACTIVE_LOW BIT(0) 45 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ 46 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */ 51 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ 52 UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */ 53 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */ 54 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */ 55 UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ 56 UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ 57 UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */ [all …]
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| /kernel/linux/linux-6.6/drivers/reset/ |
| D | reset-uniphier.c | 19 #define UNIPHIER_RESET_ACTIVE_LOW BIT(0) 44 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ 45 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */ 50 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ 51 UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */ 52 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */ 53 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */ 54 UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ 55 UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ 56 UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */ [all …]
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| /kernel/linux/linux-6.6/arch/mips/include/asm/mach-db1x00/ |
| D | bcsr.h | 23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000 24 #define DB1000_BCSR_HEXLED_OFS 0x01000000 26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000 27 #define DB1550_BCSR_HEXLED_OFS 0x00400000 29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000 30 #define PB1550_BCSR_HEXLED_OFS 0x00800000 32 #define DB1200_BCSR_PHYS_ADDR 0x19800000 33 #define DB1200_BCSR_HEXLED_OFS 0x00400000 35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000 36 #define PB1200_BCSR_HEXLED_OFS 0x00400000 [all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-db1x00/ |
| D | bcsr.h | 23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000 24 #define DB1000_BCSR_HEXLED_OFS 0x01000000 26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000 27 #define DB1550_BCSR_HEXLED_OFS 0x00400000 29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000 30 #define PB1550_BCSR_HEXLED_OFS 0x00800000 32 #define DB1200_BCSR_PHYS_ADDR 0x19800000 33 #define DB1200_BCSR_HEXLED_OFS 0x00400000 35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000 36 #define PB1200_BCSR_HEXLED_OFS 0x00400000 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,pru-rproc.yaml | 19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary 21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two 46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs 79 pattern: "^rtu@[0-9a-f]+$" 91 pattern: "^txpru@[0-9a-f]+" 95 pattern: "^pru@[0-9a-f]+$" 108 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ 112 ranges = <0x0 0x300000 0x80000>; 114 pruss: pruss@0 { 116 reg = <0x0 0x80000>; [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramnv40.c | 43 ret = nvbios_pll_parse(bios, 0x04, &pll); in nv40_ram_calc() 50 if (ret < 0) in nv40_ram_calc() 53 ram->ctrl = 0x80000000 | (log2P << 16); in nv40_ram_calc() 56 ram->ctrl |= 0x00000100; in nv40_ram_calc() 59 ram->ctrl |= 0x40000000; in nv40_ram_calc() 63 return 0; in nv40_ram_calc() 74 u32 crtc_mask = 0; in nv40_ram_prog() 79 for (i = 0; i < 2; i++) { in nv40_ram_prog() 80 u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog() 81 u32 cnt = 0; in nv40_ram_prog() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramnv40.c | 43 ret = nvbios_pll_parse(bios, 0x04, &pll); in nv40_ram_calc() 50 if (ret < 0) in nv40_ram_calc() 53 ram->ctrl = 0x80000000 | (log2P << 16); in nv40_ram_calc() 56 ram->ctrl |= 0x00000100; in nv40_ram_calc() 59 ram->ctrl |= 0x40000000; in nv40_ram_calc() 63 return 0; in nv40_ram_calc() 74 u32 crtc_mask = 0; in nv40_ram_prog() 79 for (i = 0; i < 2; i++) { in nv40_ram_prog() 80 u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000)); in nv40_ram_prog() 81 u32 cnt = 0; in nv40_ram_prog() [all …]
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| /kernel/linux/linux-6.6/arch/arc/boot/dts/ |
| D | haps_hs.dts | 19 reg = <0x0 0x80000000 0x0 0x40000000 /* 1 GB low mem */ 20 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ 24 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-… 38 ranges = <0x80000000 0x0 0x80000000 0x80000000>; 41 #clock-cells = <0>; 54 reg = <0xf0000000 0x2000>; 71 reg = <0xf0100000 0x2000>; 77 reg = <0xf0102000 0x2000>; 83 reg = <0xf0104000 0x2000>; 89 reg = <0xf0106000 0x2000>; [all …]
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| /kernel/linux/linux-5.10/arch/arc/boot/dts/ |
| D | haps_hs.dts | 19 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ 20 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ 24 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-… 38 ranges = <0x80000000 0x0 0x80000000 0x80000000>; 41 #clock-cells = <0>; 54 reg = <0xf0000000 0x2000>; 71 reg = <0xf0100000 0x2000>; 77 reg = <0xf0102000 0x2000>; 83 reg = <0xf0104000 0x2000>; 89 reg = <0xf0106000 0x2000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/actions/ |
| D | s700.dtsi | 19 #size-cells = <0>; 21 cpu0: cpu@0 { 24 reg = <0x0 0x0>; 31 reg = <0x0 0x1>; 38 reg = <0x0 0x2>; 45 reg = <0x0 0x3>; 56 reg = <0x0 0x1f000000 0x0 0x1000000>; 90 #clock-cells = <0>; 96 #clock-cells = <0>; 107 reg = <0x0 0xe00f1000 0x0 0x1000>, [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/actions/ |
| D | s700.dtsi | 19 #size-cells = <0>; 21 cpu0: cpu@0 { 24 reg = <0x0 0x0>; 31 reg = <0x0 0x1>; 38 reg = <0x0 0x2>; 45 reg = <0x0 0x3>; 56 reg = <0x0 0x1f000000 0x0 0x1000000>; 90 #clock-cells = <0>; 96 #clock-cells = <0>; 107 reg = <0x0 0xe00f1000 0x0 0x1000>, [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 36 0x0, but also has access to a secondary Data RAM (primary to the other PRU 37 core) at its address 0x2000. A shared Data RAM, if present, can be accessed 60 pattern: "^(pruss|icssg)@[0-9a-f]+$" 65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0 161 const: 0 175 const: 0 209 const: 0 297 "^(pru|rtu|txpru)@[0-9a-f]+$": 350 pruss: pruss@0 { 352 reg = <0x0 0x80000>; [all …]
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