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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Drenesas,ceu.yaml69 reg = <0xe8210000 0x209c>;
79 vsync-active = <0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Drenesas,ceu.yaml78 reg = <0xe8210000 0x209c>;
88 vsync-active = <0>;
/kernel/linux/linux-6.6/drivers/gpu/drm/hisilicon/kirin/
Dkirin_ade_reg.h15 #define ADE_CTRL 0x0004
16 #define FRM_END_START_OFST 0
18 #define AUTO_CLK_GATE_EN_OFST 0
19 #define AUTO_CLK_GATE_EN BIT(0)
20 #define ADE_DISP_SRC_CFG 0x0018
21 #define ADE_CTRL1 0x008C
22 #define ADE_EN 0x0100
23 #define ADE_DISABLE 0
26 #define ADE_SOFT_RST_SEL(x) (0x0078 + (x) * 0x4)
27 #define ADE_RELOAD_DIS(x) (0x00AC + (x) * 0x4)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/hisilicon/kirin/
Dkirin_ade_reg.h15 #define ADE_CTRL 0x0004
16 #define FRM_END_START_OFST 0
18 #define AUTO_CLK_GATE_EN_OFST 0
19 #define AUTO_CLK_GATE_EN BIT(0)
20 #define ADE_DISP_SRC_CFG 0x0018
21 #define ADE_CTRL1 0x008C
22 #define ADE_EN 0x0100
23 #define ADE_DISABLE 0
26 #define ADE_SOFT_RST_SEL(x) (0x0078 + (x) * 0x4)
27 #define ADE_RELOAD_DIS(x) (0x00AC + (x) * 0x4)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dcoregv100.c28 .mthd = 0x0000,
29 .addr = 0x000000,
31 { 0x0200, 0x680200 },
32 { 0x0208, 0x680208 },
33 { 0x020c, 0x68020c },
34 { 0x0210, 0x680210 },
35 { 0x0214, 0x680214 },
36 { 0x0218, 0x680218 },
37 { 0x021c, 0x68021c },
44 .mthd = 0x0020,
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dmax98396.h11 #define MAX98396_R2000_SW_RESET 0x2000
12 #define MAX98396_R2001_INT_RAW1 0x2001
13 #define MAX98396_R2002_INT_RAW2 0x2002
14 #define MAX98396_R2003_INT_RAW3 0x2003
15 #define MAX98396_R2004_INT_RAW4 0x2004
16 #define MAX98396_R2006_INT_STATE1 0x2006
17 #define MAX98396_R2007_INT_STATE2 0x2007
18 #define MAX98396_R2008_INT_STATE3 0x2008
19 #define MAX98396_R2009_INT_STATE4 0x2009
20 #define MAX98396_R200B_INT_FLAG1 0x200B
[all …]
/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-fsd.c23 /* Register Offset definitions for CMU_CMU (0x11c10000) */
24 #define PLL_LOCKTIME_PLL_SHARED0 0x0
25 #define PLL_LOCKTIME_PLL_SHARED1 0x4
26 #define PLL_LOCKTIME_PLL_SHARED2 0x8
27 #define PLL_LOCKTIME_PLL_SHARED3 0xc
28 #define PLL_CON0_PLL_SHARED0 0x100
29 #define PLL_CON0_PLL_SHARED1 0x120
30 #define PLL_CON0_PLL_SHARED2 0x140
31 #define PLL_CON0_PLL_SHARED3 0x160
32 #define MUX_CMU_CIS0_CLKMUX 0x1000
[all …]
Dclk-exynosautov9.c32 /* Register Offset definitions for CMU_TOP (0x1b240000) */
33 #define PLL_LOCKTIME_PLL_SHARED0 0x0000
34 #define PLL_LOCKTIME_PLL_SHARED1 0x0004
35 #define PLL_LOCKTIME_PLL_SHARED2 0x0008
36 #define PLL_LOCKTIME_PLL_SHARED3 0x000c
37 #define PLL_LOCKTIME_PLL_SHARED4 0x0010
38 #define PLL_CON0_PLL_SHARED0 0x0100
39 #define PLL_CON3_PLL_SHARED0 0x010c
40 #define PLL_CON0_PLL_SHARED1 0x0140
41 #define PLL_CON3_PLL_SHARED1 0x014c
[all …]
Dclk-exynos850.c34 /* Register Offset definitions for CMU_TOP (0x120e0000) */
35 #define PLL_LOCKTIME_PLL_MMC 0x0000
36 #define PLL_LOCKTIME_PLL_SHARED0 0x0004
37 #define PLL_LOCKTIME_PLL_SHARED1 0x0008
38 #define PLL_CON0_PLL_MMC 0x0100
39 #define PLL_CON3_PLL_MMC 0x010c
40 #define PLL_CON0_PLL_SHARED0 0x0140
41 #define PLL_CON3_PLL_SHARED0 0x014c
42 #define PLL_CON0_PLL_SHARED1 0x0180
43 #define PLL_CON3_PLL_SHARED1 0x018c
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/samsung/s5p-mfc/
Dregs-mfc.h20 #define S5P_FIMV_START_ADDR 0x0000
21 #define S5P_FIMV_END_ADDR 0xe008
23 #define S5P_FIMV_SW_RESET 0x0000
24 #define S5P_FIMV_RISC_HOST_INT 0x0008
27 #define S5P_FIMV_HOST2RISC_CMD 0x0030
28 #define S5P_FIMV_HOST2RISC_ARG1 0x0034
29 #define S5P_FIMV_HOST2RISC_ARG2 0x0038
30 #define S5P_FIMV_HOST2RISC_ARG3 0x003c
31 #define S5P_FIMV_HOST2RISC_ARG4 0x0040
34 #define S5P_FIMV_RISC2HOST_CMD 0x0044
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/s5p-mfc/
Dregs-mfc.h20 #define S5P_FIMV_START_ADDR 0x0000
21 #define S5P_FIMV_END_ADDR 0xe008
23 #define S5P_FIMV_SW_RESET 0x0000
24 #define S5P_FIMV_RISC_HOST_INT 0x0008
27 #define S5P_FIMV_HOST2RISC_CMD 0x0030
28 #define S5P_FIMV_HOST2RISC_ARG1 0x0034
29 #define S5P_FIMV_HOST2RISC_ARG2 0x0038
30 #define S5P_FIMV_HOST2RISC_ARG3 0x003c
31 #define S5P_FIMV_HOST2RISC_ARG4 0x0040
34 #define S5P_FIMV_RISC2HOST_CMD 0x0044
[all …]
/kernel/linux/linux-6.6/drivers/media/i2c/
Dhi846.c22 #define HI846_REG_FLL 0x0006
23 #define HI846_FLL_MAX 0xffff
26 #define HI846_REG_LLP 0x0008
29 #define HI846_REG_BINNING_MODE 0x000c
31 #define HI846_REG_IMAGE_ORIENTATION 0x000e
33 #define HI846_REG_UNKNOWN_0022 0x0022
35 #define HI846_REG_Y_ADDR_START_VACT_H 0x0026
36 #define HI846_REG_Y_ADDR_START_VACT_L 0x0027
37 #define HI846_REG_UNKNOWN_0028 0x0028
39 #define HI846_REG_Y_ADDR_END_VACT_H 0x002c
[all …]
Dhi556.c23 #define HI556_REG_CHIP_ID 0x0f16
24 #define HI556_CHIP_ID 0x0556
26 #define HI556_REG_MODE_SELECT 0x0a00
27 #define HI556_MODE_STANDBY 0x0000
28 #define HI556_MODE_STREAMING 0x0100
31 #define HI556_REG_FLL 0x0006
32 #define HI556_FLL_30FPS 0x0814
33 #define HI556_FLL_30FPS_MIN 0x0814
34 #define HI556_FLL_MAX 0x7fff
37 #define HI556_REG_LLP 0x0008
[all …]
Dhi847.c25 #define HI847_REG_CHIP_ID 0x0716
26 #define HI847_CHIP_ID 0x0847
28 #define HI847_REG_MODE_SELECT 0x0B00
29 #define HI847_MODE_STANDBY 0x0000
30 #define HI847_MODE_STREAMING 0x0100
32 #define HI847_REG_MODE_TG 0x027E
33 #define HI847_REG_MODE_TG_ENABLE 0x0100
34 #define HI847_REG_MODE_TG_DISABLE 0x0000
37 #define HI847_REG_FLL 0x020E
38 #define HI847_FLL_30FPS 0x0B51
[all …]
/kernel/linux/linux-5.10/drivers/media/i2c/
Dhi556.c23 #define HI556_REG_CHIP_ID 0x0f16
24 #define HI556_CHIP_ID 0x0556
26 #define HI556_REG_MODE_SELECT 0x0a00
27 #define HI556_MODE_STANDBY 0x0000
28 #define HI556_MODE_STREAMING 0x0100
31 #define HI556_REG_FLL 0x0006
32 #define HI556_FLL_30FPS 0x0814
33 #define HI556_FLL_30FPS_MIN 0x0814
34 #define HI556_FLL_MAX 0x7fff
37 #define HI556_REG_LLP 0x0008
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/mt6357/
Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dgv100.c41 const u32 hoff = 0x800 * head; in gv100_sor_hda_device_entry()
43 nvkm_mask(device, 0x616528 + hoff, 0x00000070, head << 4); in gv100_sor_hda_device_entry()
57 const u32 hoff = head * 0x800; in gv100_sor_dp_watermark()
59 nvkm_mask(device, 0x616550 + hoff, 0x0c00003f, 0x08000000 | watermark); in gv100_sor_dp_watermark()
66 const u32 hoff = head * 0x800; in gv100_sor_dp_audio_sym()
68 nvkm_mask(device, 0x616568 + hoff, 0x0000ffff, h); in gv100_sor_dp_audio_sym()
69 nvkm_mask(device, 0x61656c + hoff, 0x00ffffff, v); in gv100_sor_dp_audio_sym()
76 const u32 hoff = 0x800 * head; in gv100_sor_dp_audio()
77 const u32 data = 0x80000000 | (0x00000001 * enable); in gv100_sor_dp_audio()
78 const u32 mask = 0x8000000d; in gv100_sor_dp_audio()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2.h28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2.h28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
/kernel/linux/linux-6.6/fs/exfat/
Dnls.c16 #define UTBL_COUNT (0x10000)
24 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
25 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
26 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
27 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f,
28 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027,
29 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f,
30 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037,
31 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f,
32 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047,
[all …]
/kernel/linux/linux-5.10/fs/exfat/
Dnls.c16 #define UTBL_COUNT (0x10000)
24 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
25 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
26 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
27 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f,
28 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027,
29 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f,
30 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037,
31 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f,
32 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047,
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power9/
Dother.json3 "EventCode": "0x3084",
8 "EventCode": "0xF880",
13 "EventCode": "0x4088",
18 "EventCode": "0x20A4",
23 "EventCode": "0x40008",
28 "EventCode": "0x20064",
33 "EventCode": "0x260B4",
38 "EventCode": "0x20006",
43 "EventCode": "0x201E4",
48 "EventCode": "0x4E044",
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/powerpc/power9/
Dother.json3 "EventCode": "0x3084",
8 "EventCode": "0xF880",
13 "EventCode": "0x4088",
18 "EventCode": "0x20A4",
23 "EventCode": "0x40008",
28 "EventCode": "0x20064",
33 "EventCode": "0x260B4",
38 "EventCode": "0x20006",
43 "EventCode": "0x201E4",
48 "EventCode": "0x4E044",
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/powerpc/power8/
Dother.json3 "EventCode": "0x1f05e",
9 "EventCode": "0x2006e",
11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
15 "EventCode": "0x4e05e",
17 …"BriefDescription": "Number of cycles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 bel…
21 "EventCode": "0x610050",
27 "EventCode": "0x520050",
33 "EventCode": "0x620052",
39 "EventCode": "0x610052",
45 "EventCode": "0x610054",
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/power8/
Dother.json3 "EventCode": "0x1f05e",
9 "EventCode": "0x2006e",
11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
15 "EventCode": "0x4e05e",
17 …"BriefDescription": "Number of cycles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 bel…
21 "EventCode": "0x610050",
27 "EventCode": "0x520050",
33 "EventCode": "0x620052",
39 "EventCode": "0x610052",
45 "EventCode": "0x610054",
[all …]

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