| /kernel/linux/linux-6.6/include/sound/ |
| D | gus.h | 21 #define SNDRV_g_u_s_MIDICTRL (0x320-0x220) 22 #define SNDRV_g_u_s_MIDISTAT (0x320-0x220) 23 #define SNDRV_g_u_s_MIDIDATA (0x321-0x220) 25 #define SNDRV_g_u_s_GF1PAGE (0x322-0x220) 26 #define SNDRV_g_u_s_GF1REGSEL (0x323-0x220) 27 #define SNDRV_g_u_s_GF1DATALOW (0x324-0x220) 28 #define SNDRV_g_u_s_GF1DATAHIGH (0x325-0x220) 29 #define SNDRV_g_u_s_IRQSTAT (0x226-0x220) 30 #define SNDRV_g_u_s_TIMERCNTRL (0x228-0x220) 31 #define SNDRV_g_u_s_TIMERDATA (0x229-0x220) [all …]
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| /kernel/linux/linux-5.10/include/sound/ |
| D | gus.h | 21 #define SNDRV_g_u_s_MIDICTRL (0x320-0x220) 22 #define SNDRV_g_u_s_MIDISTAT (0x320-0x220) 23 #define SNDRV_g_u_s_MIDIDATA (0x321-0x220) 25 #define SNDRV_g_u_s_GF1PAGE (0x322-0x220) 26 #define SNDRV_g_u_s_GF1REGSEL (0x323-0x220) 27 #define SNDRV_g_u_s_GF1DATALOW (0x324-0x220) 28 #define SNDRV_g_u_s_GF1DATAHIGH (0x325-0x220) 29 #define SNDRV_g_u_s_IRQSTAT (0x226-0x220) 30 #define SNDRV_g_u_s_TIMERCNTRL (0x228-0x220) 31 #define SNDRV_g_u_s_TIMERDATA (0x229-0x220) [all …]
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | am4.h | 8 #define AM4_CLKCTRL_OFFSET 0x20 14 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120) 15 #define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220) 16 #define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228) 17 #define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230) 18 #define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328) 19 #define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338) 20 #define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340) 21 #define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348) 22 #define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350) [all …]
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| D | dm814.h | 8 #define DM814_CLKCTRL_OFFSET 0x0 12 #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58) 15 #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150) 16 #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154) 17 #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158) 18 #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c) 19 #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160) 20 #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164) 21 #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168) 22 #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c) [all …]
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| D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100 14 #define CLK_APB3_I2C1 0x108 15 #define CLK_APB3_DAC 0x110 16 #define CLK_APB3_ADC0 0x118 17 #define CLK_APB3_ADC1 0x120 18 #define CLK_APB3_CAN0 0x128 19 #define CLK_APB1_BUS 0x200 20 #define CLK_APB1_MOTOCON_PWM 0x208 21 #define CLK_APB1_I2C0 0x210 22 #define CLK_APB1_I2S 0x218 [all …]
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| D | am4.h | 8 #define AM4_CLKCTRL_OFFSET 0x20 12 #define AM4_L3S_TSC_CLKCTRL_OFFSET 0x120 14 #define AM4_L3S_TSC_ADC_TSC_CLKCTRL AM4_L3S_TSC_CLKCTRL_INDEX(0x120) 17 #define AM4_L4_WKUP_AON_CLKCTRL_OFFSET 0x228 19 #define AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL AM4_L4_WKUP_AON_CLKCTRL_INDEX(0x228) 20 #define AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL AM4_L4_WKUP_AON_CLKCTRL_INDEX(0x230) 23 #define AM4_L4_WKUP_CLKCTRL_OFFSET 0x220 25 #define AM4_L4_WKUP_L4_WKUP_CLKCTRL AM4_L4_WKUP_CLKCTRL_INDEX(0x220) 26 #define AM4_L4_WKUP_TIMER1_CLKCTRL AM4_L4_WKUP_CLKCTRL_INDEX(0x328) 27 #define AM4_L4_WKUP_WD_TIMER2_CLKCTRL AM4_L4_WKUP_CLKCTRL_INDEX(0x338) [all …]
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| D | dm814.h | 8 #define DM814_CLKCTRL_OFFSET 0x0 12 #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58) 15 #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150) 16 #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154) 17 #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158) 18 #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c) 19 #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160) 20 #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164) 21 #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168) 22 #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c) [all …]
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| D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100 14 #define CLK_APB3_I2C1 0x108 15 #define CLK_APB3_DAC 0x110 16 #define CLK_APB3_ADC0 0x118 17 #define CLK_APB3_ADC1 0x120 18 #define CLK_APB3_CAN0 0x128 19 #define CLK_APB1_BUS 0x200 20 #define CLK_APB1_MOTOCON_PWM 0x208 21 #define CLK_APB1_I2C0 0x210 22 #define CLK_APB1_I2S 0x218 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | hisilicon-pcie.txt | 17 - port-id: Should be 0, 1, 2 or 3. 26 reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>; 28 bus-range = <0 15>; 34 ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>; 38 interrupt-map-mask = <0xf800 0 0 7>; 39 interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10 40 0x0 0 0 2 &mbigen_pcie 2 11 41 0x0 0 0 3 &mbigen_pcie 3 12 42 0x0 0 0 4 &mbigen_pcie 4 13>;
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| /kernel/linux/linux-5.10/sound/isa/gus/ |
| D | gusextreme.c | 32 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 35 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 36 static long gf1_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x210,0x220,0x230,0x240,0x… 37 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x300,0x310,0x320 */ 41 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */ 43 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29}; 44 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */ 45 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24}; 46 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 86 static const long possible_ports[] = {0x220, 0x240, 0x260}; in snd_gusextreme_es1688_create() [all …]
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| /kernel/linux/linux-6.6/sound/isa/gus/ |
| D | gusextreme.c | 31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 34 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 35 static long gf1_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x210,0x220,0x230,0x240,0x… 36 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x300,0x310,0x320 */ 40 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */ 42 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29}; 43 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */ 44 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24}; 45 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 85 static const long possible_ports[] = {0x220, 0x240, 0x260}; in snd_gusextreme_es1688_create() [all …]
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| D | gusclassic.c | 27 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 30 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */ 34 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29}; 35 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */ 36 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24}; 37 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 69 static const long possible_ports[] = {0x220, 0x230, 0x240, 0x250, 0x260}; in snd_gusclassic_create() 77 if (irq[n] < 0) { in snd_gusclassic_create() 84 if (dma1[n] < 0) { in snd_gusclassic_create() 91 if (dma2[n] < 0) { in snd_gusclassic_create() [all …]
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| /kernel/linux/linux-6.6/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 9 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX 0x28 10 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX 0x2c 11 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX 0x30 12 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX 0x34 14 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2 0x08 15 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10 16 #define QSERDES_UFS_V6_RX_VGA_CAL_MAN_VAL 0x178 17 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B0 0x208 18 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B1 0x20c 19 #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B3 0x214 [all …]
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| D | phy-qcom-qmp-qserdes-txrx-v6_20.h | 9 #define QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_TX 0x30 10 #define QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_RX 0x34 11 #define QSERDES_V6_20_TX_TRAN_DRVR_EMP_EN 0xac 12 #define QSERDES_V6_20_TX_LANE_MODE_1 0x78 13 #define QSERDES_V6_20_TX_LANE_MODE_2 0x7c 14 #define QSERDES_V6_20_TX_LANE_MODE_3 0x80 16 #define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2 0x08 17 #define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3 0x0c 18 #define QSERDES_V6_20_RX_UCDR_PI_CONTROLS 0x20 19 #define QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3 0x34 [all …]
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| /kernel/linux/linux-6.6/Documentation/sound/ |
| D | alsa-configuration.rst | 57 (0 = disable debug prints, 1 = normal debug messages, 71 Default: 0 80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped 81 to PCM #0 of the card #0. 83 commas, such like ``dsp_map=0,1``. 98 Default: 0 119 Values: 0 through 31 or negative; 142 appearing card. They can do it by specifying "index=1,0" module 158 the port must be specified. For actual AdLib FM cards it will be 0x388. 170 64:0 OPL2 FM synth OPL2 FM Port [all …]
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| /kernel/linux/linux-5.10/Documentation/sound/ |
| D | alsa-configuration.rst | 57 (0 = disable debug prints, 1 = normal debug messages, 71 Default: 0 80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped 81 to PCM #0 of the card #0. 83 commas, such like ``dsp_map=0,1``. 98 Default: 0 110 Values: 0 through 31 or negative; 136 the port must be specified. For actual AdLib FM cards it will be 0x388. 148 64:0 OPL2 FM synth OPL2 FM Port 153 sbiload -p 64:0 std.sb drums.sb [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | tsi108_pci.h | 12 #define TSI108_PCI_P2O_BAR0 (TSI108_PCI_OFFSET + 0x10) 13 #define TSI108_PCI_P2O_BAR0_UPPER (TSI108_PCI_OFFSET + 0x14) 14 #define TSI108_PCI_P2O_BAR2 (TSI108_PCI_OFFSET + 0x18) 15 #define TSI108_PCI_P2O_BAR2_UPPER (TSI108_PCI_OFFSET + 0x1c) 16 #define TSI108_PCI_P2O_PAGE_SIZES (TSI108_PCI_OFFSET + 0x4c) 17 #define TSI108_PCI_PFAB_BAR0 (TSI108_PCI_OFFSET + 0x204) 18 #define TSI108_PCI_PFAB_BAR0_UPPER (TSI108_PCI_OFFSET + 0x208) 19 #define TSI108_PCI_PFAB_IO (TSI108_PCI_OFFSET + 0x20c) 20 #define TSI108_PCI_PFAB_IO_UPPER (TSI108_PCI_OFFSET + 0x210) 21 #define TSI108_PCI_PFAB_MEM32 (TSI108_PCI_OFFSET + 0x214) [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | tsi108_pci.h | 12 #define TSI108_PCI_P2O_BAR0 (TSI108_PCI_OFFSET + 0x10) 13 #define TSI108_PCI_P2O_BAR0_UPPER (TSI108_PCI_OFFSET + 0x14) 14 #define TSI108_PCI_P2O_BAR2 (TSI108_PCI_OFFSET + 0x18) 15 #define TSI108_PCI_P2O_BAR2_UPPER (TSI108_PCI_OFFSET + 0x1c) 16 #define TSI108_PCI_P2O_PAGE_SIZES (TSI108_PCI_OFFSET + 0x4c) 17 #define TSI108_PCI_PFAB_BAR0 (TSI108_PCI_OFFSET + 0x204) 18 #define TSI108_PCI_PFAB_BAR0_UPPER (TSI108_PCI_OFFSET + 0x208) 19 #define TSI108_PCI_PFAB_IO (TSI108_PCI_OFFSET + 0x20c) 20 #define TSI108_PCI_PFAB_IO_UPPER (TSI108_PCI_OFFSET + 0x210) 21 #define TSI108_PCI_PFAB_MEM32 (TSI108_PCI_OFFSET + 0x214) [all …]
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt6795-apmixedsys.c | 15 #define REG_REF2USB 0x8 16 #define REG_AP_PLL_CON7 0x1c 17 #define MD1_MTCMOS_OFF BIT(0) 23 #define MT6795_CON0_EN BIT(0) 43 .pll_en_bit = 0, \ 47 PLL(CLK_APMIXED_ARMCA53PLL, "armca53pll", 0x200, 0x20c, 0, PLL_AO, 48 21, 0x204, 24, 0x0, 0x204, 0), 49 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000101, HAVE_RST_BAR, 50 21, 0x220, 4, 0x0, 0x224, 0), 51 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR, [all …]
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| D | clk-mt8173-apmixedsys.c | 17 #define REGOFF_REF2USB 0x8 18 #define REGOFF_HDMI_REF 0x40 52 { .div = 0, .freq = MT8173_PLL_FMAX }, 61 PLL(CLK_APMIXED_ARMCA15PLL, "armca15pll", 0x200, 0x20c, 0, PLL_AO, 62 21, 0x204, 24, 0x0, 0x204, 0), 63 PLL(CLK_APMIXED_ARMCA7PLL, "armca7pll", 0x210, 0x21c, 0, PLL_AO, 64 21, 0x214, 24, 0x0, 0x214, 0), 65 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000100, HAVE_RST_BAR, 21, 66 0x220, 4, 0x0, 0x224, 0), 67 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7, [all …]
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| /kernel/linux/linux-6.6/sound/isa/sb/ |
| D | sb8.c | 21 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 24 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 60 return 0; in snd_sb8_match() 63 return 0; in snd_sb8_match() 67 return 0; in snd_sb8_match() 82 if (err < 0) in snd_sb8_probe() 87 * Block the 0x388 port to avoid PnP conflicts. in snd_sb8_probe() 91 acard->fm_res = devm_request_region(card->dev, 0x388, 4, in snd_sb8_probe() 98 if (err < 0) in snd_sb8_probe() 103 0x220, 0x240, 0x260, in snd_sb8_probe() [all …]
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| /kernel/linux/linux-5.10/arch/xtensa/include/asm/ |
| D | mxregs.h | 20 * 00nn 0...0p..p Interrupt Routing, route IRQ n to processor p 21 * 01pp 0...0d..d 16 bits (d) 'ored' as single IPI to processor p 22 * 0180 0...0m..m Clear enable specified by mask (m) 23 * 0184 0...0m..m Set enable specified by mask (m) 24 * 0190 0...0x..x 8-bit IPI partition register 30 * 0200 0...0m..m RunStall core 'n' 34 #define MIROUT(irq) (0x000 + (irq)) 35 #define MIPICAUSE(cpu) (0x100 + (cpu)) 36 #define MIPISET(cause) (0x140 + (cause)) 37 #define MIENG 0x180 [all …]
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| /kernel/linux/linux-6.6/arch/xtensa/include/asm/ |
| D | mxregs.h | 20 * 00nn 0...0p..p Interrupt Routing, route IRQ n to processor p 21 * 01pp 0...0d..d 16 bits (d) 'ored' as single IPI to processor p 22 * 0180 0...0m..m Clear enable specified by mask (m) 23 * 0184 0...0m..m Set enable specified by mask (m) 24 * 0190 0...0x..x 8-bit IPI partition register 30 * 0200 0...0m..m RunStall core 'n' 34 #define MIROUT(irq) (0x000 + (irq)) 35 #define MIPICAUSE(cpu) (0x100 + (cpu)) 36 #define MIPISET(cause) (0x140 + (cause)) 37 #define MIENG 0x180 [all …]
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| /kernel/linux/linux-5.10/sound/isa/sb/ |
| D | sb8.c | 22 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 25 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 70 return 0; in snd_sb8_match() 73 return 0; in snd_sb8_match() 77 return 0; in snd_sb8_match() 92 if (err < 0) in snd_sb8_probe() 97 /* block the 0x388 port to avoid PnP conflicts */ in snd_sb8_probe() 98 acard->fm_res = request_region(0x388, 4, "SoundBlaster FM"); in snd_sb8_probe() 106 &chip)) < 0) in snd_sb8_probe() 111 0x220, 0x240, 0x260, in snd_sb8_probe() [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sunplus/ |
| D | spl2sw_register.h | 10 #define L2SW_SW_INT_STATUS_0 0x0 11 #define L2SW_SW_INT_MASK_0 0x4 12 #define L2SW_FL_CNTL_TH 0x8 13 #define L2SW_CPU_FL_CNTL_TH 0xc 14 #define L2SW_PRI_FL_CNTL 0x10 15 #define L2SW_VLAN_PRI_TH 0x14 16 #define L2SW_EN_TOS_BUS 0x18 17 #define L2SW_TOS_MAP0 0x1c 18 #define L2SW_TOS_MAP1 0x20 19 #define L2SW_TOS_MAP2 0x24 [all …]
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