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/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
Dccu-sun8i-h3.c29 "osc24M", 0x000,
32 0, 2, /* M */
50 #define SUN8I_H3_PLL_AUDIO_REG 0x008
53 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
54 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
58 "osc24M", 0x008,
60 0, 5, /* M */
62 0x284, BIT(31),
68 "osc24M", 0x0010,
72 0, 4, /* M */
[all …]
Dccu-sun8i-v3s.c31 "osc24M", 0x000,
34 0, 2, /* M */
38 0);
52 #define SUN8I_V3S_PLL_AUDIO_REG 0x008
55 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
56 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
60 "osc24M", 0x008,
62 0, 5, /* M */
64 0x284, BIT(31),
70 "osc24M", 0x0010,
[all …]
Dccu-sun50i-a64.c31 .m = _SUNXI_CCU_DIV(0, 2),
34 .reg = 0x000,
54 #define SUN50I_A64_PLL_AUDIO_REG 0x008
57 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
58 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
62 "osc24M", 0x008,
64 0, 5, /* M */
66 0x284, BIT(31),
72 "osc24M", 0x010,
76 0, 4, /* M */
[all …]
Dccu-sun6i-a31.c33 "osc24M", 0x000,
36 0, 2, /* M */
39 0);
53 #define SUN6I_A31_PLL_AUDIO_REG 0x008
56 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
57 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
61 "osc24M", 0x008,
63 0, 5, /* M */
65 0x284, BIT(31),
71 "osc24M", 0x010,
[all …]
Dccu-sun8i-a83t.c24 #define CCU_SUN8I_A83T_LOCK_REG 0x20c
33 #define SUN8I_A83T_PLL_C0CPUX_REG 0x000
34 #define SUN8I_A83T_PLL_C1CPUX_REG 0x004
38 .lock = BIT(0),
39 .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
53 .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
68 * which is d1 = 0, d2 = 1.
70 #define SUN8I_A83T_PLL_AUDIO_REG 0x008
74 { .rate = 45158400, .pattern = 0xc00121ff, .m = 29, .n = 54 },
75 { .rate = 49152000, .pattern = 0xc000e147, .m = 30, .n = 61 },
[all …]
Dccu-sun8i-r40.c33 .m = _SUNXI_CCU_DIV(0, 2),
36 .reg = 0x000,
56 #define SUN8I_R40_PLL_AUDIO_REG 0x008
59 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
60 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
64 "osc24M", 0x008,
66 0, 5, /* M */
68 0x284, BIT(31),
74 "osc24M", 0x0010,
78 0, 4, /* M */
[all …]
Dccu-sun8i-a33.c32 .m = _SUNXI_CCU_DIV(0, 2),
36 .reg = 0x000,
39 0),
55 #define SUN8I_A33_PLL_AUDIO_REG 0x008
58 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
59 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
63 "osc24M", 0x008,
65 0, 5, /* M */
67 0x284, BIT(31),
73 "osc24M", 0x010,
[all …]
Dccu-sun8i-a23.c34 .m = _SUNXI_CCU_DIV(0, 2),
38 .reg = 0x000,
41 0),
57 #define SUN8I_A23_PLL_AUDIO_REG 0x008
60 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
61 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
65 "osc24M", 0x008,
67 0, 5, /* M */
69 0x284, BIT(31),
75 "osc24M", 0x010,
[all …]
Dccu-suniv-f1c100s.c33 .m = _SUNXI_CCU_DIV(0, 2),
38 .reg = 0x000,
53 #define SUNIV_PLL_AUDIO_REG 0x008
56 "osc24M", 0x008,
58 0, 5, /* M */
64 "osc24M", 0x010,
66 0, 4, /* M */
69 270000000, /* frac rate 0 */
76 "osc24M", 0x018,
78 0, 4, /* M */
[all …]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
Dccu-sun8i-h3.c27 "osc24M", 0x000,
30 0, 2, /* M */
48 #define SUN8I_H3_PLL_AUDIO_REG 0x008
51 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
52 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
56 "osc24M", 0x008,
58 0, 5, /* M */
60 0x284, BIT(31),
66 "osc24M", 0x0010,
70 0, 4, /* M */
[all …]
Dccu-sun8i-v3s.c29 "osc24M", 0x000,
32 0, 2, /* M */
36 0);
46 #define SUN8I_V3S_PLL_AUDIO_REG 0x008
49 "osc24M", 0x008,
51 0, 5, /* M */
54 0);
57 "osc24M", 0x0010,
59 0, 4, /* M */
62 270000000, /* frac rate 0 */
[all …]
Dccu-sun6i-a31.c32 "osc24M", 0x000,
35 0, 2, /* M */
38 0);
52 #define SUN6I_A31_PLL_AUDIO_REG 0x008
55 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
56 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
60 "osc24M", 0x008,
62 0, 5, /* M */
64 0x284, BIT(31),
70 "osc24M", 0x010,
[all …]
Dccu-sun50i-a64.c31 .m = _SUNXI_CCU_DIV(0, 2),
34 .reg = 0x000,
54 #define SUN50I_A64_PLL_AUDIO_REG 0x008
57 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
58 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
62 "osc24M", 0x008,
64 0, 5, /* M */
66 0x284, BIT(31),
72 "osc24M", 0x010,
76 0, 4, /* M */
[all …]
Dccu-sun8i-a83t.c24 #define CCU_SUN8I_A83T_LOCK_REG 0x20c
33 #define SUN8I_A83T_PLL_C0CPUX_REG 0x000
34 #define SUN8I_A83T_PLL_C1CPUX_REG 0x004
38 .lock = BIT(0),
39 .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
53 .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 8, 0, 12, 0),
68 * which is d1 = 0, d2 = 1.
70 #define SUN8I_A83T_PLL_AUDIO_REG 0x008
74 { .rate = 45158400, .pattern = 0xc00121ff, .m = 29, .n = 54 },
75 { .rate = 49152000, .pattern = 0xc000e147, .m = 30, .n = 61 },
[all …]
Dccu-sun8i-r40.c32 .m = _SUNXI_CCU_DIV(0, 2),
35 .reg = 0x000,
55 #define SUN8I_R40_PLL_AUDIO_REG 0x008
58 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
59 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
63 "osc24M", 0x008,
65 0, 5, /* M */
67 0x284, BIT(31),
73 "osc24M", 0x0010,
77 0, 4, /* M */
[all …]
Dccu-sun8i-a33.c31 .m = _SUNXI_CCU_DIV(0, 2),
35 .reg = 0x000,
38 0),
54 #define SUN8I_A33_PLL_AUDIO_REG 0x008
57 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
58 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
62 "osc24M", 0x008,
64 0, 5, /* M */
66 0x284, BIT(31),
72 "osc24M", 0x010,
[all …]
Dccu-sun8i-a23.c33 .m = _SUNXI_CCU_DIV(0, 2),
37 .reg = 0x000,
40 0),
56 #define SUN8I_A23_PLL_AUDIO_REG 0x008
59 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
60 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
64 "osc24M", 0x008,
66 0, 5, /* M */
68 0x284, BIT(31),
74 "osc24M", 0x010,
[all …]
Dccu-suniv-f1c100s.c32 .m = _SUNXI_CCU_DIV(0, 2),
37 .reg = 0x000,
52 #define SUNIV_PLL_AUDIO_REG 0x008
55 "osc24M", 0x008,
57 0, 5, /* M */
63 "osc24M", 0x010,
65 0, 4, /* M */
68 270000000, /* frac rate 0 */
75 "osc24M", 0x018,
77 0, 4, /* M */
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/
Dpcie-iproc-msi.c20 #define IPROC_MSI_EQ_EN_SHIFT 0
23 #define IPROC_MSI_EQ_MASK 0x3f
38 IPROC_MSI_EQ_PAGE = 0,
113 { 0x200, 0x2c0, 0x204, 0x2c4, 0x210, 0x250, 0x254, 0x208 },
114 { 0x200, 0x2c0, 0x204, 0x2c4, 0x214, 0x258, 0x25c, 0x208 },
115 { 0x200, 0x2c0, 0x204, 0x2c4, 0x218, 0x260, 0x264, 0x208 },
116 { 0x200, 0x2c0, 0x204, 0x2c4, 0x21c, 0x268, 0x26c, 0x208 },
117 { 0x200, 0x2c0, 0x204, 0x2c4, 0x220, 0x270, 0x274, 0x208 },
118 { 0x200, 0x2c0, 0x204, 0x2c4, 0x224, 0x278, 0x27c, 0x208 },
122 { 0xc00, 0xc04, 0xc08, 0xc0c, 0xc40, 0xc50, 0xc60 },
[all …]
/kernel/linux/linux-6.6/drivers/pci/controller/
Dpcie-iproc-msi.c20 #define IPROC_MSI_EQ_EN_SHIFT 0
23 #define IPROC_MSI_EQ_MASK 0x3f
38 IPROC_MSI_EQ_PAGE = 0,
113 { 0x200, 0x2c0, 0x204, 0x2c4, 0x210, 0x250, 0x254, 0x208 },
114 { 0x200, 0x2c0, 0x204, 0x2c4, 0x214, 0x258, 0x25c, 0x208 },
115 { 0x200, 0x2c0, 0x204, 0x2c4, 0x218, 0x260, 0x264, 0x208 },
116 { 0x200, 0x2c0, 0x204, 0x2c4, 0x21c, 0x268, 0x26c, 0x208 },
117 { 0x200, 0x2c0, 0x204, 0x2c4, 0x220, 0x270, 0x274, 0x208 },
118 { 0x200, 0x2c0, 0x204, 0x2c4, 0x224, 0x278, 0x27c, 0x208 },
122 { 0xc00, 0xc04, 0xc08, 0xc0c, 0xc40, 0xc50, 0xc60 },
[all …]
/kernel/linux/linux-6.6/arch/sh/boards/
Dboard-sh2007.c21 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
22 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
34 [0] = {
36 .end = SMC0_BASE + 0xff,
40 .start = evt2irq(0x240),
41 .end = evt2irq(0x240),
47 [0] = {
49 .end = SMC1_BASE + 0xff,
53 .start = evt2irq(0x280),
54 .end = evt2irq(0x280),
[all …]
/kernel/linux/linux-5.10/arch/sh/boards/
Dboard-sh2007.c21 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
22 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
34 [0] = {
36 .end = SMC0_BASE + 0xff,
40 .start = evt2irq(0x240),
41 .end = evt2irq(0x240),
47 [0] = {
49 .end = SMC1_BASE + 0xff,
53 .start = evt2irq(0x280),
54 .end = evt2irq(0x280),
[all …]
/kernel/linux/linux-5.10/arch/sh/boards/mach-sdk7786/
Dsetup.c28 .start = 0x07fff8b0,
29 .end = 0x07fff8b0 + sizeof(u16) - 1,
47 [0] = {
49 .start = 0x07ffff00,
50 .end = 0x07ffff00 + SZ_256 - 1,
55 .start = evt2irq(0x2c0),
56 .end = evt2irq(0x2c0),
79 .start = 0x07fff9e0,
80 .end = 0x07fff9e0 + SZ_32 - 1,
86 .id = 0,
[all …]
/kernel/linux/linux-6.6/arch/sh/boards/mach-sdk7786/
Dsetup.c28 .start = 0x07fff8b0,
29 .end = 0x07fff8b0 + sizeof(u16) - 1,
47 [0] = {
49 .start = 0x07ffff00,
50 .end = 0x07ffff00 + SZ_256 - 1,
55 .start = evt2irq(0x2c0),
56 .end = evt2irq(0x2c0),
79 .start = 0x07fff9e0,
80 .end = 0x07fff9e0 + SZ_32 - 1,
86 .id = 0,
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt7996/
Deeprom.h12 MT_EE_CHIP_ID = 0x000,
13 MT_EE_VERSION = 0x002,
14 MT_EE_MAC_ADDR = 0x004,
15 MT_EE_MAC_ADDR2 = 0x00a,
16 MT_EE_WIFI_CONF = 0x190,
17 MT_EE_MAC_ADDR3 = 0x2c0,
18 MT_EE_RATE_DELTA_2G = 0x1400,
19 MT_EE_RATE_DELTA_5G = 0x147d,
20 MT_EE_RATE_DELTA_6G = 0x154a,
21 MT_EE_TX0_POWER_2G = 0x1300,
[all …]

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