| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| D | gaudi_blocks.h | 16 #define mmNIC0_PHY0_BASE 0x0ull 17 #define NIC0_PHY0_MAX_OFFSET 0x9F13 18 #define mmMME0_ACC_BASE 0x7FFC020000ull 19 #define MME0_ACC_MAX_OFFSET 0x5C00 20 #define MME0_ACC_SECTION 0x20000 21 #define mmMME0_SBAB_BASE 0x7FFC040000ull 22 #define MME0_SBAB_MAX_OFFSET 0x5800 23 #define MME0_SBAB_SECTION 0x1000 24 #define mmMME0_PRTN_BASE 0x7FFC041000ull 25 #define MME0_PRTN_MAX_OFFSET 0x5000 [all …]
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/asic_reg/ |
| D | gaudi_blocks.h | 16 #define mmNIC0_PHY0_BASE 0x0ull 17 #define NIC0_PHY0_MAX_OFFSET 0x9F13 18 #define mmMME0_ACC_BASE 0x7FFC020000ull 19 #define MME0_ACC_MAX_OFFSET 0x5C00 20 #define MME0_ACC_SECTION 0x20000 21 #define mmMME0_SBAB_BASE 0x7FFC040000ull 22 #define MME0_SBAB_MAX_OFFSET 0x5800 23 #define MME0_SBAB_SECTION 0x1000 24 #define mmMME0_PRTN_BASE 0x7FFC041000ull 25 #define MME0_PRTN_MAX_OFFSET 0x5000 [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | mpc8548cds.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x01000000>; 44 partition@0 { 45 reg = <0x0 0x0b00000>; 50 reg = <0x0b00000 0x0400000>; 55 reg = <0x0f00000 0x060000>; 60 reg = <0x0f60000 0x020000>; 66 reg = <0x0f80000 0x080000>; 72 board-control@1,0 { 74 reg = <0x1 0x0 0x1000>; [all …]
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| /kernel/linux/linux-5.10/drivers/s390/cio/ |
| D | device_id.c | 31 * diag210_to_senseid - convert diag 0x210 data to sense id information 33 * @diag: diag 0x210 data 35 * Return 0 on success, non-zero otherwise. 42 { 0x08, 0x01, 0x3480 }, in diag210_to_senseid() 43 { 0x08, 0x02, 0x3430 }, in diag210_to_senseid() 44 { 0x08, 0x10, 0x3420 }, in diag210_to_senseid() 45 { 0x08, 0x42, 0x3424 }, in diag210_to_senseid() 46 { 0x08, 0x44, 0x9348 }, in diag210_to_senseid() 47 { 0x08, 0x81, 0x3490 }, in diag210_to_senseid() 48 { 0x08, 0x82, 0x3422 }, in diag210_to_senseid() [all …]
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| /kernel/linux/linux-6.6/drivers/s390/cio/ |
| D | device_id.c | 31 * diag210_to_senseid - convert diag 0x210 data to sense id information 33 * @diag: diag 0x210 data 35 * Return 0 on success, non-zero otherwise. 42 { 0x08, 0x01, 0x3480 }, in diag210_to_senseid() 43 { 0x08, 0x02, 0x3430 }, in diag210_to_senseid() 44 { 0x08, 0x10, 0x3420 }, in diag210_to_senseid() 45 { 0x08, 0x42, 0x3424 }, in diag210_to_senseid() 46 { 0x08, 0x44, 0x9348 }, in diag210_to_senseid() 47 { 0x08, 0x81, 0x3490 }, in diag210_to_senseid() 48 { 0x08, 0x82, 0x3422 }, in diag210_to_senseid() [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/netronome/nfp/nfpcore/ |
| D | nfp_dev.h | 9 #define PCI_VENDOR_ID_CORIGINE 0x1da8 10 #define PCI_DEVICE_ID_NFP3800 0x3800 11 #define PCI_DEVICE_ID_NFP4000 0x4000 12 #define PCI_DEVICE_ID_NFP5000 0x5000 13 #define PCI_DEVICE_ID_NFP6000 0x6000 14 #define PCI_DEVICE_ID_NFP3800_VF 0x3803 15 #define PCI_DEVICE_ID_NFP6000_VF 0x6003
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| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb3/ |
| D | mc5.c | 42 DBGI_MODE_MBUS = 0, 47 #define IDT_CMD_READ 0 53 #define IDT_LAR_ADR0 0x180006 54 #define IDT_LAR_MODE144 0xffff0000 57 #define IDT_SCR_ADR0 0x180000 58 #define IDT_SSR0_ADR0 0x180002 59 #define IDT_SSR1_ADR0 0x180004 62 #define IDT_GMR_BASE_ADR0 0x180020 65 #define IDT_DATARY_BASE_ADR0 0 66 #define IDT_MSKARY_BASE_ADR0 0x80000 [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb3/ |
| D | mc5.c | 42 DBGI_MODE_MBUS = 0, 47 #define IDT_CMD_READ 0 53 #define IDT_LAR_ADR0 0x180006 54 #define IDT_LAR_MODE144 0xffff0000 57 #define IDT_SCR_ADR0 0x180000 58 #define IDT_SSR0_ADR0 0x180002 59 #define IDT_SSR1_ADR0 0x180004 62 #define IDT_GMR_BASE_ADR0 0x180020 65 #define IDT_DATARY_BASE_ADR0 0 66 #define IDT_MSKARY_BASE_ADR0 0x80000 [all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/i2c/ |
| D | ov2722.h | 38 #define I2C_MSG_LENGTH 0x2 50 * bits 31-16: numerator, bits 15-0: denominator 52 #define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064 56 * bits 31-16: numerator, bits 15-0: denominator 58 #define OV2722_F_NUMBER_DEFAULT 0x1a000a 65 * bits 7-0: min f-number denominator 67 #define OV2722_F_NUMBER_RANGE 0x1a0a1a0a 68 #define OV2720_ID 0x2720 69 #define OV2722_ID 0x2722 71 #define OV2722_FINE_INTG_TIME_MIN 0 [all …]
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| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/i2c/ |
| D | ov2722.h | 38 #define I2C_MSG_LENGTH 0x2 47 * bits 31-16: numerator, bits 15-0: denominator 49 #define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064 53 * bits 31-16: numerator, bits 15-0: denominator 55 #define OV2722_F_NUMBER_DEFAULT 0x1a000a 62 * bits 7-0: min f-number denominator 64 #define OV2722_F_NUMBER_RANGE 0x1a0a1a0a 65 #define OV2720_ID 0x2720 66 #define OV2722_ID 0x2722 68 #define OV2722_FINE_INTG_TIME_MIN 0 [all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/i2c/ov5693/ |
| D | ov5693.h | 38 #define ENABLE_NON_PREVIEW 0 43 #define I2C_MSG_LENGTH 0x2 54 #define OV5693_READ_MODE_BINNING_ON 0x0400 55 #define OV5693_READ_MODE_BINNING_OFF 0x00 58 #define OV5693_MAX_EXPOSURE_VALUE 0xFFF1 59 #define OV5693_MAX_GAIN_VALUE 0xFF 63 * bits 31-16: numerator, bits 15-0: denominator 65 #define OV5693_FOCAL_LENGTH_DEFAULT 0x1B70064 69 * bits 31-16: numerator, bits 15-0: denominator 71 #define OV5693_F_NUMBER_DEFAULT 0x18000a [all …]
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| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/i2c/ov5693/ |
| D | ov5693.h | 38 #define ENABLE_NON_PREVIEW 0 43 #define I2C_MSG_LENGTH 0x2 54 #define OV5693_READ_MODE_BINNING_ON 0x0400 55 #define OV5693_READ_MODE_BINNING_OFF 0x00 58 #define OV5693_MAX_EXPOSURE_VALUE 0xFFF1 59 #define OV5693_MAX_GAIN_VALUE 0xFF 63 * bits 31-16: numerator, bits 15-0: denominator 65 #define OV5693_FOCAL_LENGTH_DEFAULT 0x1B70064 69 * bits 31-16: numerator, bits 15-0: denominator 71 #define OV5693_F_NUMBER_DEFAULT 0x18000a [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_xgmac.h | 12 #define X2_BLOCK_ETH_MAC_CSR_OFFSET 0x3000 13 #define BLOCK_AXG_MAC_OFFSET 0x0800 14 #define BLOCK_AXG_STATS_OFFSET 0x0800 15 #define BLOCK_AXG_MAC_CSR_OFFSET 0x2000 16 #define BLOCK_PCS_OFFSET 0x3800 18 #define XGENET_CONFIG_REG_ADDR 0x20 19 #define XGENET_SRST_ADDR 0x00 20 #define XGENET_CLKEN_ADDR 0x08 22 #define CSR_CLK BIT(0) 29 #define CSR_RST BIT(0) [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_xgmac.h | 12 #define X2_BLOCK_ETH_MAC_CSR_OFFSET 0x3000 13 #define BLOCK_AXG_MAC_OFFSET 0x0800 14 #define BLOCK_AXG_STATS_OFFSET 0x0800 15 #define BLOCK_AXG_MAC_CSR_OFFSET 0x2000 16 #define BLOCK_PCS_OFFSET 0x3800 18 #define XGENET_CONFIG_REG_ADDR 0x20 19 #define XGENET_SRST_ADDR 0x00 20 #define XGENET_CLKEN_ADDR 0x08 22 #define CSR_CLK BIT(0) 29 #define CSR_RST BIT(0) [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_4_1_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff 28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0 29 #define MM_INDEX__MM_APER_MASK 0x80000000 30 #define MM_INDEX__MM_APER__SHIFT 0x1f 31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff 32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 33 #define MM_DATA__MM_DATA_MASK 0xffffffff 34 #define MM_DATA__MM_DATA__SHIFT 0x0 35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_4_1_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff 28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0 29 #define MM_INDEX__MM_APER_MASK 0x80000000 30 #define MM_INDEX__MM_APER__SHIFT 0x1f 31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff 32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 33 #define MM_DATA__MM_DATA_MASK 0xffffffff 34 #define MM_DATA__MM_DATA__SHIFT 0x0 35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
| D | gt215.c | 36 { 0x0001, "ILLEGAL_MTHD" }, 37 { 0x0002, "INVALID_ENUM" }, 38 { 0x0003, "INVALID_BITFIELD" }, 47 const u32 base = (subdev->index - NVKM_ENGINE_CE0) * 0x1000; in gt215_ce_intr() 48 u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff; in gt215_ce_intr() 49 u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16; in gt215_ce_intr() 50 u32 mthd = (addr & 0x07ff) << 2; in gt215_ce_intr() 51 u32 subc = (addr & 0x3800) >> 11; in gt215_ce_intr() 52 u32 data = nvkm_rd32(device, 0x104044 + base); in gt215_ce_intr() 59 chan ? chan->inst->addr : 0, in gt215_ce_intr() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
| D | gt215.c | 36 { 0x0001, "ILLEGAL_MTHD" }, 37 { 0x0002, "INVALID_ENUM" }, 38 { 0x0003, "INVALID_BITFIELD" }, 47 const u32 base = subdev->inst * 0x1000; in gt215_ce_intr() 48 u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff; in gt215_ce_intr() 49 u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16; in gt215_ce_intr() 50 u32 mthd = (addr & 0x07ff) << 2; in gt215_ce_intr() 51 u32 subc = (addr & 0x3800) >> 11; in gt215_ce_intr() 52 u32 data = nvkm_rd32(device, 0x104044 + base); in gt215_ce_intr() 59 chan ? chan->inst->addr : 0, in gt215_ce_intr() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/sec/ |
| D | g98.c | 35 { 0x0000, "ILLEGAL_MTHD" }, 36 { 0x0001, "INVALID_BITFIELD" }, 37 { 0x0002, "INVALID_ENUM" }, 38 { 0x0003, "QUERY" }, 47 u32 ssta = nvkm_rd32(device, 0x087040) & 0x0000ffff; in g98_sec_intr() 48 u32 addr = nvkm_rd32(device, 0x087040) >> 16; in g98_sec_intr() 49 u32 mthd = (addr & 0x07ff) << 2; in g98_sec_intr() 50 u32 subc = (addr & 0x3800) >> 11; in g98_sec_intr() 51 u32 data = nvkm_rd32(device, 0x087044); in g98_sec_intr() 58 chan ? chan->inst->addr : 0, in g98_sec_intr() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/sec/ |
| D | g98.c | 35 { 0x0000, "ILLEGAL_MTHD" }, 36 { 0x0001, "INVALID_BITFIELD" }, 37 { 0x0002, "INVALID_ENUM" }, 38 { 0x0003, "QUERY" }, 47 u32 ssta = nvkm_rd32(device, 0x087040) & 0x0000ffff; in g98_sec_intr() 48 u32 addr = nvkm_rd32(device, 0x087040) >> 16; in g98_sec_intr() 49 u32 mthd = (addr & 0x07ff) << 2; in g98_sec_intr() 50 u32 subc = (addr & 0x3800) >> 11; in g98_sec_intr() 51 u32 data = nvkm_rd32(device, 0x087044); in g98_sec_intr() 58 chan ? chan->inst->addr : 0, in g98_sec_intr() [all …]
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| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | ov5695.c | 30 #define CHIP_ID 0x005695 31 #define OV5695_REG_CHIP_ID 0x300a 33 #define OV5695_REG_CTRL_MODE 0x0100 34 #define OV5695_MODE_SW_STANDBY 0x0 35 #define OV5695_MODE_STREAMING BIT(0) 37 #define OV5695_REG_EXPOSURE 0x3500 40 #define OV5695_VTS_MAX 0x7fff 42 #define OV5695_REG_ANALOG_GAIN 0x3509 43 #define ANALOG_GAIN_MIN 0x10 44 #define ANALOG_GAIN_MAX 0xf8 [all …]
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| /kernel/linux/linux-6.6/drivers/media/i2c/ |
| D | ov5695.c | 30 #define CHIP_ID 0x005695 31 #define OV5695_REG_CHIP_ID 0x300a 33 #define OV5695_REG_CTRL_MODE 0x0100 34 #define OV5695_MODE_SW_STANDBY 0x0 35 #define OV5695_MODE_STREAMING BIT(0) 37 #define OV5695_REG_EXPOSURE 0x3500 40 #define OV5695_VTS_MAX 0x7fff 42 #define OV5695_REG_ANALOG_GAIN 0x3509 43 #define ANALOG_GAIN_MIN 0x10 44 #define ANALOG_GAIN_MAX 0xf8 [all …]
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| D | ov13b10.c | 19 #define OV13B10_REG_MODE_SELECT 0x0100 20 #define OV13B10_MODE_STANDBY 0x00 21 #define OV13B10_MODE_STREAMING 0x01 23 #define OV13B10_REG_SOFTWARE_RST 0x0103 24 #define OV13B10_SOFTWARE_RST 0x01 27 #define OV13B10_REG_CHIP_ID 0x300a 28 #define OV13B10_CHIP_ID 0x560d42 31 #define OV13B10_REG_VTS 0x380e 32 #define OV13B10_VTS_30FPS 0x0c7c 33 #define OV13B10_VTS_60FPS 0x063e [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | brcmu_d11.h | 20 /* bit 0~7 channel number 21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id 23 #define BRCMU_CHSPEC_CH_MASK 0x00ff 24 #define BRCMU_CHSPEC_CH_SHIFT 0 25 #define BRCMU_CHSPEC_CHL_MASK 0x000f 26 #define BRCMU_CHSPEC_CHL_SHIFT 0 27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0 36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300 38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */ 39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */ [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | brcmu_d11.h | 20 /* bit 0~7 channel number 21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id 23 #define BRCMU_CHSPEC_CH_MASK 0x00ff 24 #define BRCMU_CHSPEC_CH_SHIFT 0 25 #define BRCMU_CHSPEC_CHL_MASK 0x000f 26 #define BRCMU_CHSPEC_CHL_SHIFT 0 27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0 36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300 38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */ 39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */ [all …]
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