| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_scl_filters.c | 31 // <sharpness> = 0 37 0x1000, 0x0000, 38 0x0FF0, 0x0010, 39 0x0FB0, 0x0050, 40 0x0F34, 0x00CC, 41 0x0E68, 0x0198, 42 0x0D44, 0x02BC, 43 0x0BC4, 0x043C, 44 0x09FC, 0x0604, 45 0x0800, 0x0800 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_scl_filters.c | 31 // <sharpness> = 0 37 0x1000, 0x0000, 38 0x0FF0, 0x0010, 39 0x0FB0, 0x0050, 40 0x0F34, 0x00CC, 41 0x0E68, 0x0198, 42 0x0D44, 0x02BC, 43 0x0BC4, 0x043C, 44 0x09FC, 0x0604, 45 0x0800, 0x0800 [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zc1232-revA.dts | 29 memory@0 { 31 reg = <0x0 0x0 0x0 0x80000000>; 42 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 43 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 44 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 45 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 46 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 47 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 48 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 49 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
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| D | zynqmp-zc1751-xm015-dc1.dts | 34 memory@0 { 36 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 76 phy0: ethernet-phy@0 { 77 reg = <0>; 92 reg = <0x55>; 103 ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 104 ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 105 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 106 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 107 ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; [all …]
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| D | zynqmp-zc1751-xm017-dc3.dts | 34 memory@0 { 36 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 76 phy0: ethernet-phy@0 { /* VSC8211 */ 77 reg = <0>; 92 reg = <0x20>; 100 reg = <0x68>; 117 ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 118 ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; 119 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 120 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; [all …]
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| D | zynqmp-zcu104-revA.dts | 35 memory@0 { 37 reg = <0x0 0x0 0x0 0x80000000>; 54 reg = <0xc>; 55 ti,rx-internal-delay = <0x8>; 56 ti,tx-internal-delay = <0xa>; 57 ti,fifo-depth = <0x1>; 74 #size-cells = <0>; 75 reg = <0x74>; 76 i2c@0 { 78 #size-cells = <0>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zc1232-revA.dts | 30 memory@0 { 32 reg = <0x0 0x0 0x0 0x80000000>; 42 flash@0 { 46 reg = <0x0>; 56 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 57 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 58 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 59 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 60 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 61 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; [all …]
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| D | zynqmp-zc1751-xm017-dc3.dts | 37 memory@0 { 39 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 44 #clock-cells = <0>; 50 #clock-cells = <0>; 91 phy0: ethernet-phy@0 { /* VSC8211 */ 92 reg = <0>; 107 reg = <0x20>; 115 reg = <0x68>; 146 ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>; 147 ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; [all …]
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| D | zynqmp-sck-kv-g-revA.dtso | 25 si5332_0: si5332-0 { /* u17 */ 27 #clock-cells = <0>; 33 #clock-cells = <0>; 39 #clock-cells = <0>; 45 #clock-cells = <0>; 51 #clock-cells = <0>; 57 #clock-cells = <0>; 64 #size-cells = <0>; 66 pinctrl-0 = <&pinctrl_i2c1_default>; 71 /* u14 - 0x40 - ina260 */ [all …]
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| D | zynqmp-zc1751-xm015-dc1.dts | 39 memory@0 { 41 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 46 #clock-cells = <0>; 52 #clock-cells = <0>; 58 #clock-cells = <0>; 100 pinctrl-0 = <&pinctrl_gem3_default>; 101 phy0: ethernet-phy@0 { 102 reg = <0>; 109 pinctrl-0 = <&pinctrl_gpio_default>; 120 pinctrl-0 = <&pinctrl_i2c1_default>; [all …]
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| D | zynqmp-zcu104-revC.dts | 41 memory@0 { 43 reg = <0x0 0x0 0x0 0x80000000>; 48 io-channels = <&u183 0>, <&u183 1>, <&u183 2>, <&u183 3>; 53 #clock-cells = <0>; 59 #clock-cells = <0>; 65 #clock-cells = <0>; 73 pinctrl-0 = <&pinctrl_can1_default>; 117 pinctrl-0 = <&pinctrl_gem3_default>; 120 #size-cells = <0>; 124 reg = <0xc>; [all …]
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| D | zynqmp-zcu104-revA.dts | 41 memory@0 { 43 reg = <0x0 0x0 0x0 0x80000000>; 48 #clock-cells = <0>; 54 #clock-cells = <0>; 60 #clock-cells = <0>; 68 pinctrl-0 = <&pinctrl_can1_default>; 112 pinctrl-0 = <&pinctrl_gem3_default>; 115 #size-cells = <0>; 119 reg = <0xc>; 120 ti,rx-internal-delay = <0x8>; [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vce/ |
| D | vce_2_0_sh_mask.h | 27 #define VCE_STATUS__JOB_BUSY_MASK 0x1 28 #define VCE_STATUS__JOB_BUSY__SHIFT 0x0 29 #define VCE_STATUS__VCPU_REPORT_MASK 0xfe 30 #define VCE_STATUS__VCPU_REPORT__SHIFT 0x1 31 #define VCE_STATUS__UENC_BUSY_MASK 0x100 32 #define VCE_STATUS__UENC_BUSY__SHIFT 0x8 33 #define VCE_VCPU_CNTL__CLK_EN_MASK 0x1 34 #define VCE_VCPU_CNTL__CLK_EN__SHIFT 0x0 35 #define VCE_VCPU_CNTL__RBBM_SOFT_RESET_MASK 0x40000 36 #define VCE_VCPU_CNTL__RBBM_SOFT_RESET__SHIFT 0x12 [all …]
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| D | vce_3_0_sh_mask.h | 27 #define VCE_STATUS__JOB_BUSY_MASK 0x1 28 #define VCE_STATUS__JOB_BUSY__SHIFT 0x0 29 #define VCE_STATUS__VCPU_REPORT_MASK 0xfe 30 #define VCE_STATUS__VCPU_REPORT__SHIFT 0x1 31 #define VCE_STATUS__UENC_BUSY_MASK 0x100 32 #define VCE_STATUS__UENC_BUSY__SHIFT 0x8 33 #define VCE_STATUS__VCE_CONFIGURATION_MASK 0xc00000 34 #define VCE_STATUS__VCE_CONFIGURATION__SHIFT 0x16 35 #define VCE_STATUS__VCE_INSTANCE_ID_MASK 0x3000000 36 #define VCE_STATUS__VCE_INSTANCE_ID__SHIFT 0x18 [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vce/ |
| D | vce_2_0_sh_mask.h | 27 #define VCE_STATUS__JOB_BUSY_MASK 0x1 28 #define VCE_STATUS__JOB_BUSY__SHIFT 0x0 29 #define VCE_STATUS__VCPU_REPORT_MASK 0xfe 30 #define VCE_STATUS__VCPU_REPORT__SHIFT 0x1 31 #define VCE_STATUS__UENC_BUSY_MASK 0x100 32 #define VCE_STATUS__UENC_BUSY__SHIFT 0x8 33 #define VCE_VCPU_CNTL__CLK_EN_MASK 0x1 34 #define VCE_VCPU_CNTL__CLK_EN__SHIFT 0x0 35 #define VCE_VCPU_CNTL__RBBM_SOFT_RESET_MASK 0x40000 36 #define VCE_VCPU_CNTL__RBBM_SOFT_RESET__SHIFT 0x12 [all …]
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| D | vce_3_0_sh_mask.h | 27 #define VCE_STATUS__JOB_BUSY_MASK 0x1 28 #define VCE_STATUS__JOB_BUSY__SHIFT 0x0 29 #define VCE_STATUS__VCPU_REPORT_MASK 0xfe 30 #define VCE_STATUS__VCPU_REPORT__SHIFT 0x1 31 #define VCE_STATUS__UENC_BUSY_MASK 0x100 32 #define VCE_STATUS__UENC_BUSY__SHIFT 0x8 33 #define VCE_STATUS__VCE_CONFIGURATION_MASK 0xc00000 34 #define VCE_STATUS__VCE_CONFIGURATION__SHIFT 0x16 35 #define VCE_STATUS__VCE_INSTANCE_ID_MASK 0x3000000 36 #define VCE_STATUS__VCE_INSTANCE_ID__SHIFT 0x18 [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | soc.h | 9 #define SI_ENUM_BASE_DEFAULT 0x18000000 12 #define SICF_BIST_EN 0x8000 13 #define SICF_PME_EN 0x4000 14 #define SICF_CORE_BITS 0x3ffc 15 #define SICF_FGC 0x0002 16 #define SICF_CLOCK_EN 0x0001 19 #define SISF_BIST_DONE 0x8000 20 #define SISF_BIST_ERROR 0x4000 21 #define SISF_GATED_CLK 0x2000 22 #define SISF_DMA64 0x1000 [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | soc.h | 9 #define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ 12 #define SICF_BIST_EN 0x8000 13 #define SICF_PME_EN 0x4000 14 #define SICF_CORE_BITS 0x3ffc 15 #define SICF_FGC 0x0002 16 #define SICF_CLOCK_EN 0x0001 19 #define SISF_BIST_DONE 0x8000 20 #define SISF_BIST_ERROR 0x4000 21 #define SISF_GATED_CLK 0x2000 22 #define SISF_DMA64 0x1000 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwinfo/ |
| D | loongson,ls2k-chipid.yaml | 36 reg = <0x1fe00000 0x3ffc>;
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| /kernel/linux/linux-6.6/arch/arm/mach-omap1/ |
| D | serial.h | 28 #define OMAP_UART_INFO_OFS 0x3ffc 31 #define OMAP7XX_PORT_SHIFT 0
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| /kernel/linux/linux-5.10/arch/arm/mach-omap1/include/mach/ |
| D | serial.h | 28 #define OMAP_UART_INFO_OFS 0x3ffc 31 #define OMAP7XX_PORT_SHIFT 0
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/asic_reg/ |
| D | dcore0_tpc0_eml_stm_regs.h | 23 #define mmDCORE0_TPC0_EML_STM_STMDMASTARTR 0x3C04 25 #define mmDCORE0_TPC0_EML_STM_STMDMASTOPR 0x3C08 27 #define mmDCORE0_TPC0_EML_STM_STMDMASTATR 0x3C0C 29 #define mmDCORE0_TPC0_EML_STM_STMDMACTLR 0x3C10 31 #define mmDCORE0_TPC0_EML_STM_STMDMAIDR 0x3CFC 33 #define mmDCORE0_TPC0_EML_STM_STMHEER 0x3D00 35 #define mmDCORE0_TPC0_EML_STM_STMHETER 0x3D20 37 #define mmDCORE0_TPC0_EML_STM_STMHEBSR 0x3D60 39 #define mmDCORE0_TPC0_EML_STM_STMHEMCR 0x3D64 41 #define mmDCORE0_TPC0_EML_STM_STMHEEXTMUXR 0x3D68 [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/ |
| D | spu_restore_crt0.S | 19 .space SIZEOF_SPU_SPILL_REGS, 0x0 28 il $0, 0 30 stqd $0, 0($SP) 40 brsl $0, main 52 .balignl 16, 0x40200000 54 lqd $16, 0($3) 58 andi $5, $4, 0x7F 64 lqa $0, regs_spill + 0 87 * following the 'stop 0x3ffc' have been modified at run 97 stop 0 [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/cell/spufs/ |
| D | spu_restore_crt0.S | 19 .space SIZEOF_SPU_SPILL_REGS, 0x0 28 il $0, 0 30 stqd $0, 0($SP) 40 brsl $0, main 52 .balignl 16, 0x40200000 54 lqd $16, 0($3) 58 andi $5, $4, 0x7F 64 lqa $0, regs_spill + 0 87 * following the 'stop 0x3ffc' have been modified at run 97 stop 0 [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/ezchip/ |
| D | nps_enet.h | 10 #define NPS_ENET_NAPI_POLL_WEIGHT 0x2 11 #define NPS_ENET_MAX_FRAME_LENGTH 0x3FFF 12 #define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR 0x7 13 #define NPS_ENET_GE_MAC_CFG_0_RX_IFG 0x5 14 #define NPS_ENET_GE_MAC_CFG_0_TX_IFG 0xC 15 #define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN 0x7 16 #define NPS_ENET_GE_MAC_CFG_2_STAT_EN 0x3 17 #define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH 0x14 18 #define NPS_ENET_GE_MAC_CFG_3_MAX_LEN 0x3FFC 20 #define NPS_ENET_DISABLE 0 [all …]
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