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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dti,am62-usb.yaml59 "^usb@[0-9a-f]+$":
85 reg = <0x00 0x0f910000 0x00 0x800>;
88 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
95 reg = <0x00 0x31100000 0x00 0x50000>;
96 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
97 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
/kernel/linux/linux-6.6/arch/parisc/include/uapi/asm/
Dsocket.h9 #define SOL_SOCKET 0xffff
11 #define SO_DEBUG 0x0001
12 #define SO_REUSEADDR 0x0004
13 #define SO_KEEPALIVE 0x0008
14 #define SO_DONTROUTE 0x0010
15 #define SO_BROADCAST 0x0020
16 #define SO_LINGER 0x0080
17 #define SO_OOBINLINE 0x0100
18 #define SO_REUSEPORT 0x0200
19 #define SO_SNDBUF 0x1001
[all …]
/kernel/linux/linux-5.10/arch/parisc/include/uapi/asm/
Dsocket.h9 #define SOL_SOCKET 0xffff
11 #define SO_DEBUG 0x0001
12 #define SO_REUSEADDR 0x0004
13 #define SO_KEEPALIVE 0x0008
14 #define SO_DONTROUTE 0x0010
15 #define SO_BROADCAST 0x0020
16 #define SO_LINGER 0x0080
17 #define SO_OOBINLINE 0x0100
18 #define SO_REUSEPORT 0x0200
19 #define SO_SNDBUF 0x1001
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dadau17x1.h71 #define ADAU17X1_CLOCK_CONTROL 0x4000
72 #define ADAU17X1_PLL_CONTROL 0x4002
73 #define ADAU17X1_REC_POWER_MGMT 0x4009
74 #define ADAU17X1_MICBIAS 0x4010
75 #define ADAU17X1_SERIAL_PORT0 0x4015
76 #define ADAU17X1_SERIAL_PORT1 0x4016
77 #define ADAU17X1_CONVERTER0 0x4017
78 #define ADAU17X1_CONVERTER1 0x4018
79 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
80 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
[all …]
Dcx2072x.h19 #define CX2072X_REG_MAX 0x8a3c
21 #define CX2072X_VENDOR_ID 0x0200
22 #define CX2072X_REVISION_ID 0x0208
23 #define CX2072X_CURRENT_BCLK_FREQUENCY 0x00dc
24 #define CX2072X_AFG_POWER_STATE 0x0414
25 #define CX2072X_UM_RESPONSE 0x0420
26 #define CX2072X_GPIO_DATA 0x0454
27 #define CX2072X_GPIO_ENABLE 0x0458
28 #define CX2072X_GPIO_DIRECTION 0x045c
29 #define CX2072X_GPIO_WAKE 0x0460
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dadau17x1.h72 #define ADAU17X1_CLOCK_CONTROL 0x4000
73 #define ADAU17X1_PLL_CONTROL 0x4002
74 #define ADAU17X1_REC_POWER_MGMT 0x4009
75 #define ADAU17X1_MICBIAS 0x4010
76 #define ADAU17X1_SERIAL_PORT0 0x4015
77 #define ADAU17X1_SERIAL_PORT1 0x4016
78 #define ADAU17X1_CONVERTER0 0x4017
79 #define ADAU17X1_CONVERTER1 0x4018
80 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
81 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
[all …]
Dcx2072x.h19 #define CX2072X_REG_MAX 0x8a3c
21 #define CX2072X_VENDOR_ID 0x0200
22 #define CX2072X_REVISION_ID 0x0208
23 #define CX2072X_CURRENT_BCLK_FREQUENCY 0x00dc
24 #define CX2072X_AFG_POWER_STATE 0x0414
25 #define CX2072X_UM_RESPONSE 0x0420
26 #define CX2072X_GPIO_DATA 0x0454
27 #define CX2072X_GPIO_ENABLE 0x0458
28 #define CX2072X_GPIO_DIRECTION 0x045c
29 #define CX2072X_GPIO_WAKE 0x0460
[all …]
/kernel/linux/linux-6.6/drivers/ntb/hw/intel/
Dntb_hw_gen3.h50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
/kernel/linux/linux-5.10/drivers/ntb/hw/intel/
Dntb_hw_gen3.h50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
/kernel/linux/linux-6.6/include/linux/perf/
Darm_pmuv3.h15 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
16 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
17 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
18 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
19 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
20 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
21 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
22 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
23 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
24 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
[all …]
/kernel/linux/linux-5.10/drivers/scsi/
Dhptiop.h30 #define IOPMU_QUEUE_EMPTY 0xffffffff
31 #define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000
32 #define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000
33 #define IOPMU_QUEUE_REQUEST_SIZE_BIT 0x40000000
34 #define IOPMU_QUEUE_REQUEST_RESULT_BIT 0x40000000
40 #define IOPMU_OUTBOUND_INT_PCI 0x10
46 #define IOPMU_INBOUND_INT_POSTQUEUE 0x10
63 __le32 reserved[0x20400 / 4];
72 __le32 reserved0[(0x4000 - 0) / 4];
75 __le32 reserved1[(0x4018 - 0x4008) / 4];
[all …]
Dvmw_pvscsi.h35 #define PCI_DEVICE_ID_VMWARE_PVSCSI 0x07C0
41 BTSTAT_SUCCESS = 0x00, /* CCB complete normally with no errors */
42 BTSTAT_LINKED_COMMAND_COMPLETED = 0x0a,
43 BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b,
44 BTSTAT_DATA_UNDERRUN = 0x0c,
45 BTSTAT_SELTIMEO = 0x11, /* SCSI selection timeout */
46 BTSTAT_DATARUN = 0x12, /* data overrun/underrun */
47 BTSTAT_BUSFREE = 0x13, /* unexpected bus free */
48 BTSTAT_INVPHASE = 0x14, /* invalid bus phase or sequence
50 BTSTAT_LUNMISMATCH = 0x17, /* linked CCB has different LUN from
[all …]
/kernel/linux/linux-6.6/drivers/scsi/
Dhptiop.h30 #define IOPMU_QUEUE_EMPTY 0xffffffff
31 #define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000
32 #define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000
33 #define IOPMU_QUEUE_REQUEST_SIZE_BIT 0x40000000
34 #define IOPMU_QUEUE_REQUEST_RESULT_BIT 0x40000000
40 #define IOPMU_OUTBOUND_INT_PCI 0x10
46 #define IOPMU_INBOUND_INT_POSTQUEUE 0x10
63 __le32 reserved[0x20400 / 4];
72 __le32 reserved0[(0x4000 - 0) / 4];
75 __le32 reserved1[(0x4018 - 0x4008) / 4];
[all …]
Dvmw_pvscsi.h33 #define PCI_DEVICE_ID_VMWARE_PVSCSI 0x07C0
39 BTSTAT_SUCCESS = 0x00, /* CCB complete normally with no errors */
40 BTSTAT_LINKED_COMMAND_COMPLETED = 0x0a,
41 BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b,
42 BTSTAT_DATA_UNDERRUN = 0x0c,
43 BTSTAT_SELTIMEO = 0x11, /* SCSI selection timeout */
44 BTSTAT_DATARUN = 0x12, /* data overrun/underrun */
45 BTSTAT_BUSFREE = 0x13, /* unexpected bus free */
46 BTSTAT_INVPHASE = 0x14, /* invalid bus phase or sequence
48 BTSTAT_LUNMISMATCH = 0x17, /* linked CCB has different LUN from
[all …]
/kernel/linux/linux-6.6/drivers/net/fddi/skfp/h/
Dsmt_p.h19 #define SMT_P0012 0x0012
21 #define SMT_P0015 0x0015
22 #define SMT_P0016 0x0016
23 #define SMT_P0017 0x0017
24 #define SMT_P0018 0x0018
25 #define SMT_P0019 0x0019
27 #define SMT_P001A 0x001a
28 #define SMT_P001B 0x001b
29 #define SMT_P001C 0x001c
30 #define SMT_P001D 0x001d
[all …]
/kernel/linux/linux-5.10/drivers/net/fddi/skfp/h/
Dsmt_p.h19 #define SMT_P0012 0x0012
21 #define SMT_P0015 0x0015
22 #define SMT_P0016 0x0016
23 #define SMT_P0017 0x0017
24 #define SMT_P0018 0x0018
25 #define SMT_P0019 0x0019
27 #define SMT_P001A 0x001a
28 #define SMT_P001B 0x001b
29 #define SMT_P001C 0x001c
30 #define SMT_P001D 0x001d
[all …]
/kernel/linux/linux-6.6/include/video/
Dpermedia2.h17 #define PM2_REGS_SIZE 0x10000
19 #define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
25 #define PM2R_RESET_STATUS 0x0000
26 #define PM2R_IN_FIFO_SPACE 0x0018
27 #define PM2R_OUT_FIFO_WORDS 0x0020
28 #define PM2R_APERTURE_ONE 0x0050
29 #define PM2R_APERTURE_TWO 0x0058
30 #define PM2R_FIFO_DISCON 0x0068
31 #define PM2R_CHIP_CONFIG 0x0070
33 #define PM2R_REBOOT 0x1000
[all …]
/kernel/linux/linux-5.10/include/video/
Dpermedia2.h17 #define PM2_REGS_SIZE 0x10000
19 #define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
25 #define PM2R_RESET_STATUS 0x0000
26 #define PM2R_IN_FIFO_SPACE 0x0018
27 #define PM2R_OUT_FIFO_WORDS 0x0020
28 #define PM2R_APERTURE_ONE 0x0050
29 #define PM2R_APERTURE_TWO 0x0058
30 #define PM2R_FIFO_DISCON 0x0068
31 #define PM2R_CHIP_CONFIG 0x0070
33 #define PM2R_REBOOT 0x1000
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
Dr520.c41 for (i = 0; i < rdev->usec_timeout; i++) { in r520_mc_wait_for_idle()
45 return 0; in r520_mc_wait_for_idle()
58 * DST_PIPE_CONFIG 0x170C in r520_gpu_init()
59 * GB_TILE_CONFIG 0x4018 in r520_gpu_init()
60 * GB_FIFO_SIZE 0x4024 in r520_gpu_init()
61 * GB_PIPE_SELECT 0x402C in r520_gpu_init()
62 * GB_PIPE_SELECT2 0x4124 in r520_gpu_init()
63 * Z_PIPE_SHIFT 0 in r520_gpu_init()
64 * Z_PIPE_MASK 0x000000003 in r520_gpu_init()
65 * GB_FIFO_SIZE2 0x4128 in r520_gpu_init()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dr520.c41 for (i = 0; i < rdev->usec_timeout; i++) { in r520_mc_wait_for_idle()
45 return 0; in r520_mc_wait_for_idle()
58 * DST_PIPE_CONFIG 0x170C in r520_gpu_init()
59 * GB_TILE_CONFIG 0x4018 in r520_gpu_init()
60 * GB_FIFO_SIZE 0x4024 in r520_gpu_init()
61 * GB_PIPE_SELECT 0x402C in r520_gpu_init()
62 * GB_PIPE_SELECT2 0x4124 in r520_gpu_init()
63 * Z_PIPE_SHIFT 0 in r520_gpu_init()
64 * Z_PIPE_MASK 0x000000003 in r520_gpu_init()
65 * GB_FIFO_SIZE2 0x4128 in r520_gpu_init()
[all …]
/kernel/linux/linux-5.10/arch/c6x/platforms/
Dcache.c16 #define IMCR_CCFG 0x0000
17 #define IMCR_L1PCFG 0x0020
18 #define IMCR_L1PCC 0x0024
19 #define IMCR_L1DCFG 0x0040
20 #define IMCR_L1DCC 0x0044
21 #define IMCR_L2ALLOC0 0x2000
22 #define IMCR_L2ALLOC1 0x2004
23 #define IMCR_L2ALLOC2 0x2008
24 #define IMCR_L2ALLOC3 0x200c
25 #define IMCR_L2WBAR 0x4000
[all …]
/kernel/linux/linux-6.6/Documentation/scsi/
Dhptiop.rst16 0x11C5C Link Interface IRQ Set
17 0x11C60 Link Interface IRQ Clear
23 0x10 Inbound Message Register 0
24 0x14 Inbound Message Register 1
25 0x18 Outbound Message Register 0
26 0x1C Outbound Message Register 1
27 0x20 Inbound Doorbell Register
28 0x24 Inbound Interrupt Status Register
29 0x28 Inbound Interrupt Mask Register
30 0x30 Outbound Interrupt Status Register
[all …]
/kernel/linux/linux-5.10/Documentation/scsi/
Dhptiop.rst16 0x11C5C Link Interface IRQ Set
17 0x11C60 Link Interface IRQ Clear
23 0x10 Inbound Message Register 0
24 0x14 Inbound Message Register 1
25 0x18 Outbound Message Register 0
26 0x1C Outbound Message Register 1
27 0x20 Inbound Doorbell Register
28 0x24 Inbound Interrupt Status Register
29 0x28 Inbound Interrupt Mask Register
30 0x30 Outbound Interrupt Status Register
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
Dcore.h25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/wm831x/
Dcore.h25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]

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