Searched +full:0 +full:x4048 (Results 1 – 25 of 60) sorted by relevance
123
| /kernel/linux/linux-6.6/drivers/media/rc/keymaps/ |
| D | rc-ct-90405.c | 5 * Copyright (C) 2021 Alexander Voronov <avv.0@ya.ru>
12 { 0x4014, KEY_SWITCHVIDEOMODE },
13 { 0x4012, KEY_POWER },
14 { 0x4044, KEY_TV },
15 { 0x40be43, KEY_3D_MODE },
16 { 0x400c, KEY_SUBTITLE },
17 { 0x4001, KEY_NUMERIC_1 },
18 { 0x4002, KEY_NUMERIC_2 },
19 { 0x4003, KEY_NUMERIC_3 },
20 { 0x4004, KEY_NUMERIC_4 },
[all …]
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| /kernel/linux/linux-6.6/drivers/input/touchscreen/ |
| D | goodix.h | 13 #define GOODIX_REG_MISCTL_DSP_CTL 0x4010
14 #define GOODIX_REG_MISCTL_SRAM_BANK 0x4048
15 #define GOODIX_REG_MISCTL_MEM_CD_EN 0x4049
16 #define GOODIX_REG_MISCTL_CACHE_EN 0x404B
17 #define GOODIX_REG_MISCTL_TMR0_EN 0x40B0
18 #define GOODIX_REG_MISCTL_SWRST 0x4180
19 #define GOODIX_REG_MISCTL_CPU_SWRST_PULSE 0x4184
20 #define GOODIX_REG_MISCTL_BOOTCTL 0x4190
21 #define GOODIX_REG_MISCTL_BOOT_OPT 0x4218
22 #define GOODIX_REG_MISCTL_BOOT_CTL 0x5094
[all …]
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| /kernel/linux/linux-6.6/arch/parisc/include/uapi/asm/ |
| D | socket.h | 9 #define SOL_SOCKET 0xffff
11 #define SO_DEBUG 0x0001
12 #define SO_REUSEADDR 0x0004
13 #define SO_KEEPALIVE 0x0008
14 #define SO_DONTROUTE 0x0010
15 #define SO_BROADCAST 0x0020
16 #define SO_LINGER 0x0080
17 #define SO_OOBINLINE 0x0100
18 #define SO_REUSEPORT 0x0200
19 #define SO_SNDBUF 0x1001
[all …]
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| /kernel/linux/linux-6.6/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
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| /kernel/linux/linux-5.10/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/apple/ |
| D | apple,pmgr.yaml | 20 pattern: "^power-management@[0-9a-f]+$"
42 "power-controller@[0-9a-f]+$":
64 reg = <0x2 0x3b700000 0x0 0x14000>;
68 reg = <0x1c0 8>;
69 #power-domain-cells = <0>;
70 #reset-cells = <0>;
77 reg = <0x220 8>;
78 #power-domain-cells = <0>;
79 #reset-cells = <0>;
86 reg = <0x270 8>;
[all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/wm831x/ |
| D | pmu.h | 14 * R16387 (0x4003) - Power State
16 #define WM831X_CHIP_ON 0x8000 /* CHIP_ON */
17 #define WM831X_CHIP_ON_MASK 0x8000 /* CHIP_ON */
20 #define WM831X_CHIP_SLP 0x4000 /* CHIP_SLP */
21 #define WM831X_CHIP_SLP_MASK 0x4000 /* CHIP_SLP */
24 #define WM831X_REF_LP 0x1000 /* REF_LP */
25 #define WM831X_REF_LP_MASK 0x1000 /* REF_LP */
28 #define WM831X_PWRSTATE_DLY_MASK 0x0C00 /* PWRSTATE_DLY - [11:10] */
31 #define WM831X_SWRST_DLY 0x0200 /* SWRST_DLY */
32 #define WM831X_SWRST_DLY_MASK 0x0200 /* SWRST_DLY */
[all …]
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| D | core.h | 25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/wm831x/ |
| D | pmu.h | 14 * R16387 (0x4003) - Power State
16 #define WM831X_CHIP_ON 0x8000 /* CHIP_ON */
17 #define WM831X_CHIP_ON_MASK 0x8000 /* CHIP_ON */
20 #define WM831X_CHIP_SLP 0x4000 /* CHIP_SLP */
21 #define WM831X_CHIP_SLP_MASK 0x4000 /* CHIP_SLP */
24 #define WM831X_REF_LP 0x1000 /* REF_LP */
25 #define WM831X_REF_LP_MASK 0x1000 /* REF_LP */
28 #define WM831X_PWRSTATE_DLY_MASK 0x0C00 /* PWRSTATE_DLY - [11:10] */
31 #define WM831X_SWRST_DLY 0x0200 /* SWRST_DLY */
32 #define WM831X_SWRST_DLY_MASK 0x0200 /* SWRST_DLY */
[all …]
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| D | core.h | 25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
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| /kernel/linux/linux-6.6/drivers/media/i2c/ |
| D | ov8856.c | 26 #define OV8856_REG_CHIP_ID 0x300a
27 #define OV8856_CHIP_ID 0x00885a
29 #define OV8856_REG_MODE_SELECT 0x0100
30 #define OV8856_MODE_STANDBY 0x00
31 #define OV8856_MODE_STREAMING 0x01
34 #define OV8856_2A_MODULE 0x01
35 #define OV8856_1B_MODULE 0x02
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
40 #define OV8856_MODULE_REVISION 0x700f
41 #define OV8856_OTP_MODE_CTRL 0x3d84
[all …]
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| D | ov5670.c | 22 #define OV5670_REG_CHIP_ID 0x300a
23 #define OV5670_CHIP_ID 0x005670
25 #define OV5670_REG_MODE_SELECT 0x0100
26 #define OV5670_MODE_STANDBY 0x00
27 #define OV5670_MODE_STREAMING 0x01
29 #define OV5670_REG_SOFTWARE_RST 0x0103
30 #define OV5670_SOFTWARE_RST 0x01
32 #define OV5670_MIPI_SC_CTRL0_REG 0x3018
39 #define OV5670_REG_VTS 0x380e
40 #define OV5670_VTS_30FPS 0x0808 /* default for 30 fps */
[all …]
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| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | ov5670.c | 12 #define OV5670_REG_CHIP_ID 0x300a
13 #define OV5670_CHIP_ID 0x005670
15 #define OV5670_REG_MODE_SELECT 0x0100
16 #define OV5670_MODE_STANDBY 0x00
17 #define OV5670_MODE_STREAMING 0x01
19 #define OV5670_REG_SOFTWARE_RST 0x0103
20 #define OV5670_SOFTWARE_RST 0x01
23 #define OV5670_REG_VTS 0x380e
24 #define OV5670_VTS_30FPS 0x0808 /* default for 30 fps */
25 #define OV5670_VTS_MAX 0xffff
[all …]
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| D | ov8856.c | 28 #define OV8856_REG_CHIP_ID 0x300a
29 #define OV8856_CHIP_ID 0x00885a
31 #define OV8856_REG_MODE_SELECT 0x0100
32 #define OV8856_MODE_STANDBY 0x00
33 #define OV8856_MODE_STREAMING 0x01
36 #define OV8856_2A_MODULE 0x01
37 #define OV8856_1B_MODULE 0x02
39 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
42 #define OV8856_MODULE_REVISION 0x700f
43 #define OV8856_OTP_MODE_CTRL 0x3d84
[all …]
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| /kernel/linux/linux-5.10/arch/c6x/platforms/ |
| D | cache.c | 16 #define IMCR_CCFG 0x0000
17 #define IMCR_L1PCFG 0x0020
18 #define IMCR_L1PCC 0x0024
19 #define IMCR_L1DCFG 0x0040
20 #define IMCR_L1DCC 0x0044
21 #define IMCR_L2ALLOC0 0x2000
22 #define IMCR_L2ALLOC1 0x2004
23 #define IMCR_L2ALLOC2 0x2008
24 #define IMCR_L2ALLOC3 0x200c
25 #define IMCR_L2WBAR 0x4000
[all …]
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| /kernel/linux/linux-6.6/include/linux/soc/samsung/ |
| D | exynos-regs-pmu.h | 17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
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| /kernel/linux/linux-5.10/include/linux/soc/samsung/ |
| D | exynos-regs-pmu.h | 17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
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| /kernel/linux/linux-6.6/drivers/edac/ |
| D | ie31200_edac.c | 19 * 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller
20 * 0c08: Xeon E3-1200 v3 Processor DRAM Controller
60 #define PCI_DEVICE_ID_INTEL_IE31200_HB_1 0x0108
61 #define PCI_DEVICE_ID_INTEL_IE31200_HB_2 0x010c
62 #define PCI_DEVICE_ID_INTEL_IE31200_HB_3 0x0150
63 #define PCI_DEVICE_ID_INTEL_IE31200_HB_4 0x0158
64 #define PCI_DEVICE_ID_INTEL_IE31200_HB_5 0x015c
65 #define PCI_DEVICE_ID_INTEL_IE31200_HB_6 0x0c04
66 #define PCI_DEVICE_ID_INTEL_IE31200_HB_7 0x0c08
67 #define PCI_DEVICE_ID_INTEL_IE31200_HB_8 0x190F
[all …]
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| /kernel/linux/linux-5.10/drivers/edac/ |
| D | ie31200_edac.c | 19 * 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller
20 * 0c08: Xeon E3-1200 v3 Processor DRAM Controller
56 #define PCI_DEVICE_ID_INTEL_IE31200_HB_1 0x0108
57 #define PCI_DEVICE_ID_INTEL_IE31200_HB_2 0x010c
58 #define PCI_DEVICE_ID_INTEL_IE31200_HB_3 0x0150
59 #define PCI_DEVICE_ID_INTEL_IE31200_HB_4 0x0158
60 #define PCI_DEVICE_ID_INTEL_IE31200_HB_5 0x015c
61 #define PCI_DEVICE_ID_INTEL_IE31200_HB_6 0x0c04
62 #define PCI_DEVICE_ID_INTEL_IE31200_HB_7 0x0c08
63 #define PCI_DEVICE_ID_INTEL_IE31200_HB_8 0x1918
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | spu.h | 23 #define MFC_PUT_CMD 0x20
24 #define MFC_PUTS_CMD 0x28
25 #define MFC_PUTR_CMD 0x30
26 #define MFC_PUTF_CMD 0x22
27 #define MFC_PUTB_CMD 0x21
28 #define MFC_PUTFS_CMD 0x2A
29 #define MFC_PUTBS_CMD 0x29
30 #define MFC_PUTRF_CMD 0x32
31 #define MFC_PUTRB_CMD 0x31
32 #define MFC_PUTL_CMD 0x24
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | spu.h | 23 #define MFC_PUT_CMD 0x20
24 #define MFC_PUTS_CMD 0x28
25 #define MFC_PUTR_CMD 0x30
26 #define MFC_PUTF_CMD 0x22
27 #define MFC_PUTB_CMD 0x21
28 #define MFC_PUTFS_CMD 0x2A
29 #define MFC_PUTBS_CMD 0x29
30 #define MFC_PUTRF_CMD 0x32
31 #define MFC_PUTRB_CMD 0x31
32 #define MFC_PUTL_CMD 0x24
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/ |
| D | reg.h | 22 #define AR_CR 0x0008
23 #define AR_CR_RXE (AR_SREV_9300_20_OR_LATER(ah) ? 0x0000000c : 0x00000004)
24 #define AR_CR_RXD 0x00000020
25 #define AR_CR_SWI 0x00000040
27 #define AR_RXDP 0x000C
29 #define AR_CFG 0x0014
30 #define AR_CFG_SWTD 0x00000001
31 #define AR_CFG_SWTB 0x00000002
32 #define AR_CFG_SWRD 0x00000004
33 #define AR_CFG_SWRB 0x00000008
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/ |
| D | reg.h | 22 #define AR_CR 0x0008
23 #define AR_CR_RXE(_ah) (AR_SREV_9300_20_OR_LATER(_ah) ? 0x0000000c : 0x00000004)
24 #define AR_CR_RXD 0x00000020
25 #define AR_CR_SWI 0x00000040
27 #define AR_RXDP 0x000C
29 #define AR_CFG 0x0014
30 #define AR_CFG_SWTD 0x00000001
31 #define AR_CFG_SWTB 0x00000002
32 #define AR_CFG_SWRD 0x00000004
33 #define AR_CFG_SWRB 0x00000008
[all …]
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | gxt4500.c | 19 #define PCI_DEVICE_ID_IBM_GXT4500P 0x21c
20 #define PCI_DEVICE_ID_IBM_GXT6500P 0x21b
21 #define PCI_DEVICE_ID_IBM_GXT4000P 0x16e
22 #define PCI_DEVICE_ID_IBM_GXT6000P 0x170
27 #define CFG_ENDIAN0 0x40
30 #define STATUS 0x1000
31 #define CTRL_REG0 0x1004
32 #define CR0_HALT_DMA 0x4
33 #define CR0_RASTER_RESET 0x8
34 #define CR0_GEOM_RESET 0x10
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | gxt4500.c | 18 #define PCI_DEVICE_ID_IBM_GXT4500P 0x21c
19 #define PCI_DEVICE_ID_IBM_GXT6500P 0x21b
20 #define PCI_DEVICE_ID_IBM_GXT4000P 0x16e
21 #define PCI_DEVICE_ID_IBM_GXT6000P 0x170
26 #define CFG_ENDIAN0 0x40
29 #define STATUS 0x1000
30 #define CTRL_REG0 0x1004
31 #define CR0_HALT_DMA 0x4
32 #define CR0_RASTER_RESET 0x8
33 #define CR0_GEOM_RESET 0x10
[all …]
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