Searched +full:0 +full:x4080 (Results 1 – 25 of 122) sorted by relevance
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | mtk_common.h | 15 #define MT8183_SW_RSTN 0x0
16 #define MT8183_SW_RSTN_BIT BIT(0)
17 #define MT8183_SCP_TO_HOST 0x1C
18 #define MT8183_SCP_IPC_INT_BIT BIT(0)
20 #define MT8183_HOST_TO_SCP 0x28
21 #define MT8183_HOST_IPC_INT_BIT BIT(0)
22 #define MT8183_WDT_CFG 0x84
23 #define MT8183_SCP_CLK_SW_SEL 0x4000
24 #define MT8183_SCP_CLK_DIV_SEL 0x4024
25 #define MT8183_SCP_SRAM_PDN 0x402C
[all …]
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| /kernel/linux/linux-6.6/drivers/remoteproc/ |
| D | mtk_common.h | 15 #define MT8183_SW_RSTN 0x0
16 #define MT8183_SW_RSTN_BIT BIT(0)
17 #define MT8183_SCP_TO_HOST 0x1C
18 #define MT8183_SCP_IPC_INT_BIT BIT(0)
20 #define MT8183_HOST_TO_SCP 0x28
21 #define MT8183_HOST_IPC_INT_BIT BIT(0)
22 #define MT8183_WDT_CFG 0x84
23 #define MT8183_SCP_CLK_SW_SEL 0x4000
24 #define MT8183_SCP_CLK_DIV_SEL 0x4024
25 #define MT8183_SCP_SRAM_PDN 0x402C
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/host1x/hw/ |
| D | hw_host1x08_common.h | 6 #define HOST1X_COMMON_OFA_MLOCK 0x4050
7 #define HOST1X_COMMON_NVJPG1_MLOCK 0x4070
8 #define HOST1X_COMMON_VIC_MLOCK 0x4078
9 #define HOST1X_COMMON_NVENC_MLOCK 0x407c
10 #define HOST1X_COMMON_NVDEC_MLOCK 0x4080
11 #define HOST1X_COMMON_NVJPG_MLOCK 0x4084
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | amlogic-c3.dtsi | 13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0x0 0x0>;
25 reg = <0x0 0x1>;
47 #clock-cells = <0>;
68 #address-cells = <0>;
70 reg = <0x0 0xfff01000 0 0x1000>,
71 <0x0 0xfff02000 0 0x2000>,
72 <0x0 0xfff04000 0 0x2000>,
73 <0x0 0xfff06000 0 0x2000>;
[all …]
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| D | meson-s4.dtsi | 13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0x0 0x0>;
25 reg = <0x0 0x1>;
32 reg = <0x0 0x2>;
39 reg = <0x0 0x3>;
61 #clock-cells = <0>;
84 #address-cells = <0>;
86 reg = <0x0 0xfff01000 0 0x1000>,
87 <0x0 0xfff02000 0 0x2000>,
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | ti,j721e-system-controller.yaml | 48 "^mux-controller@[0-9a-f]+$":
53 "^clock-controller@[0-9a-f]+$":
59 "phy@[0-9a-f]+$":
65 "^chipid@[0-9a-f]+$":
84 reg = <0x00100000 0x1c000>;
91 reg = <0x00004080 0x50>;
95 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
96 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
97 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
98 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
[all …]
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| /kernel/linux/linux-6.6/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
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| /kernel/linux/linux-5.10/drivers/ntb/hw/intel/ |
| D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
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| /kernel/linux/linux-6.6/drivers/dma/xilinx/ |
| D | xdma-regs.h | 32 #define XDMA_DESC_MAGIC 0xad4bUL
34 #define XDMA_DESC_FLAGS_BITS GENMASK(7, 0)
35 #define XDMA_DESC_STOPPED BIT(0)
72 #define XDMA_CHAN_IDENTIFIER 0x0
73 #define XDMA_CHAN_CONTROL 0x4
74 #define XDMA_CHAN_CONTROL_W1S 0x8
75 #define XDMA_CHAN_CONTROL_W1C 0xc
76 #define XDMA_CHAN_STATUS 0x40
77 #define XDMA_CHAN_COMPLETED_DESC 0x48
78 #define XDMA_CHAN_ALIGNMENTS 0x4c
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/reg_srcs/ |
| D | rv515 | 1 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/reg_srcs/ |
| D | rv515 | 1 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | spu.h | 23 #define MFC_PUT_CMD 0x20
24 #define MFC_PUTS_CMD 0x28
25 #define MFC_PUTR_CMD 0x30
26 #define MFC_PUTF_CMD 0x22
27 #define MFC_PUTB_CMD 0x21
28 #define MFC_PUTFS_CMD 0x2A
29 #define MFC_PUTBS_CMD 0x29
30 #define MFC_PUTRF_CMD 0x32
31 #define MFC_PUTRB_CMD 0x31
32 #define MFC_PUTL_CMD 0x24
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | spu.h | 23 #define MFC_PUT_CMD 0x20
24 #define MFC_PUTS_CMD 0x28
25 #define MFC_PUTR_CMD 0x30
26 #define MFC_PUTF_CMD 0x22
27 #define MFC_PUTB_CMD 0x21
28 #define MFC_PUTFS_CMD 0x2A
29 #define MFC_PUTBS_CMD 0x29
30 #define MFC_PUTRF_CMD 0x32
31 #define MFC_PUTRB_CMD 0x31
32 #define MFC_PUTL_CMD 0x24
[all …]
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| /kernel/linux/linux-5.10/arch/mips/netlogic/common/ |
| D | reset.S | 54 XLP_IO_SYS_OFFSET(0) + XLP_IO_PCI_HDRSZ + \
62 lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */
68 ori t1, 0x1000 /* Enable Icache partitioning */
72 lui t1, 0x0100 /* Disable BRU accepting ALU ops */
96 slt t1, t0, 0x1200
103 li t2, 0 /* index */
104 li t3, 0x1000 /* loop count */
108 ori v1, v0, 0x3 /* way0 | write_enable | write_active */
112 andi v1, 0x1 /* wait for write_active == 0 */
116 ori v1, v0, 0x7 /* way1 | write_enable | write_active */
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb4/ |
| D | t4_pci_id_tbl.h | 46 * -- The PCI Function Number to use in the PCI Device ID Table. "0"
73 /* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
76 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
97 CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */
98 CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */
99 CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */
100 CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */
101 CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */
102 CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */
103 CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb4/ |
| D | t4_pci_id_tbl.h | 46 * -- The PCI Function Number to use in the PCI Device ID Table. "0"
73 /* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
76 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
97 CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */
98 CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */
99 CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */
100 CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */
101 CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */
102 CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */
103 CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/mxs/ |
| D | imx28-pinfunc.h | 13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx28-pinfunc.h | 19 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
20 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
21 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
22 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
23 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
24 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
25 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
26 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
27 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
28 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | hpfb.c | 34 #define TC_NBLANK 0x4080
35 #define TC_WEN 0x4088
36 #define TC_REN 0x408c
37 #define TC_FBEN 0x4090
38 #define TC_PRR 0x40ea
41 #define RR_CLEAR 0x0
42 #define RR_COPY 0x3
43 #define RR_NOOP 0x5
44 #define RR_XOR 0x6
45 #define RR_INVERT 0xa
[all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/wm831x/ |
| D | core.h | 25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/wm831x/ |
| D | core.h | 25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | adau1781.c | 24 #define ADAU1781_DMIC_BEEP_CTRL 0x4008
25 #define ADAU1781_LEFT_PGA 0x400e
26 #define ADAU1781_RIGHT_PGA 0x400f
27 #define ADAU1781_LEFT_PLAYBACK_MIXER 0x401c
28 #define ADAU1781_RIGHT_PLAYBACK_MIXER 0x401e
29 #define ADAU1781_MONO_PLAYBACK_MIXER 0x401f
30 #define ADAU1781_LEFT_LINEOUT 0x4025
31 #define ADAU1781_RIGHT_LINEOUT 0x4026
32 #define ADAU1781_SPEAKER 0x4027
33 #define ADAU1781_BEEP_ZC 0x4028
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | adau1781.c | 24 #define ADAU1781_DMIC_BEEP_CTRL 0x4008
25 #define ADAU1781_LEFT_PGA 0x400e
26 #define ADAU1781_RIGHT_PGA 0x400f
27 #define ADAU1781_LEFT_PLAYBACK_MIXER 0x401c
28 #define ADAU1781_RIGHT_PLAYBACK_MIXER 0x401e
29 #define ADAU1781_MONO_PLAYBACK_MIXER 0x401f
30 #define ADAU1781_LEFT_LINEOUT 0x4025
31 #define ADAU1781_RIGHT_LINEOUT 0x4026
32 #define ADAU1781_SPEAKER 0x4027
33 #define ADAU1781_BEEP_ZC 0x4028
[all …]
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | hpfb.c | 34 #define TC_NBLANK 0x4080
35 #define TC_WEN 0x4088
36 #define TC_REN 0x408c
37 #define TC_FBEN 0x4090
38 #define TC_PRR 0x40ea
41 #define RR_CLEAR 0x0
42 #define RR_COPY 0x3
43 #define RR_NOOP 0x5
44 #define RR_XOR 0x6
45 #define RR_INVERT 0xa
[all …]
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| /kernel/linux/linux-6.6/arch/alpha/include/asm/ |
| D | core_mcpcia.h | 58 * 00 00 Byte 1110 0x000
59 * 01 00 Byte 1101 0x020
60 * 10 00 Byte 1011 0x040
61 * 11 00 Byte 0111 0x060
63 * 00 01 Word 1100 0x008
64 * 01 01 Word 1001 0x028 <= Not supported in this code.
65 * 10 01 Word 0011 0x048
67 * 00 10 Tribyte 1000 0x010
68 * 01 10 Tribyte 0001 0x030
70 * 10 11 Longword 0000 0x058
[all …]
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